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RC Release 09.02.00.010
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Call fixup_memory_node() in A72 SPL stage so that the memory changes
made by fixup_ddr_driver_for_ecc() by R5 SPL is propagated to the A72
U-Boot stage as well.
Fixes: 410888e38c7e ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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Substitute failing calls to fdt_fixup_msmc_ram function
by calling fdt_fixup_msmc_ram_k3 function which was implemented in
commit [1].
At functional level nothing changes.
[1] b6e669d7a393 ("arm: k3: Fix ft_system_setup so it can be enabled on any SoC")
Upstream-Status: Inappropriate
Commit [1] is already upstreamed and the new function is already used
when new boards were added.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Modify fixup_ddr_driver_for_ecc() to make the function agnostic to the
number of DDR controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Modify fixup_ddr_driver_for_ecc() to make the function agnostic to the
number of DDR controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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Initialize the ESM & PMIC ESM
Signed-off-by: Keerth <j-keerthy@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
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As per data sheet of J784S4[0], name of board is
J784S4X instead of J784S4.
Fixes: 80f078723786 ("board: ti: j784s4: Add support for board detection by EEPROM read")
[0]: https://www.ti.com/lit/pdf/spruj62<F2>
Section 3.8 Identification EEPROM, Table 3-6. Board ID Information
B_NAME Field
Cc: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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Add cadence-qspi flash node selection for choosing between OSPI NOR
and OSPI NAND flashes put under OSPI0 instance.
This is needed for R5 SPL as it is not possible to apply fixup at this
stage.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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On J784S4, SW3.1 (WKUP_GPIO0_6) is used for selecting between OSPI NOR and
OSPI NAND flash. Read the GPIO state, to perform flash enable operation on
the fdt, for the valid flash and delete the unconnected flash node.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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Update the board_fit_config_name_match() to choose the dtb based on
the board name read from EEPROM. Restrict multpile EEPROM reads by
verifying if EEPROM is already read.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
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Update setup_board_eeprom_env() to choose the right board name
for am69-sk.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
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The serial number of the board is programmed in the EEPROM. Add support
for setup_serial() to read the serial number from EEPROM and update the
serial environmental variable with the same.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
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The board name is programmed in the EEPROM. Add support for board
detection and choose the right dtb based on the board name read
from EEPROM.
The J784S4/AM69 has two platforms naming J784S4-EVM and AM69-SK. The
J784S4 has EEPROM populated at 0x50. AM69 SK has EEPROM
populated at next address 0x51. So start looking for TI specific EEPROM
at 0x50, if not found look for EEPROM at 0x51.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
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Add board support for J784S4 SoC.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
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