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RC Release 09.02.00.010
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Call fixup_memory_node() in A72 SPL stage so that the memory changes
made by fixup_ddr_driver_for_ecc() by R5 SPL is propagated to the A72
U-Boot stage as well.
Fixes: 410888e38c7e ("board: ti: Pull redundant DDR functions to a common location and Fixup DDR size when ECC is enabled")
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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Substitute failing calls to fdt_fixup_msmc_ram function
by calling fdt_fixup_msmc_ram_k3 function which was implemented in
commit [1].
At functional level nothing changes.
[1] b6e669d7a393 ("arm: k3: Fix ft_system_setup so it can be enabled on any SoC")
Upstream-Status: Inappropriate
Commit [1] is already upstreamed and the new function is already used
when new boards were added.
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
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AVS driver was getting probed with base device tree, which
leads i2c of derivative board (AM68) in bad state.
Moving AVS probe after detection of right device tree.
Fixes: eaa184009775 ("arm: k3: j721s2: Enable AVS")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Cc: Manorit Chawdhry <m-chawdhry@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Modify fixup_ddr_driver_for_ecc() to make the function agnostic to the
number of DDR controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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AVS driver was getting probed with base device tree, which
leads i2c of derivative board (AM68) in bad state.
Moving AVS probe after detection of right device tree.
Fixes: eaa184009775 ("arm: k3: j721s2: Enable AVS")
Reported-by: Minas Hambardzumyan <minas@ti.com>
Cc: Manorit Chawdhry <m-chawdhry@ti.com>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Udit Kumar <u-kumar1@ti.com>
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size when ECC is enabled
As there are few redundant functions in board/ti/*/evm.c files, pull
them to a common location of access to reuse and include the common file
to access the functions.
Call k3-ddrss driver through fixup_ddr_driver_for_ecc() to fixup the
device tree and resize the available amount of DDR, if ECC is enabled.
Otherwise, fixup the device tree using the regular
fdt_fixup_memory_banks().
Modify fixup_ddr_driver_for_ecc() to make the function agnostic to the
number of DDR controllers present.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
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Initialize the 3 instances of SOC ESM & PMIC ESM.
This is needed for watchdog functionality.
Signed-off-by: Keerthy <j-keerthy@ti.com>
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Add cadence-qspi flash node selection for choosing between OSPI NOR
and OSPI NAND flashes put under OSPI0 instance.
This is needed for R5 SPL as it is not possible to apply fixup at this
stage.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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IS_ENABLED is the recommendation for checking CONFIG flags.
Use it instead of #if, and drop redundant checking of DM_GPIO
and OF_LIBFDT. #if defined(CONFIG_SPL_BUILD) can't be removed
from spl_perform_fixups, as it results in compile error.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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cadence-qspi manually parses flash subnodes. Simply disabling
the node was not giving expected behaviour across drivers.
So, additionally delete the disabled node also as the flash is
undiscoverable due to hardware muxing anyways.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
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On J721S2, SW3.1 (WKUP_GPIO0_6) is used for selecting between
OSPI NOR and OSPI NAND flash. Read the GPIO state, to perform
correct enable/disable operation on the fdt, for a valid flash
discovery.
Signed-off-by: Apurva Nandan <a-nandan@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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commit 7bf341ae4dfb3f126323cd906efe37e46851c9fa upstream.
Add support to detect daughtercards (GESI Ethernet card) in-order
to set the MAC address of the main CPSW2G interface.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
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Add the board_init_f API for SPL and run the platform-required SoC
initialization.
Add the functionality for board name-based DTB selection from FIT
within SPL. This will make it easier to utilise one defconfig for
both the EVM and the SK.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Update the board_fit_config_name_match() to choose the right dtb
based on the board name read from EEPROM.
Also restrict multpile EEPROM reads by verifying if EEPROM is already
read
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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J721S2 EVM has EEPROM populated at 0x50. AM68 SK has EEPROM populated at
next address 0x51 in order to be compatible with RPi. So start looking
for TI specific EEPROM at 0x50, if not found look for EEPROM at 0x51.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Update setup_board_eeprom_env() to choose the right board name
for am68-sk.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_SDRAM
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Commit 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
changed type of ram_top member from ulong to phys_addr_t but did not
changed types in board_get_usable_ram_top() function which returns value
for ram_top.
So change ulong to phys_addr_t type also in board_get_usable_ram_top()
signature and implementations.
Fixes: 37dc958947ed ("global_data.h: Change ram_top type to phys_addr_t")
Signed-off-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Add board support for J721S2 SoC.
Signed-off-by: David Huang <d-huang@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
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