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path: root/board/gateworks/gw_ventana/gw_ventana_spl.c
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2016-09-06mx6: ddr: Allow changing REFSEL and REFR fieldsFabio Estevam
Currently MX6 SPL DDR initialization hardcodes the REF_SEL and REFR fields of the MDREF register as 1 and 7, respectively for DDR3 and 0 and 3 for LPDDR2. Looking at the MDREF initialization done via DCD we see that boards do need to initialize these fields differently: $ git grep 0x021b0020 board/ board/bachmann/ot1200/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/ccv/xpress/imximage.cfg:DATA 4 0x021b0020 0x00000800 /* MMDC0_MDREF */ board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x7800 board/freescale/mx6qarm2/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qarm2/imximage_mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6dl.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6qsabreauto/mx6qp.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6dlsabresd.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6sabresd/mx6q_4x_mt41j128.cfg:DATA 4 0x021b0020 0x00005800 board/freescale/mx6slevk/imximage.cfg:DATA 4 0x021b0020 0x00001800 board/freescale/mx6sxsabreauto/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/freescale/mx6sxsabresd/imximage.cfg:DATA 4 0x021b0020 0x00000800 board/warp/imximage.cfg:DATA 4 0x021b0020 0x00001800 So introduce a mechanism for users to be able to configure REFSEL and REFR fields as needed. Keep all the mx6 SPL users in their current REF_SEL and REFR values, so no functional changes for the existing users. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Eric Nelson <eric@nelint.com>
2016-05-31imx: ventana: SPL: added support for 32bit IMX6DQ 8Gb density DRAM configTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-05-31imx: ventana: SPL: only disable boot watchdog if Falcon modeTim Harvey
If not booting Falcon mode, leave the boot watchdog enabled as a work-around for other non-resolved bootloader hangs. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2016-05-24imx: ventana: use EEPROM register for falcon boot modeTim Harvey
NAND+MMC env support costs 12KB in the SPL which is fairly expensive just for the ability to specify whether or not to boot to uboot or directly to linux. The Ventana boards have plenty of EEPROM storage so we will use a byte there to signify if we should boot to the bootloader or to the OS. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-11-12gw_ventana: Remove empty reset_cpu()Fabio Estevam
There is really no need to provide an empty reset_cpu() implementation, so just remove it. Cc: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Tim Harvey <tharvey@gateworks.com>
2015-09-02imx: mx6: ddr init MMDC according to ddr_typePeng Fan
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper. The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg when ddr_type is for DDR3. Later we can use ddr_type to initialize MMDC for LPDDR2. Initialize ddr_type for different boards which enable SPL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefan Roese <sr@denx.de>
2015-06-01imx: ventana: hang if board model could not be determinedTim Harvey
If the EEPROM could not be read or is corrupt we always want to hang. Note that an error message will have been displayed by read_eeprom in this case. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-21imx: ventana: config: enable Falcon modeTim Harvey
Falcon mode entails the SPL booting the OS directly instead of U-Boot. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: ventana: add pmic_setup to SPLTim Harvey
We need to do any PMIC setup in the SPL if we are to bypass U-Boot for falcon mode. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: use stack relocationTim Harvey
Certain features we desire require a larger stack than is available by using iRAM (most notably for us, env_mmc). Relocate the stack to DRAM so that we can use these features. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-15imx: ventana: add GSC boot watchdog disable to SPLTim Harvey
If the SPL is to be used for Falcon mode then we need to make sure the SPL disable the GSC boot watchdog. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: add gpio setup to SPLTim Harvey
If the SPL is to be used for Falcon mode then we need to make sure it configures basic GPIO (iomux, padconf, and default output levels). Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: use common uart and i2c setup functions in SPLTim Harvey
Now that uart and i2c setup functions have been moved to common.c we can use these and remove code duplication. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: display SPL boot deviceTim Harvey
Display what device the SPL will fetch uboot.img from Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: fix boot to SDTim Harvey
This fixes a regression caused by e25fbe3fe531029dc7b100ea4c79dbc802e17fc2 (gw_ventana: Move the DCD settings to spl code) The clock gating must be setup prior to calling arch_cpu_init(). Without this booting to SD (directly via eFuse or via bmode) will hang. Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-04-22imx: ventana: Update missing memory/calib handlingPushpal Sidhu
This commit combines catching missing memory and calibration data into one if() block. It further prints pertinent information in determining why the failure occurred. Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22imx: ventana: Add new memory configurationPushpal Sidhu
Add memory configuration for an IMX6SDL + 1GB density DRAM. Signed-off-by: Pushpal Sidhu <psidhu@gateworks.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22imx: ventana: remove 128x16 calibration (share with 128x32)Tim Harvey
The calibration data for dual 2Gb density chips can be used for a single 2Gb density chip. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22imx: ventana: updated 16bit DDR calibrationTim Harvey
Updated 16bit DDR calibration using values obtained from running the i.MX6 DDR Stress Test tool over a set of boards over full operationg temperature. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22imx: ventana: Add support for GW551xTim Harvey
The GW551x is a small form factor board based on the IMX6 SoC that includes: * up to 512MB DDR3 memory * up to 2GB NAND flash * 1x miniPCIe socket (with USB) * HDMI out (micro-HDMI) * HDMI in (micro-HDMI) * TTL level I/O (supported by GW16111 breakout board): * I2C * 2x UART * CAN * 2x DIO (GPIO/PWM) * USB OTG Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22imx: ventana: add support for 4Gb density mem devices with IMX6DLTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-04-22imx: ventana: enable precharge power-down fast-exit modeTim Harvey
Enable fast-exit precharge mode necessary for some DDR3 devices being used on Ventana boards. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2014-12-19arm: mx6: gw_ventana: Change clock init to enable NAND related clocksStefan Roese
Otherwise NAND booting is likely to fail. Since this disables the NAND related clocks and SPL can't load the main U-Boot from NAND. This problem was introduced with this patch: e25fbe3f (gw_ventana: Move the DCD settings to spl code) Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-11-20gw_ventana: Move the DCD settings to spl codeFabio Estevam
mx6sabresd_spl.cfg configures CCM registers, GPR registers and CCM_CCOSR. Move the configuration to the spl code. CCM_CCOSR setting is no longer required to get audio functionality in the kernel, so remove such setting. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-10-01ARM: mx6: gw_ventana: Remove superfluous memset of GD in board_init_fStefan Roese
Zeroing GD in board_init_f() is not needed any more. As its now done in crt0.S. The patch that clears the GD in crt0.S is this one: aae2aef9 [arm: Set up global data before board_init_f()] from Simon. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Tim Harvey <tharvey@gateworks.com>
2014-09-09imx: ventana: base SPL MMDC calibration on width and size not boardTim Harvey
The IMX6 MMDC calibration registers depend on propagation delay and capacitive loading between the SoC's MMDC and the DDR3 chips. On the Ventana boards the board layout varies little in trace-lengths such that propagation delays are irrelevant thus we can simply things by using calibration values obtained from various board layouts based on a common SoC and DDR chip configuration. This eliminates board-model from being needed allowing more flexibility. These values were tested on a large sample size of Gateworks Ventana boards ranging in layout, and memory configuration over the entire temperature range supported. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2014-06-06imx: ventana: switch to SPLTim Harvey
Switch to an SPL image. The SPL for Ventana does the following: - setup i2c and read the factory programmed EEPROM to obtain DRAM config and model for board-specific calibration data - configure DRAM per CPU/size/layout/devices/calibration - load u-boot.img from NAND and jump to it This allows for a single SPL+u-boot.img to replace the previous multiple boa configurations. Cc: Stefan Roese <sr@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Andy Ng <andreas2025@gmail.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Tapani Utriainen <tapani@technexion.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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