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path: root/board/freescale/p1_p2_rdb/ddr.c
AgeCommit message (Expand)Author
2011-04-04powerpc/85xx: Optimized DDR settings for 800MT/s on P1/P2 RDBPoonam Aggrwal
2011-04-04powerpc/85xx: Use DDR for RAMBOOT instead of L2 SRAM on p1_p2_rdbPriyanka Jain
2011-04-04powerpc/85xx: Declare fsl_ddr_set_memctl_regs in <asm/fsl_ddr_sdram.h>Kumar Gala
2011-04-04powerpc/85xx: Remove DATARATE_*_MHZ defines in static ddr initKumar Gala
2011-01-14mpc85xx boards: initdram() cleanup/bugfixBecky Bruce
2010-06-2985xx/p1_p2_rdb: Modify the CLK_CTRL value for DDR at 667MHzPoonam Aggrwal
2009-10-2785xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal
2009-10-2785xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal
2009-09-24ppc/85xx: 32bit DDR changes for P1020/P1011Poonam Aggrwal
2009-09-08ppc/8xxx: Remove ddr_pd_cntl register since it doesn't existKumar Gala
2009-08-2885xx: Add support for P2020RDB boardPoonam Aggrwal