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2022-06-24microblaze: cache: introduce flush_cache_all()Ovidiu Panait
All flush_cache() calls in microblaze code are supposed to flush the entire instruction and data caches, so introduce flush_cache_all() helper to handle this. Also, provide implementations for flush_dcache_all() and invalidate_icache_all() so that icache and dcache u-boot commands can work. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-9-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24microblaze: cache: introduce Kconfig options for icache/dcache sizesOvidiu Panait
Replace XILINX_DCACHE_BYTE_SIZE macro with two Kconfig symbols for instruction and data caches sizes, respectively: CONFIG_XILINX_MICROBLAZE0_ICACHE_SIZE CONFIG_XILINX_MICROBLAZE0_DCACHE_SIZE Also, get rid of the hardcoded value in icache_disable(). Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-8-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com> (s/bralid/brlid/g)
2022-06-24microblaze: cache: split flush_cache() functionOvidiu Panait
Factor out icache/dcache components from flush_cache() function. Call the newly added __flush_icache()/__flush_dcache() functions inside icache_disable() and dcache_disable(), respectively. There is no need to flush both caches when disabling a particular cache type. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-7-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24microblaze: cache: improve icache Kconfig optionsOvidiu Panait
Replace CONFIG_ICACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WIC. It should be enabled if the processor supports the "wic" (Write to Instruction Cache) instruction. It will be used to guard "wic" invocations in microblaze cache code. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-6-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24microblaze: cache: improve dcache Kconfig optionsOvidiu Panait
Replace CONFIG_DCACHE with a Kconfig option more limited in scope - XILINX_MICROBLAZE0_USE_WDC. It should be enabled if the processor supports the "wdc" (Write to Data Cache) instruction. It will be used to guard "wdc" invocations in microblaze cache code. Also, drop all ifdefs around flush_cache() calls and only keep one CONFIG_IS_ENABLED() guard within flush_cache() itself. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-5-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24microblaze: cache: replace XILINX_USE_DCACHE -> CONFIG_DCACHEOvidiu Panait
XILINX_USE_DCACHE macro was removed in 7556fa09e0e ("microblaze: Simplify cache handling"), but it was still used in a couple of places. Replace those occurences with CONFIG_DCACHE. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-4-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24microblaze: start.S: remove unused codeOvidiu Panait
in16/out16 routines seem to not be used anywhere in microblaze code, so remove them. Signed-off-by: Ovidiu Panait <ovpanait@gmail.com> Link: https://lore.kernel.org/r/20220531181435.3473549-3-ovpanait@gmail.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-24microblaze: Add support for run time relocationMichal Simek
Microblaze is using NEEDS_MANUAL_RELOC from the beginnging. This is causing issues with function pointer arrays which need to be updated manually after relocation. Building code with -fPIC and linking with -pic will remove this limitation and there is no longer need to run manual update. By default still old option is enabled but by disabling NEEDS_MANUAL_RELOC code will be compiled for full relocation. The patch does couple of things which are connected to each other. - Define STATIC_RELA dependency to call relocate-rela to fill sections. - REMAKE_ELF was already enabled but u-boot file can't be used because sections are empty. relocate-rela will fill them and output file is u-boot.elf which should be used. - Add support for full relocation (u-boot.elf) - Add support for early relocation when u-boot.bin is loaded to different address then CONFIG_SYS_TEXT_BASE - Add rela.dyn and dynsym sections Disabling NEEDS_MANUAL_RELOC U-Boot size increased by 10% of it's original size (550kB to 608kB). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/a845670b34925859b2e321875f7588a29f6655f9.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Create SYM_ADDR macro to deal with symbolsMichal Simek
Symbol handling depends on compilation flags. Right now manual relocation is used that's why symbols can be referenced just by name and there is no need to find them out. But when position independent code (PIC) is used symbols need to be described differently. That's why having one macro change is easier than changing the whole code. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d704e9a267c8b536452fb999111dbfbc9d652be5.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Add comment about reset locationMichal Simek
Better to add comment to explain why reset vector points all the time to origin U-Boot location. If reset happens U-Boot should start from it's origin location. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/5ca6341b7487708247fe2948d7e496ea6f7c2e02.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove _start symbol handling at U-Boot startMichal Simek
Right now U-Boot runs all the time from the same address where it is loaded but going to full relocation code starting address doesn't need to be fixed and can be simply discovered from reading PC register. That's why use r20 to get PC address and subtract offset from the beginning to get starting address. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/044b727c33dfbe662f68512d0da0775a4805f360.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove code around r20 in relocate_code()Michal Simek
r20 is not used that's why remove logic around it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/1b32bab5c050d099b2f6d49bc4896322ed03d788.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Optimize register usage in relocate_codeMichal Simek
There are additional operations which can be done simpler that's why improve logic around relocation address r7 handling and _start symbol. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c8b60f72f1605c2ba6b4b7be1893d7e6ec3d8597.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Change stack protection address to new stack addressMichal Simek
SLR low address is still setup to 0 that's why only high limit should be updated. STACK_SIZE macro is present and could be possible used for low address alignment but it is not done by this patch. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c00cb843df848703b760a65934ed3ce31fafcf19.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Separate code end substractionMichal Simek
Follow up patch will convert symbol handling that's why it is necessary to separate logic around symbols to special instruction. It adds 4B for new instruction but it is worth to do it to have code ready for for full relocation. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/030863fa9a9c1ca0a9b082fe498522da09189fbc.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Enable REMAKE_ELFMichal Simek
Enable u-boot.elf recreation from u-boot.bin to prepare for removing manul relocation. Enable option for big endian configuration but it is not used too much that's why it is completely untested. By supporting this system there is a need to define LITTLE/BIG endian Kconfig options to pass -EL/-EB flags. Full command line for u-boot.elf recreation looks like this: microblazeel-xilinx-linux-gnu-objcopy -I binary -B microblaze \ -O elf32-microblazeel u-boot.bin u-boot-elf.o Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/7e242a519fcd1c693b9103c5599b515af555ca43.1655299267.git.michal.simek@amd.com
2022-06-24mips: Move endianness selection to arch/KconfigMichal Simek
This option will be used by Microblaze that's why move it to generic location to be able to use it. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/ceb39fa615cb5657b66a7b77bab99e86ca7a3346.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix typo in exception.cMichal Simek
Trivial fix. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c4ede6dc738c5bd7c518f3bb2c9410b15c102e20.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Remove CONFIG_TEXT_BASE from codeMichal Simek
Use symbol instead macro to find where U-Boot starts. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/d5d4c201bee6171e85b47783d916387d84db0456.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix early stack allocationMichal Simek
CONFIG_SYS_INIT_SP_OFFSET macro place stack to TEXT_BASE - SYS_MALLOC_F_LEN but there is no reason to do it now because board_init_f_alloc_reserve() returns exact location where stack should be. That's why stack location is calculated at run time and there is no need to hardcode it via macro. This change will help with placing U-Boot to any address. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/e9aee69646e022fd8a96cbee2d2a07ab81fb6e05.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Fix stack protection behaviorMichal Simek
When U-Boot starts stack protection can be already enabled that's why setup the lowest possible SLR value which is address 0. And the highest possible stack in front of U-Boot. That's why you should never load U-Boot to the beginning of DDR. There must be some space reserved. Code is using this location for early malloc space, early global data and stack. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/86b9748bad12142659804d6381bc6bbf20be44f1.1655299267.git.michal.simek@amd.com
2022-06-24microblaze: Switch absolute branches to relativeMichal Simek
There is no reason to use absolute branches and use just relative. This change helps with moving binary to different location and start it from there. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/83a5103b85c1c2220cd3ab4d5365169c6660e40a.1655299267.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix tps544/u3007 node descriptionMichal Simek
u3007 is removed in zynqmp-m-a2197-02-revA board and on zynqmp-m-a2197-03-revA it was renamed to v3022 at address 0x18. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/f477796bcca6fce09168699a0498d792f4a54acf.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Update tps53681 i2c addressMichal Simek
TI manual (https://www.ti.com/lit/gpn/TPS53681) is saying that i2c address is 7bit where c0h is 1100000 which is 0x60. This will fix issues reported by make dtbs that 0xc0 is above 7bit regular i2c address range. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/2f50c1cd258f6b05deb2a6a9af7fa92952f3f8cb.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Fix i2c addresses for vck190 SCMichal Simek
si570 is normally at 0x5d address and address is not aligned with address in node. 8T49N240 can't be at 0xd8 that's why it is shifter by one bit. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4fa86fffa9cb8abe633fbc5a9c55bea249b5edfb.1655287013.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Enable DP for kv260-revA boardMichal Simek
DP is enabled for revB and should be enabled for kv260-revA too. Changes in other boards were done by commit 8b82a3a7feb0 ("arm64: zynqmp: Enable DP driver for SOMs"). Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/4e273bce3a8acf4495b67b702b1704acec8d9ccb.1654779436.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Add support for kr260 revA/B boardsMichal Simek
Board is using kv260 design for couple of parts defined by spec like i2c eeproms, ina260, uart, etc. Board has 4 gems. One gem connected via PS SGMII(GT), another PS RGMII(MIO) and 2 via EMIO. First two shares the same MIO lines for PHYs. PL based one have separate EMIO lines via PL. Also two USB 3.0 with usb hubs are present. USB phys and USB hubs should have separate reset line. The first usb0 hub also has USB-SD controller (usb2244) connected to port 0. To test compatibility with k26 you can run: fdtoverlay -o /tmp/output.dtb -i arch/arm/dts/zynqmp-sm-k26-revA.dtb \ arch/arm/dts/zynqmp-sck-kr-g-revA.dtbo Also add support for kr260-revB board. Based on FRU it is revision B but schematics can be label as revA03. Changes in revB are: - SFP light - GEM2/3 TX_CLK fixes - PMOD/RPI connector fixes - Replace si5332 with oscilators Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/dac2ee1826e73b89c8cc1e430354eb43d291f675.1652870941.git.michal.simek@amd.com
2022-06-24arm64: zynqmp: Add debug messages to bl2_plat_get_bl31_params()Michal Simek
It is useful to get information about BL type and entry address that's why add some debug messages. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/fb023b618a009009a0b564c24223cadc10ced5b3.1652871741.git.michal.simek@amd.com
2022-06-13ARM: tegra: XUSB padctl: Add new lines for errorsPeter Robinson
Add new lines for error messages to make them easier to read. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
2022-06-03imx: imx8mq: default select CLK_IMX8MQPeng Fan
Since the power domain driver default select CONFIG_CLK, so we will meet lots failures without CLK_IMX8MQ, so default select it. Fixes: commit 4eb82c2e56a7c ("imx: power-domain: Get rid of SMCCC dependency") Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-06-03armv8: Fix TCR 64-bit writesAndre Przywara
The AArch64 TCR_ELx register is a 64-bit register, and many newer architecture features use bits in the upper half. So far U-Boot was igorant of those bits, trying to leave them alone. However, in an effort to set bit 31 to 1, it failed doing so, because the compiler sign-extended "1 << 31", so that all bits[63:31] got set. Older ARMv8.0 cores don't define anything dangerous up there, but newer architecture revisions do, and setting all those bits will end badly: ================= $ qemu-system-aarch64 -cpu max .... U-Boot 2022.07-rc1 (May 09 2022 - 15:21:00 +0100) DRAM: 1.5 GiB ================= (hangs here) Defining TCR_ELx_RSVD to "1U << 31" avoids the sign-extension, so all upper bits stay at a safe 0 value. This means no more surprises when U-Boot runs on a more capable CPU core. Reported-by: Balaji Anandapadmanaban <Balaji.Anandapadmanaban@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Peter Collingbourne <pcc@google.com> Reviewed-by: Peter Collingbourne <pcc@google.com>
2022-05-27Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
2022-05-26arm: dts: k3-am642-*: Mark the memory node with u-boot, dm-splGeorgi Vlaev
Since commit dffdb1f8eb ("board: ti: am64x: Use fdt functions for ram and bank init") ddr_init() and dram_bank_init() have switched to fdtdec for getting the memory configuration from the am64xx dts files instead of using hardcoded values. This requires an accessible memory node in SPL as we already have in k3-am642-r5-evm.dts. Make the memory node accessible in A53 SPL for both am642-sk and am642-evm and in am642-sk R5 SPL. Signed-off-by: Georgi Vlaev <g-vlaev@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2022-05-26riscv: Clean up asm/io.hLeo Yu-Chi Liang
Clean up asm/io.h by - removing commented code - removing outdated comments - removing unused definitions (for mem_isa, mem_pci) This massively improves the readability of the file. Suggested by commits: 7ab2e47d27c9 ("arm: Clean up asm/io.h") 909d0399a519 ("ARM: asm/io.h: kill off confusing #ifdef __mem_pci block") Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-26riscv: remove CONFIG_ARCH_MAP_SYSMEM from io.hMichal Simek
Commit ba1ed5b022c6 ("Convert CONFIG_ARCH_MAP_SYSMEM to Kconfig") clearly defined that this option is available for SANDBOX (was also for already removed NDS32). That's why there is no way how this code can be enabled with current Kconfig layout for riscv. Based on this removing this code. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2022-05-25Merge tag 'xilinx-for-v2022.07-rc4' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2022.07-rc4 zynqmp: - Fix DP PLL configuration for zcu102/zcu106 and SOM - Fix split mode for starting R5s - DT fixes - Remove firmware node for mini configurations - Wire TEE for multi DTB fit image xilinx: - Handle board_get_usable_ram_top(0) properly phy: - Extend psgtr timeout mmc: - Fix mini configuration which misses zynqmp_pm_is_function_supported()
2022-05-24Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini
The bulk of it is (finally!) some DT sync from the kernel. We refrained from syncing one incompatible change, as this would spoil booting Linux kernels before v5.13 with U-Boot's DT (via UEFI, for instance). I test booted Linux v5.18 and v5.4 with that new DT on some boards, and the headless peripherals (MMC, USB, Ethernet) seemed to work. The rest are fixes: - silencing missing clock warnings due to the new pinctrl driver - fixing "UART0 on PortF", allowing UART access through the SD card pins - add an F1C100s clock driver, to enable MMC support (SPI comes later) - some cleanups for CONS_INDEX_n in Kconfig Tested on BananaPi-M1, Pine64-LTS, Pine-H64, X96-Mate (H616) and OrangePi-Zero.
2022-05-24xilinx: zynqmp: Wire tee for Multi DTB use casesMichal Simek
Fix TEE wiring when MULTI_DTB is selected. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/c8523a89d910ae6b8a9971b4e7b3bda89be3dc27.1652874088.git.michal.simek@amd.com
2022-05-24sunxi: Remove obsolete Kconfig selectionsSamuel Holland
ARCH_SUNXI selects DM_SERIAL, so the condition can never be satisfied. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-24sunxi: board: Fix UART PortF pinmux setupAndre Przywara
When CONFIG_UART0_PORT_F is defined, we try to configure two PortF pins (usually used for the SD card) as UART0. Some SoCs use the mux value of 3 for this, while others use 4. The combination of Kconfig symbols we currently use was not quite right: we mis-configure the A31, A64, H6 and H616. Going through the list in the pinctrl driver, there are only a few older SoCs that use a value of 4, so revert the #ifdef clause, and name those explicitly, instead of the other way around. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Samuel Holland <samuel@sholland.org>
2022-05-23arm: socfpga: Add the terasic de10-standard boardHumberto Naves
Use the de10-nano files as templates for the de10-standard board. The files in qts directory are generated by quartus from the GHRD design. Signed-off-by: Humberto Naves <hsnaves@gmail.com> Reviewed-by: Marek Vasut <marex@denx.de>
2022-05-23arm: gic_v2: Skip gic_init_secure when cpu is not in el3Sai Pavan Boddu
This would prevent configuring non-secure regs in case gic security extensions are not emulated in Qemu. Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-05-23powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support for NOR bootingPali Rohár
Commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support") fixed SD card booting on mpc85xx boards but broke NOR booting on these boards. Reason is that U-Boot build system for NOR images uses binman and this binman ignores alignment defined in linker script. Instead it has own config file where is alignment defined. Fix binman alignment for mpc85xx boards to match what is _now_ defined in linker script. This change fixes building of U-Boot for NOR booting on P2020 board. Fixes: e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE support") Signed-off-by: Pali Rohár <pali@kernel.org>
2022-05-23Merge tag 'u-boot-imx-20220523' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20220523 ------------------- CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/12087 Additionally to u-boot-imx20200520: - DH MX8MP - i.MX GPIO: reading GPIO when direction is output - Menlo i.MX53: switch to DM And from u-boot-imx20200520: - fix Verdin hang - add pca9450 regulator - conversion to DM_SERIAL - NAND block handling - fix crypto - enable cache on some boards - add ACC board (MX6)
2022-05-23ARM: dts: imx: Add support for DH electronics i.MX8M Plus DHCOM and PDK2Marek Vasut
Add support for DH electronics i.MX8M Plus DHCOM SoM on PDK2 carrier board. Currently supported are serial console, EQoS and FEC ethernets, eMMC, SD, SPI NOR and USB 3.0 host. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@denx.de> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2022-05-23sunxi: F1C100s: update DT files from LinuxAndre Przywara
The initial U-Boot F1C100s port was based on the mainline kernel DT files, which were quite basic and were missing the essential MMC and SPI peripherals. While we could work around this in the SPL by hardcoding the required information, this left U-Boot proper without SD card or SPI flash support, so actual loading would require FEL boot. Now the missing DT bits have been submitted and accepted in the kernel tree, so lets sync back those files into U-Boot to enable MMC and SPI, plus benefit from some fixes. This is a verbatim copy of the .dts and .dtsi file from linux-sunxi/dt-for-5.19[1], which have been part of linux-next for a while as well. [1] https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git/log/?h=sunxi/dt-for-5.19 Link: https://lore.kernel.org/linux-arm-kernel/20220317162349.739636-1-andre.przywara@arm.com/ Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2022-05-23ARM: dts: sun50i: H6: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the H6 SoC and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 189bef235dd3 and 73088dfee635. This commit also adds the following new board devicetrees: - sun50i-h6-pine-h64-model-b.dts - sun50i-h6-tanix-tx6-mini.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun50i: A64: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the A64 SoC and all existing boards from the Linux v5.18-rc1 tag. To maintain ABI compatibility with existing LTS kernels, one change moving some IP blocks to the r_intc interrupt controller is excluded. This effectively reverts Linux commits 189bef235dd3 and 73088dfee635. This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun8i: R40/T3: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree for the R40/T3 SoC verbatim from the Linux v5.18-rc1 tag. None of the existing boards had any devicetree updates. This commit adds the following new board devicetrees: - sun8i-r40-oka40i-c.dts - sun8i-t3-cqa3t-bv3.dts Signed-off-by: Samuel Holland <samuel@sholland.org>
2022-05-23ARM: dts: sun8i: V3/V3s/S3: Sync from Linux v5.18-rc1Samuel Holland
Copy the devicetree source for the V3(s)/S3 SoCs and all existing boards verbatim from the Linux v5.18-rc1 tag. This commit also adds the following new board devicetrees: - sun8i-s3-elimo-initium.dts - sun8i-v3-sl631-imx179.dts This update should not impact any existing U-Boot functionality. Signed-off-by: Samuel Holland <samuel@sholland.org>
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-08 03:06:20 +0000