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2019-10-27MLK-22851-3 imx8mq: Enable eMMC HS400 and SD UHS mode on EVKYe Li
iMX8MQ EVK board has a eMMC5.0 chip and supports SD3.0, so enable the UHS and HS400 configs to enhance the eMMC/SD access. The change also needs to set usdhc clock to 400Mhz, and add the off-on-delay-us to SD reset pin, otherwise some SD cards will fail to select UHS mode in re-initialization. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-23MLK-22830 mx7ulp: Fix build break of mx7ulp_evk_m4boot_defconfigYe Li
Get build error when using mx7ulp_evk_m4boot_defconfig arch/arm/lib/built-in.o: In function `setup_serial_tag': /home/leyoen/Workspace/uboot-imx/arch/arm/lib/bootm.c:191: undefined reference to `get_board_serial' The boot cause is CONFIG_SERIAL_TAG is defined in header file without depending on fastboot, but the function definition uses CONFIG_FSL_FASTBOOT. So remove the wrong macro from function definition to fix the issue Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-16MLK-22759-4 DTS: imx8mn: Update DDR4 EVK DTSYe Li
Add the "DDR4" to board name to distinguish with LPDDR4 board. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-15MLK-22759-3 imx8mn: Add LPDDR4 EVK board supportYe Li
Add support for iMX8MN LPDDR4 EVK board which uses 2GB LPDDR4 and PCA9450B PMIC. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-15MLK-22759-1 imx8mn: Use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK boardYe Li
To align with other iMX8M platforms, use CONFIG_TARGET_IMX8MN_DDR4_EVK for DDR4 EVK board and will use CONFIG_TARGET_IMX8MN_EVK for LPDDR4 EVK. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-10-11MLK-22748 imx8mn: Fix flexspi flash SCLK violationYe Li
Current flexspi driver enables the Quad DTR read, so the measured 100Mhz SCLK is actually for DTR mode not SDR. However, according to MT25QU256ABA datasheet, this flash only supports max DTR at 90Mhz and max SDR at 166Mhz. It means current clock setting violate the flash spec. So change back the flexspi clock to align with imx8mm. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-10-09MLK-22711-1 show RevC instead of Rev? at boot logFrank Li
Add REVC informaiton. Signed-off-by: Frank Li <Frank.Li@nxp.com>
2019-09-27MLK-22622 imx8m: Add Workaround for ROM SError issueYe Li
ROM SError happens on two cases: 1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but when ROM patch lock is fused, this write will cause SError. 2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB is field return mode, but the last 4K of ROM is still protected and cause SError. Since ROM mask SError until ATF unmask it, so then ATF always meets the exception. This patch works around the issue in SPL by enabling the SError exception and take it to eret immediately to clear the SError. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-09-17imx: add lowlevel init for ARM64Peng Fan
Sometimes we met SERROR, but only to catch it when Linux boots up. Let's enable catching in U-Boot to catch it ealier and ease debug. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 7a0c9b08886e5dc7d50e640ed56eed0fe612161f)
2019-09-10MLK-22576 imx8: video: Set clock parent for DC0 display channelYe Li
When enable u-boot splash screen and set kernel dtb with -hdmi.dtb on imx8qm, the kernel reboot (partition reboot) will hang in u-boot if HDMI cable is plugged in. The root cause is kernel set the clock source of DC0 display0 channel to bypass clock, when doing reboot this clock setting may not be cleared. So u-boot has wrong clock source and cause lpcg stop bit always set. Fix the issue by adding the clock parent setting and not depend on default parent value. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-08-11MLK-22425 TMU: iMX8MN: Enable loading TASR and TCALIV from fuseYe Li
Like iMX8MM, iMX8MN also needs SW to load TMU TASR and TCALIV registers value from fuse before enabling TMU calibration. Otherwise the calibration is not exact. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
2019-07-30MLK-22179-2 imx8mn_evk: Enable FSPI DQS loopback for high freqYe Li
There is an divider on imx8mn will always divide 2 to flexspi root clock. So actual SCLK output to device is 50Mhz on imx8mn not 100Mhz. After changing the root clock setting to configure SCLK to 100Mhz, found the read data is not correct. Must enable the internal DQS pad loopback to fix the problem. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-25MA-15180 Refine dual bootloader flow for imx8mJi Luo
We may need to enable the dual bootloader feature on non-trusty platforms, skip the bootloader rollback index check in spl if trusty is not enabled. Don't generate rpmb key in spl, it should be generated in u-boot proper with u-boot commands. Test: dual bootloader on imx8mm. Change-Id: Iac455e0140cd6f4472a66d267d9ba0d40df7102c Signed-off-by: Ji Luo <ji.luo@nxp.com>
2019-07-17MLK-22279-3 imx8mn: override env_get_offset and env_get_locationYe Li
To use one defconfig for all boot device, we have to runtime set env offset and return env medium according to the boot device. This patch overrides the env_get_offset and env_get_location to implement the feature. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-07-16MA-15019-1 Support Manufacture Protection public key generationJi Luo
Add new keymaster commands to get Manufacure Production key (mppubk). Since the mppubk can only be generated in OEM CLOSED imx8q board, so we can only this command when the board is HAB/AHAB closed. Commands to extract the mppubk: * $fastboot oem get-mppubk * $fastboot get_staged mppubk.bin Test: Generate and dump the mppubk.bin Change-Id: Idc59e78ca6345497e744162664b8293f50d1eda4 Signed-off-by: Ji Luo <ji.luo@nxp.com>
2019-07-14MLK-22258 imx8mn: Update speed gradeYe Li
imx8mn speed grade fuse uses new definitions as below. So have to update get_cpu_speed_grade_hz function to match it. SPEED_GRADING[5:0]: SPEED_GRADE[5:4] SPEED_GRADE[3:0] MHz xx 0000 2300 xx 0001 2200 xx 0010 2100 xx 0011 2000 xx 0100 1900 xx 0101 1800 xx 0110 1700 xx 0111 1600 xx 1000 1500 xx 1001 1400 xx 1010 1300 xx 1011 1200 xx 1100 1100 xx 1101 1000 xx 1110 900 xx 1111 800 Signed-off-by: Ye Li <ye.li@nxp.com>
2019-07-09MLK-22245 mx6qp: Fix issue caused by moving pre_misc_setting()Ye Li
The commit "MLK-22219 mx6: Place pre_misc_setting() into a common location" causes iMX6QP boot hang. Because QoS settings in pre_misc_setting depends on IPU and PRG clocks enabled. So still calling pre_misc_setting in enable_ipu_clock, and move enable_ipu_clock to arch_cpu_init Signed-off-by: Ye Li <ye.li@nxp.com>
2019-07-08MLK-22219 mx6: Place pre_misc_setting() into a common locationFabio Estevam
Currently the NoC settings are only done if the splash screen support is enabled. However, this can cause IPU issues on i.MX6QP in the kernel, when splash screen is not enabled in U-Boot. To avoid such problems, place the pre_misc_setting() function into a common location that will always run on i.MX6QP/DP. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> (cherry picked from commit 6e052b9e2fa88ea0e06ca22ed3bb0234458ffdf1)
2019-07-04MLK-22192 imx8mn: Add variant parts supportYe Li
According to datasheet, there are totally 6 variant parts for imx8mn: Quad, Dual, Solo with core number changed. QuadLite, DualLite, SoloLite with core number changed and GPU disabled. Add the support for these variant parts 1. Recognize the variant parts according to fuse 2. Power down disabled cores 3. Remove the cores node and disable GPU node from kernel DTB before entering kernel. 4. Since the mscale dummy id has been used out, increase one more bit (bit 8) for cpu id. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-07-03MA-15062-1 change names of MACROs used to boot MCU on imx8m devicesfaqiang.zhu
new imx8mn chips have Cortex-M7 inside, not like other imx8m devices of imx8mm and imx8mq which have Cortex-M4 inside. the names of MACROs used to boot MCU on imx8m devices is modified to make them more common to cover M4 and M7. annotations are also modified based on the differences between M4 and M7. Change-Id: Ida272e6ecdf577eeaadb9f1242f4524bd1014cac Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com>
2019-07-03MA-15062 change MACRO name of mcu TCM base addressfaqiang.zhu
imx-regs-imx8mm.h is used both for imx8mm and imx8mn, while mcu in imx8mn is Cortex-M7, it's different from Cortex-M4 in imx8mm, change the MACRO name of mcu TCM base address from M4_BOOTROM_BASE_ADDR to MCU_BOOTROM_BASE_ADDR. since this MACRO will be used in common code for i.MX chips, the same MACRO name in other files are also modified. Change-Id: I433dd78d11c485d0f4cb82bab299f61cb29dce45 Signed-off-by: faqiang.zhu <faqiang.zhu@nxp.com>
2019-06-21MLK-22080 imx8mn_evk: add SPL and u-boot build for nominal modeYe Li
Add imx8mn_ddr4_evk_nom_defconfig to generate SPL and u-boot to force SOC to nominal mode. So the VDD_SOC will be 0.85V and ARM will be fixed to 0.85V with DVFS disabled in kernel. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Anson Huang <Anson.Huang@nxp.com>
2019-06-19MLK-22047 imx8mn: pins: add SION for I2CPeng Fan
SION bit needs to be set when the pin are used for I2C. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-06-17MLK-22005 imx8: clock: Handle FEC with freq limited on 8UXYe Li
When FEC is fused to limit RMII 10/100, we should configure clocks for RMII. It needs enable 50Mhz ref clock, set SC_C_TXCLK mux to dummy. And we don't need to enable the LPCG for RGMII TX CLK for RMII. The latest SCFW has fixed a issue that PERCLK slice was disabled before on parts with freq fused. With that issue the LPCGs using PERCLK as sources are always in STOP staus. So the u-boot will loops in checking STOP status. "commit 59e7cf4e81dd265411e4f1dcd5186567d3fb51ef Author: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com> Date: Mon Jun 17 17:10:43 2019 -0500 SCF-420 Ensure IEEE1588 can work on fused QX parts " SO to work with both old and latest SCFW versions, this patch changes to enable LPCG by LPCG_ClockOn which won't wait on the LPCG STOP status Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-05-29MLK-21889-11 imx8mn_evk: Add board codes and defconfig for iMX8M Nano EVKYe Li
Add board level codes, header file, and defconfig for iMX8M Nano EVK board. The board has similar design as iMX8MM EVK. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-05-29MLK-21889-10 DTS: imx8mn: Add DTS file for iMX8M Nano EVK boardYe Li
Add the board DTS file for iMX8MN EVK. The base board re-use base board of iMX8MM EVK. The CPU board has most of same design with iMX8MM CPU board, except DDR4 and some PMIC power rails. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-29MLK-21889-9 DTS: imx8mn: Add binding files and imx8mn.dtsiYe Li
Add soc DTSi and clock/pinctrl binding files. The pinctrl binding file is v0.03 generated by tool Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-29MLK-21889-5 imx8mn: Update get_boot_deviceYe Li
There is no ROM INFO structure on iMX8MN, we should Use new ROM API to get boot device from ROM Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-29MLK-21889-4 imx8mn: Add ROMAPI calls for SPL FIT loadingYe Li
i.MX8MNano ROM exports APIs to load images from boot device. We use this way for SPL loading FIT image. Users need enable CONFIG_SPL_IMX_ROMAPI_SUPPORT and set a buffer address via CONFIG_SPL_IMX_ROMAPI_LOADADDR Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2019-05-29MLK-21889-3 imx: Update SPL boot device for iMX8MNYe Li
We use same boot device logic with iMX8MM Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-29MLK-21889-2 imx8mn: Add runtime soc type checkYe Li
Add is_imx8mn for runtime soc type checking, and update drivers to use it. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-05-29MLK-21889-1 imx8mn: Add new SoC iMX8M NanoYe Li
Introduce a new SoC kconfig CONFIG_IMX8MN. Since the chip is derived from iMX8MM, we reuse the clocks and registers mapping files of iMX8MM. The iomux header file is the latest v0.03 generated by tool and add SION for i2c and usdhc3. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com>
2019-05-21MLK-21745-02 board: imx8mm_val: change the ddr init to the common driverJacky Bai
change the ddr init to use the common driver init driver as we used on EVK board. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-05-17MLK-21759-2 mx6ull: Fix mispelling aaips in fuse_entry_desc pathLeonard Crestez
This is not intentional. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-05-17MLK-21759-1 mx6ul: Fix module fuse paths for upstream namingLeonard Crestez
According to upstream linux naming conventions node names must have no leading zeros after the @ sign. Recent imx_4.19.y changes to conform with this convention on 6ull broke 6ulz boot however looking at the code 6ul fuse checks were already broken by upstream commit efb9adb27475 ("ARM: dts: imx6ul: Remove leading zeroes from unit addresses") Instead of reverting make uboot fuse check follow upstream standards. Keep old paths for compatibility with imx_4.14.y Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-05-08MLK-21354-1 imx: define ARCH_MXC for i.MX8/8m/7ulpPeng Fan
Need define ARCH_MXC to avoid access wrong registers in fsl_esdhc Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-05-07MLK-21654 mx6sl: hab: Fix pu_irom_mmu_enabled addressBreno Lima
According to hab.c code we have to notify the ROM code if the MMU is enabled or not. This is achieved by setting the "pu_irom_mmu_enabled" to 0x1. The current address in hab.c code is wrong for i.MX6SL, according to ROM map file the correct address is 0x00901c60. As we are writing in the wrong address the ROM code is not flushing the caches when needed, and the following HAB event is observed in certain scenarios: --------- HAB Event 1 ----------------- event data: 0xdb 0x00 0x14 0x41 0x33 0x18 0xc0 0x00 0xca 0x00 0x0c 0x00 0x01 0xc5 0x00 0x00 0x00 0x00 0x07 0xe4 STS = HAB_FAILURE (0x33) RSN = HAB_INV_SIGNATURE (0x18) CTX = HAB_CTX_COMMAND (0xC0) ENG = HAB_ENG_ANY (0x00) Update MX6SL_PU_IROM_MMU_EN_VAR to address this issue. Reported-by: Frank Zhang <frank.zhang@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-05-07MLK-21485 imx8qm/qxp: Extend image size for bootaux M4Ye Li
iMX8 has consective address for TCML and TCMU, so the M4 image size could exceed the TCML boundary and put its data section in TCMU. So change the size limitation in bootaux to 256KB to include TCMU. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-04-22MLK-21000 imx8: Ignore upstream power-domains of len != 4Leonard Crestez
In upstream the power-domains for imx8 have different bindings and when uboot attempts to parse them it ends up disabling everything. This fix allows running upstream linux on imx8qxp without custom boot binaries. Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com> Acked-by: Ye Li <ye.li@nxp.com>
2019-04-11MA-14518 AIY: Enable i2c2 and i2c3 in u-boot.Leonid Lobachev
Enable i2c2 and i2c3 for AIY. Change-Id: I984e2e76e7c8929cc62088b6838c81f5dc838568
2019-04-09MLK-21389 imx: hab: Check if IVT header is HABv4Breno Lima
The HABv4 implementation in ROM checks if HAB major version in IVT header is 4.x. The current implementation in hab.c code is only validating HAB v4.0 and HAB v4.1 and may be incompatible with newer HABv4 versions. Modify verify_ivt_header() function to align with HABv4 implementation in ROM code. Signed-off-by: Breno Lima <breno.lima@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2019-04-07MLK-21392 imx8: Update SCFW API to v1.7Ye Li
Sync the SCFW API to with latest commit: commit 252281d48647caad9a00ff1dd0f1a666c4067653 Author: Chuck Cannon <chuck.cannon@nxp.com> Date: Fri Apr 5 18:03:13 2019 -0500 SCF-105: Update wiki. Signed-off-by: Chuck Cannon <chuck.cannon@nxp.com> Major changes in the update: 1. sc_seco_patch and sc_seco_start_rng are added. 2. sc_misc_get_boot_container is added 3. New resource SC_R_USB_1_PHY 4. Type for 16Mhz frequency Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-04-02MA-14501[Android] change BOOTAUX_RESERVED_MEM macro to defconfigZhang Bo
As the M4 use different DDR memory size in normal android/car2 and car image, use different defconfig for car2 to decrease DDR memory reservation. So memory reserved for each M4 core is 8MB in car2 and normal android image. it's 32MB for car image. Change-Id: Idf608f539cd614a154c78e3a1af28eff1da5c1f2 Signed-off-by: Zhang Bo <bo.zhang@nxp.com>
2019-03-27MLK-21251-1 imx: hab: Fix build warnings in 32-bit targetsBreno Lima
When building 32-bit targets with CONFIG_SECURE_BOOT and DEBUG enabled the following warnings are displayed: arch/arm/mach-imx/hab.c:840:41: warning: format '%lx' expects argument \ of type 'long unsigned int', but argument 3 has type 'uint32_t \ {aka unsigned int}' [-Wformat=] printf("HAB check target 0x%08x-0x%08lx fail\n", ~~~~^ %08x ddr_start, ddr_start + bytes); arch/arm/mach-imx/hab.c:845:45: warning: format '%x' expects argument \ of type 'unsigned int', but argument 3 has type 'ulong \ {aka long unsigned int}' [-Wformat=] printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n", ivt_offset, ivt_addr); ~^ %lx Fix warnings by providing the correct data type. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com>
2019-03-27MLK-21174 mx7ulp: hab: Add hab_status command for HABv4 M4 bootBreno Lima
When booting in low power or dual boot modes the M4 binary is authenticated by the M4 ROM code. Add an option in hab_status command so users can retrieve M4 HAB failure and warning events. => hab_status m4 Secure boot disabled HAB Configuration: 0xf0, HAB State: 0x66 No HAB Events Found! Add command documentation in mx6_mx7_secure_boot.txt guide. As HAB M4 API cannot be called from A7 core the code is parsing the M4 HAB persistent memory region. The HAB persistent memory stores HAB events, public keys and others HAB related information. The HAB persistent memory region addresses and sizes can be found in AN12263 "HABv4 RVT Guidelines and Recommendations". Reviewed-by: Utkarsh Gupta <utkarsh.gupta@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Breno Lima <breno.lima@nxp.com>
2019-03-18MLK-21168 imx: Set timeout of virtual driver service connection to 2sYe Li
The normal ready time of M4 side is less than 1s, so we can use 2s as the timeout of connection. The current value is 10s, which seems a little long if M4 SRTM service does not run. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2019-03-18MLK-21165 imx8: Workaround LPCG HW issueYe Li
There are two LPCG HW issues reported in TKT322331. Add workaround for them in u-boot. 1. Back to back LPCG write access must have 4x DSC cycle interval. 2. When DSC clock is gated, LPCG write access may be missed due to the edge detect is not see by DSC. Two writes shall be performed to re-enable the clock if DSC clock is gated Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-03-15MLK-21158 imx8mm: Add workaround for arm timer stopped issueYe Li
When switching ARM root clock source from ARM PLL to 24M OSC, found the ARM timer may stop on few chips during stress reboot test. The system counter is still increasing, but ARM timer is stopped. Add a workaround that switch ARM clock source from ARM PLL to Sys PLL2 500M clock instead of 24M OSC. Stress reboot test is passed on all failed chips. Signed-off-by: Ye Li <ye.li@nxp.com>
2019-03-12MLK-21103 imx8: Fix build break on ARM2 SPLYe Li
Meet the build error below with ARM2 SPL defconfig arch/arm/mach-imx/imx8/image.c: In function ‘spl_nor_get_uboot_base’: arch/arm/mach-imx/imx8/image.c:224:13: error: ‘CONFIG_SYS_UBOOT_BASE’ undeclared (first use in this function) if (end <= CONFIG_SYS_UBOOT_BASE) The root cause is we did not add SPL NOR support for ARM2 SPL, but the codes still use the CONFIG_SYS_UBOOT_BASE. Fix the issue by adding SPL device support config for each device relevant function. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2019-03-12MA-14283 [coverity] Fix uninitialized scalar variableLuo Ji
Fix coverity issue: CID 5433686: Uninitialized scalar variable (UNINIT) uninit_use_in_call: Using uninitialized value value when calling call_imx_sip_ret2. Test: coverity scan pass. Change-Id: Id89f8f6f69fb944179b34dca4146fd7636505681 Signed-off-by: Luo Ji <ji.luo@nxp.com>
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