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2018-10-19Convert CONFIG_FLASH_CFI_DRIVER et al to KconfigAdam Ford
This converts the following to Kconfig: CONFIG_FLASH_CFI_DRIVER CONFIG_SYS_FLASH_USE_BUFFER_WRITE CONFIG_FLASH_CFI_MTD CONFIG_SYS_FLASH_PROTECTION CONFIG_SYS_FLASH_CFI Signed-off-by: Adam Ford <aford173@gmail.com> [trini: Re-migrate] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-19ARM: mach-omap2: Kconfig: Make SYS_MPUCLK dependent on AM33XXAdam Ford
This value is unly used in arch/arm/mach-omap2/am33xx/ clock_am33xx.c, so let's make it dependent on AM33XX since that is the only way this file gets compiled into the code according to the Makefile. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Fix symbol name] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-19arm: lpc32xx: remove phantom CONFIG_LPC32XX_SDRAM_ config optionVladimir Zapolskiy
The option has never existed and config whitelist script accumulates it from a comment block, wipe it out from the source code. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-10-19arm: lpc32xx: add CONFIG_ARCH_LPC32XX build optionVladimir Zapolskiy
The explicit arch specific build symbol allows to group supported boards, generalize common config options and it will serve as a dependency for platform only drivers. Two related board defconfigs are resynced after the change. Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
2018-10-18ARM: rmobile: Drop PRR syscon driverMarek Vasut
The PRR syscon driver is available too late for Multi DTB build of U-Boot. Replace it with simple check whether a platform is Gen3 or not and produce an address of the PRR. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-10-18ARM: dts: rmobile: Build -u-boot variants of DTsMarek Vasut
Build the -u-boot variants of the device trees so they can be included in Multi-DTB fitImage, which in turn allows us to build single U-Boot image for multiple boards. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-10-18ARM: dts: rmobile: r8a77990: Add USB2.0(EHCI) DT nodes on EbisuHiroyuki Yokoyama
Add device tree nodes for USB2.0(EHCI) on R-Car E3 Ebisu board. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
2018-10-18ARM: rmobile: Enable cache command on Gen3Hiroyuki Yokoyama
This patch enables the cache command, mostly for convenience of testing. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-10-17Merge tag 'signed-efi-2018.11' of git://github.com/agraf/u-bootTom Rini
Patch queue for efi - 2018-10-17 A few bug fixes for the 2018.11 release: - Fix block seeking on 32bit - Fix execution with DEBUG set - Fix a few Coverity found bugs - Fix warnings Heinrich Schuchardt (13): efi_loader: fix relocation on x86_64 efi_loader: correct signature of GetPosition, SetPosition efi_loader: execute efi_save_gd() first efi_loader: efi_allocate_pool(EFI_ALLOCATE_ANY_PAGES, ...) efi_loader: error handling in read_console() efi_loader: return type efi_console_register() efi_loader: superfluous statement in is_dir() efi_loader: memory leak in efi_set_variable() efi_loader: remove lcd.h from efi_net.c arm: do not include efi_loader.h twice efi_loader: fix typo in efi_boottime.c efi_selftest: creating new handle in controller test efi_loader: efi_dp_get_next_instance() superfluous statement Tom Rini (2): efi_loader: Fix warning in efi_load_image() fs: fat: Fix warning in normalize_longname()
2018-10-16arm64: zynqmp: Enable MP by default via KconfigMichal Simek
Simplify defconfig for ZynqMP but keep option not to enable it for mini targets. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: zynqmp: Add new command for TCM initializationSiva Durga Prasad Paladugu
This patch adds new zynqmp command "zynqmp tcminit mode" to initialize TCM. TCM needs to be initialized before accessing to avoid ECC errors. This new command helps to perform the same. It also makes tcm_init() as global and uses it for doing the TCM initialization. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: zynqmp: Move TCM initialization to a separate routineSiva Durga Prasad Paladugu
This patch moves TCM initialization to a separate routine to make it modular and can be reused if required. It also prints warning message now as it writes to TCM. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: versal: Add Xilinx Versal Virtual QEMU boardMichal Simek
Virtual QEMU board is generating DTB self and putting it to VERSAL_QEMU_DTB_ADDR address. Board is using CONFIG_OF_BOARD which ensures that u-boot is aligned with board created by QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm64: versal: Add support for new Xilinx Versal ACAPsMichal Simek
Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: do not include efi_loader.h twiceHeinrich Schuchardt
We should not include the same include twice. Fixes: 99b8db7291ce ("arm: print information about loaded UEFI images") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2018-10-16arm64: gic: Do gicv3 secure initialization based on EL levelMichal Simek
Do gic cpu initialization based on EL level which u-boot enters. U-Boot can't access EL3 regs when runs in EL2/EL1, etc. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: zynq: Add efuse node for Zynq-7000S devicesMichal Simek
Add access to efuse for Zynq-7000S device detection. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16arm: zynq: Add support for DLC20 boardMichal Simek
Xilinx DLC20 has I2C0 with EEPROM(1KB), UART1, GPIO, SD0 (EMMC 4GB), USB0 device, ENET0, QSPI (16MB) and DDR(two of 256MB each). Boards have mix of Winbond/ST QSPIs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-15Merge tag 'arc-more-updates-for-2018.11-rc2-2' of git://git.denx.de/u-boot-arcTom Rini
More fixes and improvements for ARC here: Fixes (this time included for real): * Take care of global uninitialized variables They used to be put right after .bss section and were never zeroed as they should be. Now merged with normal .bss Improvements: * Print more verbose CPU info for boards built on real silicon * Add support for SD-card detection on all ARC boards * Quite a few fixes for IoT DK - Support reset by command - Print of CPU freq on boot - Link for eFlash etc
2018-10-15ARC: Don't use COMMON section for global not-initialized variablesAlexey Brodkin
By default GCC puts global non-initialized variables in COMMON section. And we used to ignore existence of COMMON section in our linker scripts though smart LD silently appended it right after .bss. And the problem here is variables from COMMON section even though require zeroing in run-time were not zeroed as they were placed right after __bss_end symbol. It was a pure luck we never faced serious problem due to this, but now it is fixed. Now as for some other architectures we'll just force GCC to put those global variables in normal .bss section. This solution is much nicer than adding COMMON section to each and every linker script. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-12Merge git://git.denx.de/u-boot-sunxiTom Rini
[trini: Convert da850evm_nand defconfig now to to SPL_DM] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-12ARC: make generic print_cpuinfo() weakAlexey Brodkin
This allows board to override print_cpuinfo() because they might know better which ARChitect template was used. This way we may not only derive base architecture type and version but more meaningful things like "ARC EM7D" instead of simple "ARC EM", "ARC HS36" instead of "ARC HS". Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-10-11Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini
2018-10-10Merge tag 'dm-9oct18' of git://git.denx.de/u-boot-dmTom Rini
Test improvements to tidy up output and drop duplicate tests Sandbox SPL/TPL support Various dm-related improvements
2018-10-10Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2018-10-10arm: remove duplicated prototypes in u-boot.arm.hPatrick Delaunay
Remove the function prototypes duplicated between u-boot.arm.h and init.h/common.h Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10arm: remove prototype for get_timer_maskedPatrick Delaunay
The interruption support had be removed for ARM architecture and the function get_timer_masked() is no more used except in some the timer.c files. This patch clean each timer.c which implement this function and remove the associated prototype in u-boot-arm.h For timer.c, I don't verify if the weak version of get_timer (in lib/time.c) can be used Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10arm: remove prototype for udelay_maskedPatrick Delaunay
The interruption support had be removed for ARM architecture and the function udelay_masked() is no more used except in some timer.c files and have the same content than udelay() or __udelay(). This patch update each timer.c implementing this function and remove the associated prototype in u-boot-arm.h. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10arm: remove prototype for reset_timer_maskedPatrick Delaunay
Remove prototype for function only used in one file Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10arm: remove prototype for arch_interrupt_initPatrick Delaunay
Remove prototype for no more existing function Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-10-10arm: K3: am654: Add support for getting boot modeAndrew F. Davis
Read the boot mode register to find the boot mode. Only use eMMC boot0 mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due to current conflating of boot mode and boot device), and not iff the boot device is MMC port 0. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-10-10arm: K3: am654: Choose MMC boot device based on boot portAndrew F. Davis
For most devices the boot mode maps directly to the boot device. For MMC this is not the case as we have two MMC boot modes and two MMC boot devices (ports). Check the boot port to determine which MMC device was our boot device. Make this change for both primary and secondary boot modes. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-10-10gpio: da8xx: Push generic defines of gpio.h out of mach-davinciKeerthy
Push generic defines of gpio.h out of mach-davinci to drivers/gpio now that non-davinci architectures are beginning to use this IP. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Fix calimain build] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-10-10ARM: meson: Add Khadas VIM2 board supportLoic Devulder
This adds platform code for the Khadas VIM2 board based on a Meson GXM (S912) SoC with the Meson GXM configuration. This initial submission supports UART, MMC/SDCard and Ethernet. USB is partially supported. All the code is from Neil Armstrong! I just rebased the code, do some cleanup and tested on my board. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Loic Devulder <ldevulder@suse.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-10-10ARM: meson: Add Khadas VIM2 board DTLoic Devulder
This adds Device Tree for the Khadas VIM2 board. The meson-gxm-khadas-vim2.dts is synchronized from Linux 4.18.10. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Loic Devulder <ldevulder@suse.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com>
2018-10-10ARM: dts: stm32mp1: Add usbotg_hs regulator for stm32mp157c-ev1Patrice Chotard
Add usbotg_hs regulator to allow to use the USB mass-storage feature on OTG usb port. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-10-10test: eth: Add a test for the target being pingedJoe Hershberger
The target will respond to pings while doing other network handling. Make sure that the response happens and is correct. This currently corrupts the ongoing operation of the device if it happens to be awaiting an ARP reply of its own to whatever serverip it is attempting to communicate with. In the test, add an expectation that the user operation (ping, in this case) will fail. A later patch will address this problem. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10test: eth: Add a test for ARP requestsJoe Hershberger
This tests that ARP requests made to this target's IP address are responded-to by the target when it is doing other networking operations. This currently corrupts the ongoing operation of the device if it happens to be awaiting an ARP reply of its own to whatever serverip it is attempting to communicate with. In the test, add an expectation that the user operation (ping, in this case) will fail. A later patch will address this problem. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10net: sandbox: Add a priv ptr for tests to useJoe Hershberger
Tests need to be able to pass their "unit test state" to the handlers where asserts are evaluated. Add a function that allows the tests to set this private data on the sandbox eth device. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10net: sandbox: Allow fake eth to handle more than 1 packet responseJoe Hershberger
Use up to the max allocated receive buffers so as to be able to test more complex situations. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10net: sandbox: Share the priv structure with testsJoe Hershberger
If tests want to implement tx handlers, they will likely need access to the details in the priv structure. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10net: sandbox: Make the fake eth driver response configurableJoe Hershberger
Make the send handler registerable so tests can check for different things. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10net: sandbox: Refactor sandbox send functionJoe Hershberger
Make the behavior of the send function reusable. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-10sunxi: fix DRAM gate/reset sequence of H6Icenowy Zheng
Currently the DRAM bus gate and reset is changed at the same time in H6 DRAM initialization code, which disobeys the user manual's programming guide. Fix the sequence by follow the sequence suggested by the user manual (ungate the bus clock after release the reset signal). By some experiments it seems to fix the DRAM size detection failure that rarely happens. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-10-09ARM: dts: rmobile: Reinstate missing CPLD on ULCBMarek Vasut
The CPLD is used to reset the ULCB and it was removed during DT sync with Linux 4.17. Reinstate it. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-10-09test: panel: Add a test for the panel uclassSimon Glass
At present this uclass has no tests. Add a simple one which checks the PWM configuration, regulator and GPIO. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09x86: Update mtrr functions to allow leaving cache aloneSimon Glass
At present the mtrr functions disable the cache before making changes and enable it again afterwards. This is fine in U-Boot, but does not work if running in CAR (such as we are in SPL). Update the functions so that the caller can request that caches be left alone. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-10-09dm: core: Update ofnode to read binman-style flash entrySimon Glass
At present ofnode_read_fmap_entry() reads a flash map entry in a format which is not supported by binman. To allow use to use binman-format descriptions, update this function. Also add a simple test. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09sandbox: Restore blocking I/O on exitSimon Glass
At present sandbox sets non-blocking I/O as soon as any input is read from the terminal. However it does not restore the previous state on exit. Fix this and drop the old os_read_no_block() function. This means that we always enable blocking I/O in sandbox (if input is a terminal) whereas previously it would only happen on the first call to tstc() or getc(). However, the difference is likely not important. Signed-off-by: Simon Glass <sjg@chromium.org>
2018-10-09dm: spi: Clean up detection of sandbox SPI emulatorSimon Glass
Now that we don't have to deal with the command-line flag we can simplify the code for detecting the emulator. Remove the lookup based on the SPI specification, relying just on the device tree to locate the emulator. Signed-off-by: Simon Glass <sjg@chromium.org>