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2021-06-23Revert "powerpc: fix regression in arch_initr_trap()"Tom Rini
With the changes in commit 588efcdd72fc ("powerpc: Don't use relative include for config.h in global_data.h") fixing the root of the problem, we no longer need this re-inclusion. This reverts commit f6c0d365d3e8ee8e4fd3ebe2ed957c2bca9d3328. Cc: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-06-23powerpc: Don't use relative include for config.h in global_data.hTom Rini
As there is an arch/powerpc/include/asm/config.h file using "" to get config.h here can lead to using that rather than include/config.h. This in turn can lead to a mismatch in the size of gd. Cc: Matt Merhar <mattmerhar@protonmail.com> Signed-off-by: Tom Rini <trini@konsulko.com> Tested-by: Matt Merhar <mattmerhar@protonmail.com>
2021-06-18net: use the same alias stem for ethernet as linuxMichael Walle
Linux uses the prefix "ethernet" whereas u-boot uses "eth". This is from the linux tree: $ grep "eth[0-9].*=.*&" arch/**/*dts{,i}|wc -l 0 $ grep "ethernet[0-9].*=.*&" arch/**/*dts{,i}|wc -l 633 In u-boot device trees both prefixes are used. Until recently the only user of the ethernet alias was the sandbox test device tree. This changed with commit fc054d563bfb ("net: Introduce DSA class for Ethernet switches"). There, the MAC addresses are inherited based on the devices sequence IDs which is in turn given by the device tree. Before there are more users in u-boot and both worlds will differ even more, rename the alias prefix to "ethernet" to match the linux ones. Also adapt the test cases and rename any old aliases in the u-boot device trees. Cc: David Wu <david.wu@rock-chips.com> Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-17Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini
- fsl-qoriq: Bug fixes related pfe, eth, thermal node, vid.c, cpu release, mmc, usb, env, etc for Layerscape boards - powerpc: Update Maintainers for some boards.
2021-06-17Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini
- ae350 related dts fixes.
2021-06-17armv8: Update erratum number to align with docRan Wang
Change the USB erratum number A-050106 to A-050204 as A-050106 is a duplicate and never be published. Fixes 0cfa00cdb94 (“armv8: Add workaround for USB erratum A-050106”) Signed-off-by: Ran Wang <ran.wang_1@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17board: freescale: t208xrdb: add a config option for rev D dts fixupsCamelia Groza
Under DM, we rely on u-boot's device tree to provide the correct PHY addresses. The board_fix_fdt callback is intended to be used for device tree fixups before relocation. Unfortunately, this isn't an option when booting from flash since the device tree isn't writable before relocation. This patch introduces the CONFIG_T2080RDB_REV_D option to signal that a board revision D or up is the target. The config option is used to set the correct Aquantia PHY address in the board's u-boot device tree. Defconfig files with the option enable explicitly are added for convenience. Signed-off-by: Camelia Groza <camelia.groza@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17board/km: add support for expu1 design based on nxpAleksandar Gerasimovski
The EXPU1 design is a new 40G capable ethernet service unit card for Hitachi-Powergrids wired-com product lines. The base SoC is same as for already added SELI8 card, consequently the already added u-boot support for SELI8 is reused. Signed-off-by: Rainer Boschung <rainer.boschung@hitachi-powergrids.com> Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com> [Fixed new line error at EOF] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17arm: dts: ls1021a.dtsi: Fix invalid reg on gpio nodesLasse Klok Mikkelsen
Address and size cells on SOC are set to 1. But gpio nodes are specified with 2 cells. This fixes the gpio nodes to correct cells. Signed-off-by: Lasse Klok Mikkelsen <lkmi@prevas.dk> Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17arm: dts: lx2162aqds: support eMMC HS400 mode on esdhc1Yangbo Lu
Add properties related to eMMC HS400 mode for esdhc1. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: ls1012a: Pass PPFE firmware to Linux through FDTChaitanya Sakinam
Read Linux PPFE firmware from flash partition and pass it to Linux through FDT entry. So that we can avoid placing PPFE firmware in Linux rootfs. (FDT may increase at max by 64KB) Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Signed-off-by: Anji J <anji.jagarlmudi@nxp.com> Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: layerscape: enable eMMC HS400 workarounds for LX2160A/LX2162AYangbo Lu
Enable eMMC HS400 workarounds for LX2160A/LX2162A. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17armv8: layerscape: add PSCI support for cpu releaseJiafei Pan
For cpu release command, check whether PSCI is supported firstly, if supported, use PSCI to kick off secondary cores, otherwise still use spin table. Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com> [Fixed checkpatch alignment CHECKs] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-17riscv: andes_plic: Fix riscv_get_ipi() maskBin Meng
Current logic in riscv_get_ipi() for Andes PLICSW does not look correct. The mask to test IPI pending bits for a hart should be left shifted by (8 * gd->arch.boot_hart), just the same as what is done in riscv_send_ipi(). Fixes: 8b3e97badf97 ("riscv: add functions for reading the IPI status") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
2021-06-17riscv: ae350: dts: Add missing "u-boot, dm-spl" for SPL configBin Meng
At present the AE350 SPL defconfig is using OF_PRIOR_STAGE. The intention was to use gdb to load device tree before running U-Boot SPL/proper from RAM. When we switch to OF_SEPARATE we will have to use our own DT but without "u-boot,dm-spl" in several essential nodes, SPL does not boot. Let's add all the required "u-boot,dm-spl" for SPL config. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-06-17riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bitBin Meng
All the device nodes that refer to plic0 as their interrupt parent have 2 cells encoded in their interrupts property, but plic0 only provides 1 cell in #interrupt-cells which is incorrect. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-06-17riscv: ae350: dts: Remove the unnecessary #address-cells in plic nodesBin Meng
PLIC nodes don't have child nodes, so #address-cells is not needed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-06-17riscv: ae350: dts: Remove the unnecessary space in bootargsBin Meng
There are two spaces before "debug' in bootargs. Drop one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2021-06-17riscv: ae350: dts: Add SPDX license headerBin Meng
The SPDX license header is currently missing. Add one. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-06-16Merge tag 'u-boot-imx-20210616' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210616 ------------------- - imxrt : fixes, USB, imxrt1020-evk - imx8m: fix for verdin-imx8mm Add conga-QMX8 board - imx6 : documentation for pico-imx6: Add SeeedStudio NPI-IMX6ULL Support ventana: DM PCI - imx7d: added SMEGW01 board CI : https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/7765
2021-06-16board: sl28: fix RGMII clock and voltageMichael Walle
It was noticed that the clock isn't continuously enabled when there is no link. This is because the 125MHz clock is derived from the internal PLL which seems to go into some kind of power-down mode every once in a while. The LS1028A expects a contiuous clock. Thus enable the PLL all the time. Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO regulator. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-06-11Merge tag 'xilinx-for-v2021.07-rc5' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.07-rc5 zynqmp: - Fix ANALOG_BUS value after powerup - Disable EFI_CAPSULE_ON_DISK_EARLY zynqmp-gqspi: - Fix write issue
2021-06-11arm64: zynqmp: Writing correct value to ANALOG_BUSAdrian Fiergolski
The default register configuration after powerup for PSSYSMON_ANALOG_BUS register is incorrect. Hence, fix this in SPL by writing correct fixed value. It follows UG1085 chapter 'PS SYSMON Analog_Bus' and reflects commit sw_apps:zynq ("056ca65d44549ce27f716d423e8dfdefeee7440c") in Xilinx:embeddedsw[1]. [1] https://github.com/Xilinx/embeddedsw Signed-off-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-06-10arm: mvebu: dts: turris_mox: add nodes for SPI NOR partitionsMarek Behún
Add nodes for SPI NOR partitions to the device tree of Turris MOX, as are in Linux' device tree. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-10arm: mvebu: dts: turris_mox: add button and LED nodesMarek Behún
Add nodes for indicator LED and reset button so that board code can implement board factory reset mechanism. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-09mx7d: Add Storopack's SMEGW01 boardFabio Estevam
Add support for Storopack's SMEGW01 board, which is an IoT gateway based on the i.MX7D SoC. Based on the original U-Boot work done by Phytec. Signed-off-by: Fabio Estevam <festevam@denx.de>
2021-06-09imx: Add SeeedStudio NPI-IMX6ULL SupportNavin Sankar Velliangiri
CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz) CPU: Industrial temperature grade (-40C to 105C) at 49C Reset cause: POR Model: Seeed NPi iMX6ULL Dev Board with NAND Board: Seeed NPi i.MX6ULL Dev Board DRAM: 512 MiB NAND: 512 MiB MMC: FSL_SDHC: 0 In: serial@2020000 Out: serial@2020000 Err: serial@2020000 Net: FEC0 Working: - Eth0 - MMC/SD - NAND - UART 1 - USB host Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com> Note: Changes in v2: * removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file. * Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
2021-06-09imx: support for conga-QMX8 boardOliver Graute
Add i.MX8QM qmx8 congatec board support U-Boot 2021.07-rc3-00528-gc9a966d9dd (May 31 2021 - 15:21:25 +0200) CPU: NXP i.MX8QM RevB A53 at 1200 MHz Model: Congatec QMX8 Qseven series Board: conga-QMX8 Build: SCFW 494c97f3, SECO-FW d63fdb21, ATF 09c5cc9 Boot: SD2 DRAM: 6 GiB MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial@5a060000 Out: serial@5a060000 Err: serial@5a060000 switch to partitions #0, OK mmc2 is current device Net: Error: ethernet@5b040000 address not set. No ethernet found. Hit any key to stop autoboot: 0 Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2021-06-09arm: imx: imx8mm: correct unrecognized fracpll frequencyAndrey Zhizhikin
Frequency requested by ddrphy_init_set_dfi_clk from fracpll uses MHZ() macro, which expands the value provided to the Hz range without taking into account the precise Hz setting. This causes the frequency of 266 MHz not ot be found in the imx8mm_fracpll_tbl, since it is entered there with a precise Hz value. This in turn causes the boot hang in SPL, as proper DDR fracpll frequency cannot be determined. Correct the value in imx8mm_fracpll_tbl to match the one expanded by MHZ(266) macro, rounding it down to MHz range only. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Fixes: 825ab6b406 ("driver: ddr: Refine the ddr init driver on imx8m") Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09imx: ventana: enable dm support for PCI and FEC ethernetTim Harvey
Enable driver model support for FEC ethernet which allows us to remove the iomux and board_eth_init function. Replace the toggling of the ethernet phy reset with dt configuration. Enable driver model support for PCI which allows us to remove the eth1000_initialize() call. Additionally enable PCI_INIT_R to scan for PCI devices on init such as the e1000 that is present on the GW552x. Convert board_pci_fixup to use dm callback and remove pcidisable env variable which is not supported for DM_PCI and thus leave PCI always enabled during init. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-06-09arm: imx: imx8mm: clock: make debug output more descriptiveAndrey Zhizhikin
Clock initialization functionality has ambitious debug messages, which are printed out when failures are triggered during execution: - Separate frequency table lookup functions have the the same output that makes it impossible to understand which function failed and produced the output - PLL decoding routine has a generic debug statement printed, which does not state the actual value failed to be found Extend the output for both cases with prefixing table lookup functions output with function name, and report the failed value in PLL decoding routine. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09Add EV-iMX280-NANO-X-MB boardOleh Kravchenko
A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09Add out4.ru O4-iMX-NANO boardOleh Kravchenko
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09ARM: dts: imxrt1050-evk: enable usbotg1 node as hostGiulio Benetti
Enable usbotg1 port node as host usb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodesGiulio Benetti
Usb is now supported so add all required nodes for it in imxrt1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09usb: ehci-mx6: add support for i.MXRTGiulio Benetti
Add support for usb1 and usb2 present on i.IMXRT. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()Giulio Benetti
We need those macros to instruct drivers on how to behave for SoC specific quirks, so let's add it as done for other i.MX SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpio5 node to this SoCGiulio Benetti
i.MXRT1020 supports gpio5, so let's add a node for it. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to ↵Giulio Benetti
imxrt1020-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1020-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to ↵Giulio Benetti
imxrt1050-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1050-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: remove u-boot,dm-splGiulio Benetti
We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driverGiulio Benetti
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to lcdif node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: move lcdif assigned clock to dtsiGiulio Benetti
Since we assume pll5 is the default lcdif clock source let's move assigned-clocks(-parents) properties to .dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: add device_type = "memory" to memory nodeGiulio Benetti
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPLGiulio Benetti
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-bootGiulio Benetti
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: enable gpt1 timerGiulio Benetti
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add gpt1 nodeGiulio Benetti
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add node label to oscGiulio Benetti
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: add device_type = "memory" to memory nodeGiulio Benetti
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
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