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path: root/arch/riscv/lib/andes_plic.c
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2019-09-03riscv: andes_plic: init plic by scanning each cpu nodeRick Chen
Initialize plic driver by ofnode_for_each_subnode() instead of cpu_get_count(). This way can support to skip some harts which maybe marked as unavailable, but the cpu node exists indeed. Signed-off-by: Rick Chen <rick@andestech.com> Cc: KC Lin <kclin@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-04-08riscv: Add a SYSCON driver for Andestech's PLICRick Chen
The Platform-Level Interrupt Controller (PLIC) block holds memory-mapped claim and pending registers associated with software interrupt. It is required for handling IPI. Signed-off-by: Rick Chen <rick@andestech.com> Cc: Greentime Hu <greentime@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>