Age | Commit message (Expand) | Author |
---|---|---|
2021-06-17 | k210: dts: Set PLL1 to the same rate as PLL0 | Sean Anderson |
2021-05-14 | riscv: Don't reserve AI ram in k210 dts | Sean Anderson |
2021-05-14 | riscv: k210: Use AI as the parent clock of aisram, not PLL1 | Sean Anderson |
2021-05-14 | riscv: k210: Rename airam to aisram | Sean Anderson |
2021-05-14 | riscv: Enable some devices pre-relocation | Sean Anderson |
2021-04-08 | riscv: Add watchdog bindings for the k210 | Sean Anderson |
2020-12-18 | riscv: Add device tree bindings for SPI | Sean Anderson |
2020-12-18 | spi: dw: Add SoC-specific compatible strings | Sean Anderson |
2020-10-26 | riscv: k210: Reduce DMA block size | Sean Anderson |
2020-10-08 | riscv: Add pinmux and gpio bindings for Kendryte K210 | Sean Anderson |
2020-09-30 | riscv: Update Kendryte device tree for new CLINT driver | Sean Anderson |
2020-07-01 | riscv: Add device tree for K210 and Sipeed Maix BitM | Sean Anderson |