u-boot-toradex.git - U-Boot bootloader for Apalis and Colibri modules

Age	Commit message (Expand)	Author
2021-12-02	riscv: Enable SPI flash env for SiFive Unmatched.	Thomas Skibo
2021-10-18	riscv: Remove OF_PRIOR_STAGE from RISC-V boards	Ilias Apalodimas
2021-10-07	riscv: ae350: enable Coherence Manager for ae350	Leo Yu-Chi Liang
2021-10-07	sysreset: provide SBI based sysreset driver	Heinrich Schuchardt
2021-09-07	board: sifive: use ccache driver instead of helper function	Zong Li
2021-08-17	riscv: cpu: fu740: Fix typo of date	Zong Li
2021-07-28	i2c: Rename SPL/TPL_I2C_SUPPORT to I2C	Simon Glass
2021-07-06	riscv: sifive: fu740: Support i2c in spl	Zong Li
2021-07-06	riscv: sifive: fu740: kconfig: Enable support for Opencores I2C controller	Zong Li
2021-05-31	riscv: cpu: fu740: clear feature disable CSR	Green Wan
2021-05-31	drivers: clk: add fu740 support	Green Wan
2021-05-31	riscv: cpu: fu740: Add support for cpu fu740	Green Wan
2021-05-24	treewide: Convert macro and uses of __section(foo) to __section("foo")	Marek Behún
2021-05-19	riscv: qemu: Switch to use binman to generate u-boot.itb	Bin Meng
2021-05-17	riscv: Split SiFive CLINT support between SPL and U-Boot proper	Bin Meng
2021-05-14	Revert "riscv: cpu: fu740: clear feature disable CSR"	Bin Meng
2021-05-05	riscv: cpu: fu740: clear feature disable CSR	Green Wan
2021-05-05	riscv: cpu: Add callback to init each core	Green Wan
2021-03-27	cpu: Rename SPL_CPU_SUPPORT to SPL_CPU	Simon Glass
2021-02-15	Merge branch '2021-02-02-drop-asm_global_data-when-unused'	Tom Rini
2021-02-03	riscv: Adjust board_get_usable_ram_top() for 32-bit	Bin Meng
2021-02-02	common: Drop asm/global_data.h from common header	Simon Glass
2020-12-14	riscv: fix the wrong swap value register	Brad Kim
2020-11-28	riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller	Pragnesh Patel
2020-10-26	timer: Add _TIMER suffix to Andes PLMT Kconfig	Sean Anderson
2020-09-30	riscv: Add some comments to start.S	Sean Anderson
2020-09-30	riscv: Ensure gp is NULL or points to valid data	Sean Anderson
2020-09-30	riscv: Consolidate fences into AMOs for available_harts_lock	Sean Anderson
2020-09-30	riscv: Clear pending IPIs on initialization	Sean Anderson
2020-09-30	Revert "riscv: Clear pending interrupts before enabling IPIs"	Sean Anderson
2020-09-30	riscv: Rework riscv timer driver to only support S-mode	Sean Anderson
2020-08-25	riscv: fu540: Use correct API to get L2 cache controller base address	Bin Meng
2020-08-14	riscv: sifive: fu540: redundant initialization	Heinrich Schuchardt
2020-08-14	riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level	Bin Meng
2020-08-14	riscv: sifive/fu540: spl: Rename soc_spl_init()	Bin Meng
2020-07-24	riscv: Fix linking error when building u-boot-spl with no SMP support	Leo Yu-Chi Liang
2020-07-24	env: Enable SPI flash env for SiFive FU540	Jagan Teki
2020-07-24	riscv: Make SiFive HiFive Unleashed board boot again	Bin Meng
2020-07-06	Merge branch 'next'	Tom Rini
2020-07-03	riscv: sifive: fu540: enable all cache ways from U-Boot proper	Pragnesh Patel
2020-07-01	riscv: Add option to support RISC-V privileged spec 1.9	Sean Anderson
2020-07-01	riscv: Clean up IPI initialization code	Sean Anderson
2020-07-01	riscv: Clear pending interrupts before enabling IPIs	Sean Anderson
2020-06-04	riscv: sifive: fu540: add SPL configuration	Pragnesh Patel
2020-06-04	riscv: cpu: fu540: Add support for cpu fu540	Pragnesh Patel
2020-06-04	riscv: Add _image_binary_end for SPL	Pragnesh Patel
2020-05-18	common: Drop linux/bitops.h from common header	Simon Glass
2020-05-18	common: Drop init.h from common header	Simon Glass
2020-05-18	common: Drop net.h from common header	Simon Glass
2020-04-23	riscv: Provide a mechanism to fix DT for reserved memory	Atish Patra