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path: root/arch/powerpc/cpu/mpc8xxx/ddr
AgeCommit message (Expand)Author
2013-05-24powerpc/mpc8xxx: Allow DDR overclockYork Sun
2013-05-14powerpc/mpc8xxx: Allow board file to override DDR address assignmentYork Sun
2013-05-14powerpc/mpc8xxx: Fix DDR 3-way interleavingYork Sun
2013-01-30mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUEAnatolij Gustschin
2013-01-30powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commandsJames Yang
2013-01-30Add copy command to FSL DDR interactiveJames Yang
2013-01-30Fix data stage name matching issueJames Yang
2013-01-30Move DDR command parsing to separate functionJames Yang
2013-01-30powerpc/mpc8xxx: Enable entering DDR debugging by key pressYork Sun
2012-11-278xxx: Change all 8*xx_DDR addresses to 8xxxAndy Fleming
2012-11-04arch/powerpc/cpu/mpc8xxx/: sparse fixesKim Phillips
2012-10-22powerpc/mpc8xxx: Fix DDR SPD failed messageYork Sun
2012-10-22powerpc/mpc8xxx: Add auto select bank interleaving modeYork Sun
2012-10-22powerpc/mpc85xx: software workaround for DDR erratum A-004468York Sun
2012-10-22powerpc/mpc8xxx: Fix DDR initialization waiting for D_INITYork Sun
2012-10-22powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculationYork Sun
2012-10-22powerpc/mpc8xxx: Update DDR registersYork Sun
2012-08-23powerpc/mpc8xxx: Move HWCONFIG_BUFFER_SIZE into config.hYork Sun
2012-08-23powerpc/mpc8xxx DDR: Fix interactive DDR debuggingYork Sun
2012-08-23powerpc/mpc8xxx DDR: Fall back to raw timing for first controller onlyYork Sun
2012-08-23powerpc/mpc8xxx DDR: Fix CAS latency calculationYork Sun
2012-08-23powerpc/mpc8xxx: Fix bug for extended DDR timingYork Sun
2012-08-23powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleavingYork Sun
2012-08-23powerpc/mpc8xxx: Add support for cas latency 12 and aboveYork Sun
2012-08-23powerpc/mpc8xxx: Add fine timing support for DDR3York Sun
2012-08-08powerpc/ddr: fix fsl_ddr_get_dimm_params compile errorShaohui Xie
2011-11-29arch/powerpc/cpu/mpc8xxx/ddr/interactive.c: Fix GCC 4.6 build warningKumar Gala
2011-11-29mpc8xxx: update module_type values from JEDEC DDR3 SPD SpecificationIra W. Snyder
2011-11-11arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warningKumar Gala
2011-11-11arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warningKumar Gala
2011-10-27GCC4.6: Squash warnings in ddr[123]_dimm_params.cMarek Vasut
2011-10-09powerpc/8xxx: Add support for interactive DDR programming interfaceYork Sun
2011-09-29powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driverYork Sun
2011-09-29powerpc/mpc8xxx: Add DDR2 to unified DDR driverYork Sun
2011-09-29powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()York Sun
2011-09-29powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slotsYork Sun
2011-09-29powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_enYork Sun
2011-09-29powerpc/mpc8xxx: Move DDR RCW overriding to common codeYork Sun
2011-09-29powerpc/mpc8xxx: Extend CWL tableYork Sun
2011-07-11powerpc/mpc8xxx: Allow override DDR read-to-write turnaround timeYork Sun
2011-07-11powerpc/mpc8xxx: fix DDR data width checkingYork Sun
2011-07-11powerpc/mpc8xxx: Adding fallback to raw timing on supported boardsYork Sun
2011-07-11powerpc/mpc8xxx: Enable calculation for fixed DDR chipsYork Sun
2011-07-11powerpc/mpc8xxx: Add 16-bit support for DDR3York Sun
2011-07-11powerpc/mpc8xxx: check SPD length before using part numberYork Sun
2011-07-11powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram widthYork Sun
2011-05-13powerpc/mpc8xxx: reword max tCKmin messageYork Sun
2011-04-29fsl-ddr: Fix mixed-case macro namesKyle Moffett
2011-04-04powerpc/8xxx: Fix typo for address hashing messageKumar Gala
2011-04-04mpc8xxx: DDR2/DDR3: Clean up DIMM-type switch statementsKyle Moffett
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