summaryrefslogtreecommitdiff
path: root/arch/mips
AgeCommit message (Collapse)Author
2022-01-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini
- fdt_support: Add fdt_for_each_node_by_compatible() helper macro (Marek) - turris_omnia: Fixup SATA or PCIe nodes at runtime in DT blob (Pali) - pci_mvebu: Add support for Kirkwood PCIe controllers (Pali) - SPL: More verifications for kwbimage in SPL (Pali) - mvebu: Remove comphy_update_map() (Pali) - Minor misc stuff
2022-01-20fdt_support: Add fdt_for_each_node_by_compatible() helper macroMarek Behún
Add macro fdt_for_each_node_by_compatible() to allow iterating over fdt nodes by compatible string. Convert various usages of off = fdt_node_offset_by_compatible(fdt, start, compat); while (off > 0) { code(); off = fdt_node_offset_by_compatible(fdt, off, compat); } and similar, to fdt_for_each_node_by_compatible(off, fdt, start, compat) code(); Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2022-01-19doc: replace @return by Return:Heinrich Schuchardt
Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2021-10-15Convert CONFIG_USB_EHCI_IS_TDI to KconfigMarek Behún
On mvebu this is defined if and only if !ARM64. Otherwise it is defined for boards with ARCH_MX23, ARCH_TEGRA and ARCH_ZYNQ, and also for SOC_AR934X (tplink_wdr4300). Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-09-30WS cleanup: remove SPACE(s) followed by TABWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-30WS cleanup: remove trailing empty linesWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2021-09-23arm: mediatek: merge board Kconfigs into mach-mediatekGuillaume La Roque
On MediaTek boards we cannot override the SYS_BOARD / SYS_CONFIG_NAME variables from defconfig. This is because in board/mediatek/mtXXXX/Kconfig this value was override by default due to the if CONFIG_TARGET_MTXXXX condition. Merge all the Kconfigs to the mach-medatek/Kconfig. This way: - we only define SYS_{SOC,VENDOR} once - all board definitions are in a single place, simplifying the build logic. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
2021-09-23lmb: Switch to generic arch_lmb_reserve_generic()Marek Vasut
Switch arc/arm/m68k/microblaze/mips/ppc arch_lmb_reserve() to arch_lmb_reserve_generic(). Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Angelo Dureghello <angelo@sysam.it> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Hai Pham <hai.pham.ud@renesas.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tom Rini <trini@konsulko.com> Cc: Wolfgang Denk <wd@denx.de>
2021-09-16Merge tag 'v2021.10-rc4' into nextTom Rini
Prepare v2021.10-rc4 Signed-off-by: Tom Rini <trini@konsulko.com> # gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT # gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C # gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate] # Conflicts: # board/Arcturus/ucp1020/spl.c # cmd/mvebu/Kconfig # common/Kconfig.boot # common/image-fit.c # configs/UCP1020_defconfig # configs/sifive_unmatched_defconfig # drivers/pci/Kconfig # include/configs/UCP1020.h # include/configs/sifive-unmatched.h # lib/Makefile # scripts/config_whitelist.txt
2021-09-13pci: Drop DM_PCISimon Glass
This option has not effect now. Drop it, using PCI instead where needed. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-04serial: Rename SERIAL_SUPPORT to SERIALSimon Glass
Rename these options so that CONFIG_IS_ENABLED can be used with them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-31Kconfig: Remove all default n/no optionsMichal Simek
default n/no doesn't need to be specified. It is default option anyway. Signed-off-by: Michal Simek <michal.simek@xilinx.com> [trini: Rework FSP_USE_UPD portion] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31Convert CONFIG_SKIP_LOWLEVEL_INIT et al to KconfigTom Rini
This converts the following to Kconfig: CONFIG_SKIP_LOWLEVEL_INIT CONFIG_SKIP_LOWLEVEL_INIT_ONLY In order to do this, we need to introduce SPL and TPL variants of these options so that we can clearly disable these options only in SPL in some cases, and both instances in other cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-31Finish converting CONFIG_SYS_CACHELINE_SIZE to KconfigTom Rini
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16. Introduce select statements for other architectures based on current usage. For MIPS, we take the existing arch-specific symbol and migrate to the generic symbol. This lets us remove a little bit of otherwise unused code. Cc: Alexey Brodkin <alexey.brodkin@synopsys.com> Cc: Anup Patel <anup.patel@wdc.com> Cc: Atish Patra <atish.patra@wdc.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Leo <ycliang@andestech.com> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <paul.walmsley@sifive.com> Cc: Sean Anderson <seanga2@gmail.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-18MIPS: malta: enable PCI driver modelDaniel Schwierzeck
Enable DM_PCI and DM_ETH on MIPS Malta. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-07-18MIPS: malta: add DT bindings for PCI host controllerDaniel Schwierzeck
Add DT binding for GT64120 and MSC01 PCI controllers. Only GT64120 is enabled by default to support Qemu. The MSC01 node will be dynamically enabled by Malta board code dependent on the plugged core card. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-05-25MIPS: remove deprecated qemu_mips boardDaniel Schwierzeck
Remove qemu_mips boards because DM migration doesn't make sense. The board support for qemu_mips is already marked as deprecated in Qemu in favour of the Malta board. Also qemu_mips support has been removed from Linux a long time ago. The official replacement is the Malta board. The same Malta U-Boot image can be used with Qemu and on physical hardware. All combinations of Big Endian and Little Endian as well as 32 bit and 64 bit are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-04-24Merge tag 'mips-pull-2021-04-24' of ↵Tom Rini
https://source.denx.de/u-boot/custodians/u-boot-mips - MIPS: octeon: fix minor bugs of initial merge - MIPS: octeon: add support for QLM and PCI-E controller - MIPS: octeon: add support for AHCI and SATA - MIPS: octeon: add E1000 ethernet support - MIPS: octeon: add Octeon III NIC23 board - ata/scsi: add support for Big Endian platforms
2021-04-23mips: octeon: ebb7304: Add support for some I2C devicesAaron Williams
This patch adds support for the following I2C devices connected to I2C bus 0 on the Octeon EBB7304: - Dallas DS1337 RTC - TLV EEPROM Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: dts/dtsi: Change UART DT node to use clocks propertyAaron Williams
We already have a clock driver for MIPS Octeon. This patch changes the Octeon DT nodes to supply the clock property via the clock driver instead of using an hard-coded value, which is not correct in all cases. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: Add Octeon III NIC23 board supportStefan Roese
This patch adds the basic support for the PCIe target board equipped with the Octeon III CN2350 SoC. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: mrvl, cn73xx.dtsi: Add AHCI/SATA DT nodeStefan Roese
Add the AHCI compatible SATA DT node to the Octeon CN73xx dtsi file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cpu.c: Enable AHCI/SATA supportStefan Roese
For easy AHCI/ SATA integration, this patch adds board_ahci_enable() for the MVEBU AHCI driver, which will be used by this platform. This platform specific "enable" function will setup the proper endian swapping in the AHCI controller so that it can be used by the common AHCI code. Additionally the endian swizzle entry for AHCI in octeon_should_swizzle_table[] is removed, as this enabled the original lowlevel code function, e.g. octeon_configure_qlm(), for the QLM setup to work correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cpu.c: Add arch_misc_init() for pci-console & pci-bootcmdStefan Roese
This patch adds the necessary platform infrastructure code, so that the MIPS Octeon drivers "serial_octeon_pcie_console" & "serial_bootcmd" can be used. This is e.g. the bootmem initialization in a compatible way to the Marvell 2013 U-Boot, so that the exisiting PC remote tools like "oct-remote-console" & "oct-remote-load" can be used. This is be done in the newly introduced arch_misc_init(), which calls the necessary init functions when enabled. These patches are in preparation for the MIPS Octeon NIC23 board support, which is a desktop PCIe target board enabling these features. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: cvmx-coremask.h: Fix cvmx_coremask_dprint() with DEBUG definedStefan Roese
As DEBUG is no Kconfig symbol, we can't use the IS_ENABLED() macros. This patch switches to the unfortunately necessary #ifdef usage again to make it work correctly. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: cvmx-bootmem: Fix compare in "if" statementStefan Roese
While porting from the Marvell source, I introduced a bug by misplacing the parenthesis. This patch fixes this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Move CVMX_SYNC from octeon_ddr.h to cvmx-regs.hStefan Roese
This makes is easier to use this macro from non-DDR related files. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: mrvl, cn73xx.dtsi: Add PCIe controller DT nodeStefan Roese
This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi file. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Kconfig: Enable CONFIG_SYS_PCI_64BITStefan Roese
Setting CONFIG_SYS_PCI_64BIT is needed for correct PCIe functionality on MIPS Octeon. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Makefile: Enable building of the newly added C filesStefan Roese
This patch adds the newly added C files to the Makefile to enable compilation. This is done in a separate step, to not introduce build breakage while adding the single files with potentially missing externals. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add octeon_qlm.cAaron Williams
Import octeon_qlm.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add octeon_fdt.cAaron Williams
Import octeon_fdt.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-qlm.cAaron Williams
Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-pcie.cAaron Williams
Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper.cAaron Williams
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper-util.cAaron Williams
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper-jtag.cAaron Williams
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper-fdt.cAaron Williams
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-helper-cfg.cAaron Williams
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Move cvmx-lmcx-defs.h from mach/cvmx to machStefan Roese
To match all other cvmx-* header, this patch moves the already existing cvmx-lmcx-defs.h header one directory up. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Misc changes required because of the newly added headersStefan Roese
With the newly added headers and their restructuring (which macro is defined where), some changes in the already existing Octeon files are necessary. This patch makes the necessary changes. Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add misc remaining header filesAaron Williams
Import misc remaining header files from 2013 U-Boot. These will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-04-23mips: octeon: Add cvmx-sso-defs.h header fileAaron Williams
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sriox-defs.h header fileAaron Williams
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sriomaintx-defs.h header fileAaron Williams
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-smix-defs.h header fileAaron Williams
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sli-defs.h header fileAaron Williams
Import cvmx-sli-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-04-23mips: octeon: Add cvmx-sata-defs.h header fileAaron Williams
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used by the later added drivers to support PCIe and networking on the MIPS Octeon II / III platforms. Signed-off-by: Aaron Williams <awilliams@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>