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2016-05-21mips: ath79: Add AR934x supportMarek Vasut
Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Add support for ungating ethernet on ar933x and ar934xMarek Vasut
Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: dts: Add ethernet MAC nodes for ar933xMarek Vasut
Add node for both ethernet controllers in the ar933x. The PHY is attached only to the first ethernet controller. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Add support for ungating USB on ar933x and ar934xMarek Vasut
Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: dts: Add generic-ehci nodeMarek Vasut
Add generic EHCI node for the ChipIdea EHCI controller in the ath79. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Fix compiler warning on const assignmentMarek Vasut
The assignment const T var; var = value; is illegal, since var is constant. Drop the const to fix the compiler warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: Fix ar71xx_regs.h indentMarek Vasut
The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
2016-05-21mips: Add MIPS 74Kc tuneMarek Vasut
Add MIPS 74Kc tune Kconfig option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21mips: Fix compiler warning in cpu.cMarek Vasut
There really is zero reason for including netdev.h in generic mips CPU code. Removing the netdev.h from cpu.c also fixes the following compiler warning: In file included from arch/mips/cpu/cpu.c:10:0: include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default] int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); ^ include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21ath79: add readonly attribute for ath79_soc_descWills Wang
use 'const' keywork to qualify readonly attribute for lookup-table member Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21ath79: ar933x: use BIT macro for bit shift operationWills Wang
used a uniform BIT macro for register bit-field shift Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: add AP143 reference boardWills Wang
This patch add board-level code and base DT for AP143. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21mips: ath79: add AP121 reference boardWills Wang
This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-05-21mips: ath79: add support for QCA953x SOCsWills Wang
This patch enable work for qca953x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21mips: ath79: add support for AR933x SOCsWills Wang
This patch enable work for ar933x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-21mips: add base support for QCA/Atheros ath79 SOCsWills Wang
This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
2016-05-05Fix various typos, scattered over the code.Robert P. J. Day
Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
2016-04-19MIPS: bootm: Add fixup of '/memory' node.Purna Chandra Mandal
MIPS arch do not update 'reg' property of /memory node. As a result Linux bootup will not work unless board.dts file contains right /memory offset-size information or board implements required memory fixup. Fixing by renaming (unused) _arch_fixup_memory_node_ to _arch_fixup_fdt_ in arch/mips/lib/bootm.c inline with ARM arch. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-04-10board: pic32mzda: enable USB-host, USB-storage support.Purna Chandra Mandal
Enable MUSB host and USB storage support for Microchip PIC32MZ[DA] Starter Kit. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-03-09MIPS: fix mips_cache fallback without __builtin_mips_cacheMatthias Schiffer
The "R" constraint supplies the address of an variable in a register. Use "r" instead and adjust asm to supply the content of addr in a register instead. Fixes: 2b8bcc5a ("MIPS: avoid .set ISA for cache operations") Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-06Use correct spelling of "U-Boot"Bin Meng
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
2016-02-01board: Enable ethernet, tftpboot support to pic32mzdask board.Purna Chandra Mandal
This adds ethernet, TFTP support for PIC32MZ[DA] Starter Kit. Also custom environment variables/scripts are added to help boot from network. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-02-01board: add SDHCI support for PIC32MZDASK board.Purna Chandra Mandal
Enable MMC, SDHCI, FAT_FS support for PIC32MZ[DA] StarterKit. Also add custom scripts, rules to boot Linux from microSD card. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-02-01board: Add Microchip PIC32MZ[DA]-Starter-Kit board.Purna Chandra Mandal
This adds support for Microchip PIC32MZ[DA] StarterKit board based on a PIC32MZ[DA] family of microcontroller. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01MIPS: Add support for Microchip PIC32MZ[DA] SoC family.Purna Chandra Mandal
Add Microchip PIC32MZ[DA] SoC family support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.Purna Chandra Mandal
This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module. DDR2 controller operates in half-rate mode (upto 533MHZ frequency). Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-02-01MIPS: initial infrastructure for Microchip PIC32 architecturePurna Chandra Mandal
Create initial directory, Kconfigs needed for PIC32 architecture support. Also add PIC32 specific register definition required for drivers. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-02-01MIPS: Support dynamic I/O port base addressPaul Burton
The existing mips_io_port_base variable isn't suitable for use early during boot since it will be stored in the .data section which may not be writable pre-relocation. Fix this by moving the I/O port base address into struct arch_global_data. In order to avoid adding this field for all targets, make this dependant upon a new Kconfig entry CONFIG_DYNAMIC_IO_PORT_BASE. Malta is the only board which sets a non-zero I/O port base, so select this option only for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-02-01MIPS: Remove SLOW_DOWN_IOPaul Burton
CONF_SLOWDOWN_IO is never set for any target, so remove the dead code in the SLOW_DOWN_IO macro. This is done in preparation for changes to mips_io_port_base which can be avoided in this path by removing it entirely. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2016-02-01mips: cache: Bulletproof the code against cornercasesMarek Vasut
This patch makes sure that the flush/invalidate_dcache_range() functions can handle corner-case calls like this -- invalidate_dcache_range(0, 0, 0); This call is valid and is happily produced by USB EHCI code for example. The expected behavior of the cache function(s) in this case is that they will do no operation, since the size is zero. The current implementation though has a problem where such invocation will result in a hard CPU hang. This is because under such conditions, where the start_addr = 0 and stop = 0, the addr = 0 and aend = 0xffffffe0 . The loop will then try to iterate over the entire address space, which in itself is wrong. But iterating over the entire address space might also hit some odd address which will cause bus hang. The later happens on the Atheros MIPS. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com>
2016-02-01MIPS: start.S: fix and optimize instructionsDaniel Schwierzeck
Fix 32 vs 64 bit load/store instructions. Access CP0_WATCHHI as 32 Bit register. Use 64 Bit register access for clearing gd_data and copying U-Boot. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-02-01MIPS: initialize board_init_f() argument to zero.Purna Chandra Mandal
Argument boot_flags of board_init_f() should be set to 0 as $a0 may be utilized in lowlevel_init() or mips_cache_reset() or previous stage boot-loader. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-25mips: asm/io.h: Add in <linux/bug.h>Tom Rini
As part of the bug.h / BUILD_BUG_* clean up, this file was missed. Signed-off-by: Tom Rini <trini@konsulko.com>
2016-01-16MIPS: implement bit manipulating I/O accessorsDaniel Schwierzeck
Add support for functions clrbits_X(), setbits_X() and clrsetbits_X() on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: fix SPDX license identifier in remaining arch header filesDaniel Schwierzeck
Add a SPDX license identifier to MIPS header files where it is still missing. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck
Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: sync I/O related header files with linux-4.4Daniel Schwierzeck
Mainly sync asm/io.h to get a working ioremap() implementation as well as the full set of I/O accessors. Pull in additional header files to make this work. Furthermore port over the directory 'arch/mips/include/asm/mach-generic/' with contains default definitions for I/O and memory spaces and default implementations for mapping those spaces. All files in that directory can be overwritten by a SoC/machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFTDaniel Schwierzeck
Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: Kconfig: optimize gcc -march and -mtune setupDaniel Schwierzeck
Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: au1x00: move SoC header files to arch/mips/mach-au1x00/include/mach/Daniel Schwierzeck
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: Kconfig: refactor machine setupDaniel Schwierzeck
Refactor machine setup like it is done on ARM. While on it, also support "include <mach/file.h" for machine specific header files. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: add initial infrastructure for device-tree filesDaniel Schwierzeck
Prepare sub-folder for device-tree files. Make support for device-tree on MIPS available in Kbuild/Kconfig. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
2016-01-16MIPS: do not build position-independent executables for SPLDaniel Schwierzeck
SPL binaries are usually linked to a fixed address in SRAM. Furthermore SPL binaries do not need to relocate itself. Thus do not build them as position-independent binaries which helps to largely reduce the size of SPL binaries. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: create .text sub-sections for assembler functionsDaniel Schwierzeck
Put all functions coded in assembly in sub-sections of section .text. This allows the linker to garbage collect unused assembly functions too. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: fix annotation of _start and relocate_codeDaniel Schwierzeck
Correctly annotate _start and relocate_code as functions to produce more readable disassembly code generated by objdump. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2016-01-16MIPS: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO.Purna Chandra Mandal
With CONFIG_CMD_GPIO compilation reports error. common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-01-14Fix GCC format-security errors and convert sprintfs.Ben Whitten
With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-06Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini
2015-11-06MIPS: bootm: use CONFIG_IS_ENABLED() everywhereDaniel Schwierzeck
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-06MIPS: bootm: rework and fix broken bootm codeDaniel Schwierzeck
The move to 'generic board' as well as changes in the generic bootm code broke the boot of FIT uImage's. Especially uImage's with additional initramfs images or FDT's do not work anymore. Refactor the bootm code to work again with the generic bootm code. Always relocate ramdisk and FDT in step 'bootm prep' because the generic bootm code does this only for legacy uImage's. Move the step 'bootm cmdline' to 'bootm prep' because the Linux kernel parameters rd_start and rd_size have to be initialized after the relocation of the ramdisk. Furthermore support the step 'bootm fake'. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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