u-boot-toradex.git - U-Boot bootloader for Apalis and Colibri modules

Age	Commit message (Collapse)	Author
2019-02-14	arm64: versal: Move IOU_SWITCH_DIVISOR0 to Kconfig	Michal Simek
	Move hardcoded IOU_SWITCH_DIVISOR0 to Kconfig to be able to set it up for different platforms. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-02-14	arm64: versal: Add new Kconfig SYS_MEM_RSVD_FOR_MMU	Siva Durga Prasad Paladugu
	This patch adds new config option which is used for reserving a specific memory for MMU Table and in this case we are using TCM for that purpose. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16	arm64: versal: Add Xilinx Versal Virtual QEMU board	Michal Simek
	Virtual QEMU board is generating DTB self and putting it to VERSAL_QEMU_DTB_ADDR address. Board is using CONFIG_OF_BOARD which ensures that u-boot is aligned with board created by QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-10-16	arm64: versal: Add support for new Xilinx Versal ACAPs	Michal Simek
	Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex™-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. The patch is adding necessary infrastructure in place without enabling platform which is done in separate patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>