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path: root/arch/arm/mach-imx/mx7ulp/Kconfig
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2022-04-06LFU-278-5 imx: Enable FSL_BLOB by defaultYe Li
To align with NXP v2021.04 u-boot, enable the FSL_BLOB to do blob encap/decap with FSL_CAAM enabled Signed-off-by: Ye Li <ye.li@nxp.com>
2022-04-06MLK-23574-49 mx7ulp_val: Add 10x10 and 14x14 validation board supportYe Li
Porting the iMX7ULP 10x10 validation board and 14x14 validation board codes from v2019.04 u-boot. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit ec3686f915d0abcc3b1e8f06f288ebf4b249366a) (cherry picked from commit fd016db05902e9dfe30bac2ca808fe29369e2fa9) (cherry picked from commit f0ae5a8270206fc25b876e8279fca118ace0940e)
2022-04-06MLK-13450-7 mx7ulp: Add M4 core boot support when using single boot modeYe Li
The single boot mode in MX7ULP will only boot up A7, the M4 is running in ROM by checking entry from SIM0 GP register. In this patch, We bind M4 image with u-boot.bin by allocating a section for m4 image. So the whole image (included M4 image) will be loaded by A7 ROM into DDR. Then when u-boot is up, it will try to load M4 image into TCML and boot it there. Since M4 image will not be relocated in u-boot codes, we must load it during board_f. Current implementation put it in arch_cpu_init to get M4 booted as quick as possible. We requires the M4 image with IVT head and padding embedded, not a RAW binary. The image should be same as what is used for M4 QSPI boot in dual boot mode. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 04163dbd4f6190f310fff17b53b4bc7b8370ba89) (cherry picked from commit 81b5ea14493ef25a6cca22bc5651ec3e93e941f3) (cherry picked from commit 1e4414da2e9a671896af1af887ab710489a2007e) (cherry picked from commit b3a50e57aafe2830388d1295a8583c4e2515594b) (cherry picked from commit 2b9416b3dcd0eb85504aece94a603dc9aca6021e) (cherry picked from commit aadc312ee92c6f6ab2c427ca5eec2a7a02281e50) (cherry picked from commit ea47cbf5a8693a2e111f812d2b48be9703a489ec) (cherry picked from commit 87e18382c6e14ffe038a91e13f7c6e04694f60de)
2022-04-06i.MX7ULP: Enable Job ring driver model.Gaurav Jain
added crypto node in device tree. sec is initialized based on job ring information processed from device tree. Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2022-02-05mx7ulp_com: add support for SPLRicardo Salveti
Add EA iMX7ULP COM board support for building SPL. Signed-off-by: Ricardo Salveti <ricardo@foundries.io> Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
2022-02-05mx7ulp: select soc featuresOleksandr Suvorov
Force selecting features present in SoC i.MX7ULP. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-04-08caam: enable support for iMX7ULPFranck LENORMAND
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-01-07mx7ulp: Add support for Embedded Artists COM boardFabio Estevam
The Embedded Artists COM board is based on NXP i.MX7ULP. It has a BD70528 PMIC from Rohm with discrete DCDC powering option and improved current observability (compared to the existing NXP i.MX7ULP EVK). Add the initial support for the board. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-12-06mx7ulp: Introduce the CONFIG_LDO_ENABLED_MODE optionFabio Estevam
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards designed to operate with LDO enabled mode can work with 0.95V at LDO output in RUN mode as per the datasheet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-10-08i.MX7ULP: Add CONFIG_MX7ULP to kconfigYe Li
Since many drivers need this CONFIG_MX7ULP to distiguish the settings for i.MX7ULP only. Add this entry to cpu's kconfig. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-04-28arm: move SYS_ARCH_TIMER to KConfigAndre Przywara
SYS_ARCH_TIMER guards the usage of the ARM Generic Timer (aka arch timer) in U-Boot. At the moment it is mandatory for ARMv8 and used by a few ARMv7 boards. Add a proper Kconfig symbol to express this dependency properly, allowing certain board configuration to later disable arch timer in case there are any problems with it. Signed-off-by: Andre Przywara <andre.przywara@arm.com> [tuomas: rebase + fix conflicts and resync with moveconfig & use select] Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2017-07-12imx: reorganize IMX code as other SOCsStefano Babic
Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>