Age | Commit message (Collapse) | Author |
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Few i.MX chips which have HAB 4.2.3 or beyond, have oberserved following
warning message generated by HAB due to incorrect implementation of drng
self test in boot ROM.
Event |0xdb|0x0024|0x42| SRCE Field: 69 30 e1 1d
| | | | STS = HAB_WARNING (0x69)
| | | | RSN = HAB_ENG_FAIL (0x30)
| | | | CTX = HAB_CTX_ENTRY (0xE1)
| | | | ENG = HAB_ENG_CAAM (0x1D)
| | | | Evt Data (hex):
| | | | 00 08 00 02 40 00 36 06 55 55 00 03 00 00 00 00
| | | | 00 00 00 00 00 00 00 00 00 00 00 01
It is recommended to run this rng self test before any RNG related crypto
implementations are done.
Impacted chips known:
i.MX6SOLO Rev 1.4
i.MX6DL Rev 1.4
i.MX6Q Rev 1.6
i.MX6QP Rev 1.1
i.MX6SX Rev 1.4
Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
(cherry picked from commit 578c36a50b4169854cfcc747d80ca95c06984704)
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To align with NXP v2021.04 u-boot, enable the FSL_BLOB to do
blob encap/decap with FSL_CAAM enabled
Signed-off-by: Ye Li <ye.li@nxp.com>
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Porting the iMX6ULL DDR3 validation board support from v2019.04 u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit e801931b5f6f5e720eb403af8a226d0c472e253b)
(cherry picked from commit 14aa2c001f731f14ccbcd8ab586111e481f3d2a5)
(cherry picked from commit 0cb8ca9ee0e675e3c084829448624644ebde7a24)
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Porting the iMX6UL DDR3/LPDDR2 validation board support from
v2019.04 u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 1061ac589ce689246da25784bf960230b07b4e33)
(cherry picked from commit e0cfcb2b44ba61b8a1a8f2b65a25f34831598ecf)
(cherry picked from commit fc65d0f5599d730a19a001071d53dc559e115ca0)
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Porting the iMX6SLL LPDDR3/LPDDR2 validation board support from
v2019.04 u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit fabe5a0e397fdc89862c706ae502b5cc7afd16f5)
(cherry picked from commit cb2cc57c9d2166db88b4428d35196d415fd33ef0)
(cherry picked from commit 32e608b96bf3873bd55239d9029c7a676b407dd8)
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Porting the iMX6SX 17x17 DDR3/LPDDR2 (14x14) validation board and 19x19
DDR3/LPDDR2 validation board support from v2019.04 u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 766189e6d95c272beb6048f722eca720057e747e)
(cherry picked from commit ed0e368f201af0c4d3c155782b43f073e7ab1ba1)
(cherry picked from commit 60e36a15348fa538fb104ee694c60de2a1bbe3ff)
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Enable the module disable fuse checking configurations, and ENET fuse checking during
ENET setup.
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit d2192a3909be8ab9433082e7c04c917489b28e25)
(cherry picked from commit 5fa7d431db1c5eda903f211a99c426d8d57293bd)
(cherry picked from commit 5fc6fe6b0f85f61bc60712af5b8cd55e7b8b0789)
(cherry picked from commit 522748cbcfc2ddd5a3490fe74683926048ff099d)
(cherry picked from commit 176e91bcdc49025cf127b4226ec0e2476ebafdf0)
(cherry picked from commit 9c42a6b549b1f5bc84fff10f0590e94111771422)
(cherry picked from commit c8f54a743b5158bf783c69356af0824b55d86975)
(cherry picked from commit 9095d2438a597148ed81de4f1a8415c4e4e9de6b)
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Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for
module fuse check. And modify board level codes for SD, FEC and EIM.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 9232e9f7637afa3b71b43ab2d1361582ec5a080a)
(cherry picked from commit 687b586bf7d3b0d2f796c8ea768e4fb450079adb)
(cherry picked from commit f1cdd3b004b15d950b35f3ef625af23c2f106f5a)
(cherry picked from commit e5ac66df336a1ce45f315ada5d8f1a73e8f22632)
(cherry picked from commit f43662fa184193d165973f0c50708f818b120708)
(cherry picked from commit 5a635cad834def6d5a624311e6db2666c6617276)
(cherry picked from commit bdf0029e0facf763dd1f9555231caf7da48860fb)
(cherry picked from commit 0bdd89bccd3a0c71a7e687a73fb440a43be99556)
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To align with v2020.04, add functions:
1. Support GPMI NAND
2. Support LCD splash screen
3. Add 9x9 EVK board support with LPDDR2 used
4. Update PMIC and LDO bypass for 9x9 EVK
5. Support two ethernet controllers
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 154d6c905a848eed3bcc1ae2e142da3508a61b92)
(cherry picked from commit e7617471ab33579da972db82e042937233c857fa)
(cherry picked from commit 1df176a9b18d5e16e445307e6702822d9a8fa9f8)
(cherry picked from commit 0b5078707c962324cbfdd10290f2e0953c2566cd)
(cherry picked from commit ca108894bb9053dff5214e8dfdd1d347bcaa9ef4)
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Porting the mx6dq/dqp/dl/s sabresd and sabreauto codes from v2018.03
The major change is moving back to non-SPL mode for sabre boards.
which means all old things like DCD, plugin are added back for each
platform. This inherits the way used in v2018.03
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 3a3a0f07c85b0ae86b18709445206db0310c3b63)
(cherry picked from commit 90b86014f70f44db3b18e96b2643a57a0a6f92a3)
(cherry picked from commit 2660660f213e117c3445ba6f18e78d44df1683bc)
(cherry picked from commit 7e4494e316fd48aad0cee22f45722147ff1f6dcd)
(cherry picked from commit b29f22f4314bc67305e1533ba21ddaa67aa8df49)
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Since i.MX6QP is a variant of i.MX6Q, have to add CONFIG_MX6QP
with CONFIG_MX6Q in the soc codes for ddr/pin/clock/plugin
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit a56c1d98d8d56a34ca1226e15fe05b75cd9b3686)
(cherry picked from commit 1fa581642ec8def3fd378b29f8d9b6527358dfe9)
(cherry picked from commit cad8787ee3a37a644e6c981e6b8c9d9748a212de)
(cherry picked from commit 14b75bbfe513e05cc099b78fe8909822e1167a51)
(cherry picked from commit 87f1a3946ec3a5ca55521c31320a799446faa23b)
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This patch is to support Bus Encryption Engine(BEE) for i.MX 6UL.
Supported feature:
1. SNVS key and soft key
2. CTR and ECB mode
3. Specify address region to bee.
Two commands are included:
bee init [key] [mode] [start] [end] - BEE block initial
"Example: bee init 1 1 0x80000000 0x80010000\n"
bee test [region]
"Example: bee test 1\n"
Mapping:
[0x10000000 - (0x10000000 + size - 1)] : [start - (start + size - 1)]
[0x30000000 - (0x30000000 + IRAM_SIZE - 1)] : [IRAM_BASE_ADDR -
(IRAM_BASE_ADDR + IRAM_SIZE - 1)]
Whatever start is, start - (start + size -1) will be fixed mapping to
0x10000000 - (0x10000000 + size - 1)
Since default AES region's protected size is SZ_512M, so
on mx6ul evk board, you can not simply run 'bee init', it will
overlap with uboot execution environment, you can use
'bee init 0 0 0x80000000 0x81000000'.
If want to use bee, Need to define CONFIG_CMD_BEE in board configuration
header file, since CONFIG_CMD_BEE default is not enabled.
This patch also checks fuse bit 25 of bank 0 word 4 before initialize bee.
The bit: 0 means bee enabled, 1 means bee disabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 9d592121bebbdb9ded0009a2703c7cab01edfa70)
(cherry picked from commit cd03ba8327d46178900a63310d5ef3edd8034350)
(cherry picked from commit 6c8ed4a65e73747f38d2e16e8a2b8cb0c7cce4af)
(cherry picked from commit 772a1ed70504667e8ec081f37b9c0f4b3fa6ac11)
(cherry picked from commit 2e0e0060ea8303f6d9e9573fd9262ce24e8f4ae8)
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Port LDO bypass SOC codes from v2017 to support the features:
1. Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
on the flatten device tree file.
2. We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now
on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to
reboot whole board, so split these code to independent function so that board file
can call it freely.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 6bceaf009718cec856e11106d26e13601631fa4f)
(cherry picked from commit 0e2de4c2d5d2c79e485d164394f03065743ba2c4)
(cherry picked from commit 4160d7362893873d04b8a2d618ad6ff84c411da4)
(cherry picked from commit 95081f7d5cfeebea682c83d6ebc9ae4eefee2a0f)
(cherry picked from commit f541aa3920e76c543003607a2bec45cc84f8d39b)
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i.MX6,i.MX6SX,i.MX6UL - added support for JR driver model.
removed sec_init() call, sec is initialized based on
job ring information processed from device tree.
Signed-off-by: Gaurav Jain <gaurav.jain@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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CMD_DM is useful for showing the whole DM tree.
Enable it via "imply CMD_DM".
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
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"TQ-Systems" is written with a dash.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
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The subdivision name "TQ Components" hasn't been in use for a long time.
Rename the vendor directory to "tq", which also matches our Device Tree
vendor prefix.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
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(N63xx/N64xx)
This adds support for i.MX6UL/ULL-based evaluation kits with SoMs by
Kontron Electronics GmbH.
Currently there are the following SoM flavors (SoM-Line):
* N6310: SOM with i.MX6UL-2, 256MB RAM, 256MB SPI NAND
* N6311: SOM with i.MX6UL-2, 512MB RAM, 512MB SPI NAND
* N6411: SOM with i.MX6ULL, 512MB RAM, 512MB SPI NAND
And the according evaluation boards (Board-Line):
* N6310-S: Baseboard with SOM N6310, eMMC, display (optional), ...
* N6311-S: Baseboard with SOM N6311, eMMC, display (optional), ...
* N6411-S: Baseboard with SOM N6411, eMMC, display (optional), ...
Currently U-Boot describes i.MX6UL and i.MX6ULL through separate config
options at compile-time. Though the differences are so minor, that for
the scope of these SoMs we just use a single defconfig that is compatible
with both SoCs.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
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Prepare v2021.10-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
# gpg: Signature made Tue 14 Sep 2021 06:58:32 PM EDT
# gpg: using RSA key 1A3C7F70E08FAB1707809BBF147C39FF9634B72C
# gpg: Good signature from "Thomas Rini <trini@konsulko.com>" [ultimate]
# Conflicts:
# board/Arcturus/ucp1020/spl.c
# cmd/mvebu/Kconfig
# common/Kconfig.boot
# common/image-fit.c
# configs/UCP1020_defconfig
# configs/sifive_unmatched_defconfig
# drivers/pci/Kconfig
# include/configs/UCP1020.h
# include/configs/sifive-unmatched.h
# lib/Makefile
# scripts/config_whitelist.txt
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This option has not effect now. Drop it, using PCI instead where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
[trini: Fixup some incorrect renames]
Signed-off-by: Tom Rini <trini@konsulko.com>
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default n/no doesn't need to be specified. It is default option anyway.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
[trini: Rework FSP_USE_UPD portion]
Signed-off-by: Tom Rini <trini@konsulko.com>
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Rename these options so that CONFIG_IS_ENABLED can be used with them.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rename this option so that CONFIG_IS_ENABLED can be used with it.
Signed-off-by: Simon Glass <sjg@chromium.org>
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As the deadline for migration to DM_USB, when using a USB host
controller has now gone two years past the deadline, enforce migration.
This is done by:
- Ensuring that all host controller options (other than the very legacy
old MUSB ones) now select USB_HOST. USB_HOST now enforces DM_USB and
OF_CONTROL.
- Remove other parts of Kconfig logic that had platforms pick DM_USB.
- To keep Kconfig happy, have some select statements test for USB_HOST
as well.
- Re-order some Kconfig entries and menus so that we can cleanly pick
host or gadget roles. For the various HCD options that have platform
glue options, group them together and update dependencies in some
cases.
- As SPL_DM_USB is not required, on platforms that had not yet enabled
it, disable it.
Cc: Marek Vasut <marex@denx.de>
Cc: Icenowy Zheng <icenowy@aosc.io>
Cc: Samuel Holland <samuel@sholland.org>
Cc: FUKAUMI Naoki <naobsd@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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CPU: Freescale i.MX6ULL rev1.1 792 MHz (running at 396 MHz)
CPU: Industrial temperature grade (-40C to 105C) at 49C
Reset cause: POR
Model: Seeed NPi iMX6ULL Dev Board with NAND
Board: Seeed NPi i.MX6ULL Dev Board
DRAM: 512 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
In: serial@2020000
Out: serial@2020000
Err: serial@2020000
Net: FEC0
Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host
Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
Note:
Changes in v2:
* removed unnecessary space in imx6ull-seeed-npi-imx6ull-dev-board.dts file.
* Used SZ_2M for CONFIG_SYS_MALLOC_LEN size allocation.
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Board designed for quick prototyping and has one microSD port,
2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO,
UART interfaces, and 2 RGB LEDs.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Cc: Stefano Babic <sbabic@denx.de>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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These boards have not been converted to CONFIG_DM_MMC by the deadline.
Remove them.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. In order to
convert to using the DWC SATA driver under DM further migrations are
required.
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
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This board relies on using CONFIG_LIBATA but does not enable CONFIG_AHCI. The
deadline for this conversion was the v2019.07 release. The use of CONFIG_AHCI
requires CONFIG_DM. The deadline for this conversion was v2020.01. Remove
this board.
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This board has not been converted to CONFIG_DM_MMC by the deadline.
Remove it.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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add support for aristainetos2c_cslb board variant.
Signed-off-by: Heiko Schocher <hs@denx.de>
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Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.
Adapt board code to remove stuff not needed anymore.
Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.
Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
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GE B1x5v2 patient monitor series is similar to the CARESCAPE Monitor
series (GE Bx50). It consists of a carrier PCB used in combination
with a Congatec QMX6 SoM. This adds U-Boot support using device model
everywhere and SPL for memory initialization.
Proper configuration is provided as 'ge_b1x5v2_defconfig' and the
combined image u-boot-with-spi.imx can be flashed directly to 1024
byte offset to /dev/mtdblock0. Alternatively SPL and u-boot.imx can
be loaded separately via USB-OTG using e.g. imx_usb.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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We have a number of platforms that are a combination of a carrier board
and System-on-Module (SoM) that in turn allows for the board to have
different SoCs on it. In some cases, this is handled via board-specific
Kconfig options. In other cases we make use of
CONFIG_SYS_EXTRA_OPTIONS. This latter case however can lead to invalid
configurations as we will not in turn get options that in Kconfig are
selected by or depend on that setting.
To resolve this, make the SoC option a choice in Kconfig and make boards
depend on what they can support. This change opens us up for further
clean-ups in the cases where a single CONFIG_TARGET_xxx can support
different SoCs and today they do not, or do not cleanly do so.
Reported-by: Matt Porter <mporter@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Soeren Moch <smoch@web.de>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Igor Opaniuk <igor.opaniuk@toradex.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Nikita Kiryanov <nikita@compulab.co.il>
Cc: Andreas Geisreiter <ageisreiter@dh-electronics.de>
Cc: Ludwig Zenz <lzenz@dh-electronics.de>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Akshay Bhat <akshaybhat@timesys.com>
Cc: Ken Lin <Ken.Lin@advantech.com.tw>
Cc: Ian Ray <ian.ray@ge.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Cc: Raffaele RECALCATI <raffaele.recalcati@bticino.it>
Cc: Simone CIANNI <simone.cianni@bticino.it>
Cc: Adam Ford <aford173@gmail.com>
Cc: Marcin Niestroj <m.niestroj@grinn-global.com>
Cc: "Eric Bénard" <eric@eukrea.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Cc: Jason Liu <jason.hui.liu@nxp.com>
Cc: Ye Li <ye.li@nxp.com>
Cc: Eric Nelson <eric@nelint.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Parthiban Nallathambi <parthiban@linumiz.com>
Cc: Marek Vasut <marex@denx.de>
Cc: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Niel Fourie <lusus@denx.de>
Cc: Martyn Welch <martyn.welch@collabora.com>
Cc: Richard Hu <richard.hu@technexion.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Francesco Montefoschi <francesco.montefoschi@udoo.org>
Cc: Silvio Fricke <open-source@softing.de>
Tested-by: Matt Porter <mporter@konsulko.com> [colibri_imx6]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marcin Niestroj <m.niestroj@grinn-global.com>
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MYS-6ULX is single board computer (SBC) comes with eMMC or NAND based
on imx6ULL SoC from NXP and provision for expansion board. This
commit adds support only for SBC with NAND.
CPU: Freescale i.MX6ULL rev1.1 528 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 45C
Reset cause: WDOG
Model: MYiR i.MX6ULL MYS-6ULX Single Board Computer with NAND
Board: MYiR MYS-6ULX 6ULL Single Board Computer
DRAM: 256 MiB
NAND: 256 MiB
MMC: FSL_SDHC: 0
In: serial@2020000
Out: serial@2020000
Err: serial@2020000
Net: FEC0
Working:
- Eth0
- MMC/SD
- NAND
- UART 1
- USB host
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
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Convert pcm058 support to use device trees and the driver model.
Add rudimentary boot scripts to the environment, expand README.
Signed-off-by: Niel Fourie <lusus@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
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Convert to DM ethernet to prevent board removal.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
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Just move the defconfig entries which are required into the Novena
entry in arch Kconfig, no functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
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Add iMX6ULL VisionSOM SoM and VisionCB-RT-STD evaluation board support.
The SoM has an iMX6ULL, 512 MiB of DRAM and microSD slot. The carrier
board has Ethernet, USB host port, USB OTG port.
Signed-off-by: Arkadiusz Karas <arkadiusz.karas@somlabs.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
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