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path: root/arch/arm/include/asm/armv7.h
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2011-11-15omap5: Add minimal support for omap5430.Sricharan
This patch adds the minimal support for OMAP5. The platform and machine specific headers and sources updated for OMAP5430. OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture. It's a dual core SOC with GIC used for interrupt handling and SCU for cache coherency. Also moved some part of code from the basic platform support that can be made common for OMAP4/5. Rest is kept out seperately. The same approach is followed for clocks and emif support in the subsequent patches. Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03omap4: add omap4460 revision detectionAneesh V
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-08-03omap4: add OMAP4430 revision checkAneesh V
Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2011-07-04armv7: cache maintenance operations for armv7Aneesh V
- Add a framework for layered cache maintenance - separate out SOC specific outer cache maintenance from maintenance of caches known to CPU - Add generic ARMv7 cache maintenance operations that affect all caches known to ARMv7 CPUs. For instance in Cortex-A8 these opertions will affect both L1 and L2 caches. In Cortex-A9 these will affect only L1 cache - D-cache operations supported: - Invalidate entire D-cache - Invalidate D-cache range - Flush(clean & invalidate) entire D-cache - Flush D-cache range - I-cache operations supported: - Invalidate entire I-cache - Add maintenance functions for TLB, branch predictor array etc. - Enable -march=armv7-a so that armv7 assembly instructions can be used Signed-off-by: Aneesh V <aneesh@ti.com>