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path: root/arch/arm/include/asm/arch-tegra
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2012-08-22Initial Toradex Colibri T20 L4T R15 support.T20_LinuxImageV2.0Alpha1_20120808Marcel Ziswiler
2012-02-27arm: tegra3: add warmboot code needed for LP0Varun Wadekar
BUG=chromium-os:23496 TEST=build and boot on Waluigi, Cardhu by enabling CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT. odification of the work done by: a. Jimmy Zhang <jimmzhang@nvidia.com> b. Yen Lin <yelin@nvidia.com> c. Wei Ni <wni@nvidia.com> Change-Id: If2fa63ccd23341694955bca25fb5cfc4a8a805ad Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13800
2012-02-24arm: tegra: move warmboot_avp.h over to common locationVarun Wadekar
warmboot_avp.h needs to be present in include/arch-tegra in order to use it for Tegra3. BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: I3f369194e4002e8257c9d2ff37253bc20733138d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/15394
2012-02-24arm: tegra3: add PMC registersVarun Wadekar
These registers would be useful for the warmboot code. BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I58f52b6b8653d72b2e842ee44bdf3632eff304a2 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14690
2012-02-24arm: tegra3: add flow controller registersVarun Wadekar
These registers would be useful for the warmboot code. BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I8da1ed3a382e1b65247236cb19f527f81d8ecaac Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14688
2012-02-16arm: tegra: add chipid value to uniquely identify tegra3Varun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi Change-Id: Iacd6fdb178afbfdb978dbe53bbe2766916bf26f9 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14685
2012-02-16arm: config: tegra: add bct offset addressVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I32dbfa02ac1d6954b3a7e515914fbc0b6695f98b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14683
2012-02-14arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Ie04bf9ac17482a37afd0f4515dc3aafeb4f48ae7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/15883
2012-02-08Revert "arm: tegra2: split LP0 code to help future chips"Brian Harring
This reverts commit 4c7502242627f64d91432cb4958be5f93f65fbff Don't think this is the cause of http://code.google.com/p/chromium-os/issues/detail?id=26116, but it was in the same batch so I'm reverting in the process. Change-Id: Icc013ced6c22e29d569ee4ca8ef73522154ec1a8 Reviewed-on: https://gerrit.chromium.org/gerrit/15561 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08Revert "arm: tegra2: add .lds to calculate warm boot code size"Brian Harring
This reverts commit 9a3fbb5f0b02382c7abe0cf40a4f08abbf269d05 Broke tegra2: http://code.google.com/p/chromium-os/issues/detail?id=26116 Change-Id: I7d35211c6ebce7a10750cb1033c6f8ba9a0f63bc Reviewed-on: https://gerrit.chromium.org/gerrit/15560 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08arm: tegra2: add .lds to calculate warm boot code sizeVarun Wadekar
move away from the current method, where we add wb_end() immediately after wb_start() and then use the function addresses to calculate the WB code size. Add a .lds script to expose __wb_end after wb_start() in the .text section and then reference this variable in the WB size calculation code. BUG=chromium-os:23496 TEST=build on Seaboard. Verified that uboot.map has the correct address assigned to __wb_end and that LP0 works reliably. Change-Id: I170277f00b450d38063018453faf44d5a38abaaa Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14682
2012-02-08arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Id9756c08f61502affa8beee636d883d01468e6ec Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13799
2012-02-07video: tegra: Change the clock settings for LCD driverPuneet Saxena
As clock source for graphics related clocks is different for Tegra2 and Tegra3, define it under platform specific directories. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Original work by - Mayuresh Kulkarni <mkulkarni@nvidia.com> Change-Id: I6cee11df5e75eaf3836565c4fa4f3ab3e45d8cac Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14700
2012-01-06CHROMIUM: Support vboot without a displaySimon Glass
This allows booting without a display, mostly as a way of calculating the time that LCD init and maintenance costs us. Perhaps we might integrate the lcd and video APIs within U-Boot - it would be a much nicer solution. With that in mind I feel it is not work refactoring this into three separate (lcd, video, none) files to implement the display API. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: Iea4656f8939f7f2fd78292827091de4ee379954b Reviewed-on: https://gerrit.chromium.org/gerrit/13369 Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2011-12-13tegra: USB: Add T30 USB header filesTom Warren
BUG=chromium-os:23496 TEST=built Seaboard and Waluigi OK Signed-off-by: Tom Warren <twarren@nvidia.com> Change-Id: I954cdb71eb80a3cf48f44b9a7183a2cafcb7755b Reviewed-on: https://gerrit.chromium.org/gerrit/12442 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
2011-12-12tegra: Update clocks after fdt is availableSimon Glass
Some clocks cannot be set to the final value until we have the fdt and know what PLLP should be set to. For now the only example is coresight - so this adds a call to update this clock once the A9 is up and running with the fdt. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I7a07306cfb0a24cec4dcdb08cac78659a1afc73f Reviewed-on: https://gerrit.chromium.org/gerrit/12251 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-05tegra: Add a clock rate parameter to clock_early_init()Simon Glass
Since PLLP can be set to two different values, make it a parameter to the function that sets up the PLLs. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I81ccc1cc3356796793ec2dd4ab22ed7fbd52f01d Reviewed-on: https://gerrit.chromium.org/gerrit/12245 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-01tegra: Move tegra_get_chip_type() to ap20.cSimon Glass
This function is better off in architecture code than board code. This is quite an invasive change unfortunately. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I17764b134c25b684666d2c0fae2d255ac80e61b1 Reviewed-on: https://gerrit.chromium.org/gerrit/12244 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
2011-11-28arm: Tegra3: update T30 clock_and_reset controller supportTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=chromium-os:21033 TEST=built Seaboard & Waluigi OK. Booted my Waluigi to cmd prompt OK. MMC, SPI and I2C still work fine, as does UART. More can be done at a later date to cleanup AP20.c for T30 (and rename/move it, since AP20 is a T2x name) and use new T30 V/W clock enables/resets/sources/etc. Change-Id: Ia3a86c519481fffde6926e1fece1dcf898d199c9 Reviewed-on: https://gerrit.chromium.org/gerrit/11911 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-11-18arm: Tegra3: complete 408MHz PLLP initTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=chromium-os:21033 TEST=Built and booted OK on my Waluigi. UART is OK, mmc, spi, i2c OK. Note that this is only valid with CONFIG_SYS_PLLP_BASE_IS_408MHZ. No affect on Tegra2. Seaboard builds fine, BTW. Change-Id: I05a367afd1e78a2170d7308a658ce64017850ca0 Reviewed-on: https://gerrit.chromium.org/gerrit/11811 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15arm: Tegra: make some header files common for Tegra3 LCD useTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=built Seaboard and Waluigi AOK Change-Id: Ia860abf5ef3af66b3a39d4c57192455986b7a4f4 Reviewed-on: https://gerrit.chromium.org/gerrit/11704 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com> Commit-Ready: Doug Anderson <dianders@chromium.org>
2011-11-15tegra: spi: add SFLASH and SLINK driversChe-Liang Chiou
BUG=chromium-os:21033 TEST=run `sf erase, write` and then `sf read` on seaboard verify the data it reads from SPI flash matches that it writes to Change-Id: I1b04afa4b54738cd93be29b70f428bdc3e6b234f Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/11472 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15spi: add TEGRA_SLINK4_BASE and TEGRA_SPIFLASH_BASE in prep for tegra3Che-Liang Chiou
BUG=chromium-os:21033 TEST=emerge-{tegra2_seaboard,waluigi} chromeos-u-boot Change-Id: Icee2c26f36937e96c24318979179ba3a0cbfc09c Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11597
2011-11-15arm: Tegra: power: make power.c/.h common for future Tegra3 LCD useTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=built Seaboard and Waluigi OK. Booted Waluigi OK. Change-Id: I1bfbe03945d7dae44e0840349b9698fc08cef07d Reviewed-on: https://gerrit.chromium.org/gerrit/11504 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-14arm: tegra2: change initial CPU clock to 312MhzYen Lin
Set CPU clock initially to 312Mhz; once CPU voltage is raised, CPU clock will then be raied to 1.2GHz (for T25) or 1.0GHz (for T20). BUG=chrome-os-partner:5914 TEST=Build and test on Seaboard Change-Id: I0c95a1df6b87c896daca8c03c9dc33b245764621 Reviewed-on: https://gerrit.chromium.org/gerrit/11199 Tested-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Doug Anderson <dianders@chromium.org>
2011-11-13spi: rename tegra2_spi to tegra_spi in prep for tegra3Che-Liang Chiou
BUG=chromium-os:21033 TEST=build seaboard successfully Change-Id: Idbfbdbf0bdb1070f4a2b5f8205c1caff6ef0c811 Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11471 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-11tegra: Correct GPIO definitions for Tegra2Simon Glass
The GPIO definitions for Tegra2 were incorrectly matched up with Tegra2. The layout is actually different, so GPIOs beyond port D do not work. This separates out the GPIO headers again, so that Tegra2 and Tegra3 have separate structure definitions. BUG=None TEST='vboot_test gpio' on Kaen; see that it responds to google rec, power, lid correctly Change-Id: I8540a87c8faa7179c8f0d44ef3f18b3c576392cc Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/9847 Reviewed-by: Bryan Freed <bfreed@chromium.org> Tested-by: Bryan Freed <bfreed@chromium.org>
2011-10-07tegra3: i2c: Add low level functions for T30Simon Glass
We need these functions to set up the power chip during low-level init. BUG=chromium-os:21033 TEST=build and boot on Seaboard Change-Id: I69b9d3c12581e0a71db39b031b9ea2ef4ec184bf Reviewed-on: http://gerrit.chromium.org/gerrit/8696 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-07tegra3: Add GPIO headerSimon Glass
This header supplies the necessary T30 parts for GPIO access. Since the Tegra3 just adds new fields and they will use the same driver, we move the structure into the common header. BUG=chromium-os:21033 TEST=build and boot on seaboard Change-Id: I3ebf128358d118fc43469ffff839af5027bc6472 Reviewed-on: http://gerrit.chromium.org/gerrit/8693 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-06tegra3: Add new clock definitionsSimon Glass
Tegra3 has a number of additional registers in the clock/reset controller. BUG=chromium-os:21033 TEST=build and boot on Seaboard Change-Id: I34b0e66b2843fd2c2d4ab29fa1b4247b5ead7abf Reviewed-on: http://gerrit.chromium.org/gerrit/8697 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-06tegra3: Add flow controller definitionsSimon Glass
Change-Id: If944692337a24b1720b07460d1490b8cd15e7ef9 Reviewed-on: http://gerrit.chromium.org/gerrit/8703 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-06tegra: Add support for 408MHz PLLPSimon Glass
The 216MHz PLLP is not always wanted - this adds support for 408MHz which will be used on T30. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I4c053b5a9db4efb7b926ad2c9072f392d24033c9 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/8689 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2011-10-06tegra: Detect the number of CPUsSimon Glass
This adds ap20_get_num_cpus() which returns the number of CPUs in the system, and adjusts a clock function to use it. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: If7b56a2cecfb3d856308cac43dfcb32d3f1fef14 Reviewed-on: http://gerrit.chromium.org/gerrit/8688 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Move common gpio code into arch-tegraSimon Glass
Much of the GPIO header is common between T20 and T30, so move it into a common file to avoid duplication. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: Id8ca0bad87f8b5b27f00acf31081a52d88f1d824 Reviewed-on: http://gerrit.chromium.org/gerrit/8679 Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make i2c driver commonSimon Glass
The T20 and T30 i2c peripherals can use the same driver. This renames the driver and puts the header file into the common arch-tegra directory. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: Iec76bb27340db037fdc67b3509fd35f7b5aaeb34 Reviewed-on: http://gerrit.chromium.org/gerrit/8643 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make flow.h commonSimon Glass
The flow controller exists in both T20 and T30, so move it into the tegra-common directory. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: If6b7fea7dc3969139dfeadcf856b8d43d7eb875a Reviewed-on: http://gerrit.chromium.org/gerrit/8642 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make warmboot.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I896719336126346c540bbae0c0559302189460ef Reviewed-on: http://gerrit.chromium.org/gerrit/8641 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make uart.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I71d2cb747d97d8bd4d6c8c03037bb94614a6017f Reviewed-on: http://gerrit.chromium.org/gerrit/8640 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make scu.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I27113943da1e2dd3045f139938bc0c45998a0170 Reviewed-on: http://gerrit.chromium.org/gerrit/8639 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make pmc.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I89c132f9d857a76ee03f24ec910619df00a6d4ac Reviewed-on: http://gerrit.chromium.org/gerrit/8638 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make clk_rst.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: Idc12f106caaaf7601de8e66d8440840375eb9c42 Reviewed-on: http://gerrit.chromium.org/gerrit/8637 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make bitfield.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I03cb8e7b189cae0efb58d1ceed55a1e0dcd57c7f Reviewed-on: http://gerrit.chromium.org/gerrit/8636 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-15tegra3: Add basic Tegra30 supportTom Warren
This adds the most basic Tegra30 support to U-Boot, by making use of existing tegra2 code and adding what is necessary to build. BUG=chromium-os:19004 TEST=build and boot on T30 board Change-Id: If75599b2e76dbec3281fffb8a244b6145e9648cc Reviewed-on: http://gerrit.chromium.org/gerrit/7130 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-15tegra: Rename TEGRA2 to TEGRASimon Glass
Some constants are actually better of with generic Tegra family names. This also cleans up a few addresses which were in drivers rather than in the tegra.h header file. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I1cabb5191a2b36648a37268069beb3b43c12d0e1 Reviewed-on: http://gerrit.chromium.org/gerrit/7128 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-13tegra: Rename is_tegra2_processor_resetSimon Glass
Change tegra2 to tegra to make it more generic. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: Iad6de3bb6cc6031167862054b78a57f66dea9cd5 Reviewed-on: http://gerrit.chromium.org/gerrit/7127 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-13tegra: Move common header files into arch-tegraSimon Glass
BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I4ed198fe5a6cc920634c21039d29ab98bcb9f49c Reviewed-on: http://gerrit.chromium.org/gerrit/7126 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-13tegra: Refactor board.cSimon Glass
This moves everything except the query_sdram_size() function into a common board.c file. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I4578f08cd4cfde5e9e28ff800d7a12dbb8e13841 Reviewed-on: http://gerrit.chromium.org/gerrit/7125 Reviewed-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-09tegra: Move tegra2 files into tegra-commonSimon Glass
This code is required for Tegra30 also, so we move it into a common directory. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I9af13892861f54c0d7da6d4f9ee0715bc5ab6357 Reviewed-on: http://gerrit.chromium.org/gerrit/7124 Reviewed-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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