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Add a module to configure the tamper and secure violation of
the SNVS using the SCU API.
The module also adds some commands:
- snvs_cfg: Configure the SNVS HP and LP registers
- snvs_dgo_cfg: Configure the SNVS DGO bloc if present (8QXP)
- tamper_pin_cfg: Change the configuration of the tamper pins
- snvs_clear_status: Allow to write to LPSR and LPTDSR to clear status bits
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
(cherry picked from commit 75aa7f2254f0883aa14568ac32702b1ca15367e4)
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Sync SCFW API to commit 6dcd0242ae
Signed-off-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
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Need define ARCH_MXC to avoid access wrong registers in fsl_esdhc
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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When M4 is booted by ROM, we have to enable RPMSG in kernel, so need
to select the -rpmsg.dtb. If M4 is not enabled, use default kernel dtb.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
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The CAAM driver in u-boot will use JR0 by default, but for
imx8q, both JR0 and JR1 are assigned to SECO and A core
should never access them.
Power on the JR3 in this patchset and use it to complete
the CAAM operations for imx8q.
Test: CAAM self test cases pass for imx8q.
Change-Id: Ie3d77d1f2910e7f4c257c797c12b5c8a30ad936a
Signed-off-by: Ji Luo <ji.luo@nxp.com>
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Add the NAND support to SPL container parser and enable it for imx8qxp arm2
nand reworked board.
The SPL NAND will read from nandfit mtdpart (128MB offset) to parsing the entire
boot image and get the 3rd container from it. This requires burning tool (uuu)
to program the entire boot image into nandfit.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The previous LPCG register addresses seem wrong. By checking the LPCG with
JTAG, the ipg_clk, ipg_s_clk, and perclk uses one register as the standard
implementation method, not use 3 registers.
Signed-off-by: Ye Li <ye.li@nxp.com>
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To support partition reboot, the u-boot has to enable clocks by LPCG.
The LPCG will reset to default value only when the subsystem is totally
power off and reset. However, the resources in one subsystem may belong
to different partitions, so the partition reboot may not reboot the entire
subsystem.
Powers, clocks/lpcg, GPR, IP may not reset depends on various cases and
HW design. Thus, AP software has to ensure everything is reset by SW
itself to support such above cases.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Each module may have one or more lpcg registers for SW/HW enabling its
clocks. Add lpcg register address and its driver for accessing lpcg.
Signed-off-by: Ye Li <ye.li@nxp.com>
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u-boot currently needs information from ATF to know if
OP-TEE os has been loaded.
this information is transmitted via bootargs.
this patch enables saving those bootargs into a structure.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
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Generate the key blob and store it to the last block of boot1 partition
after setting the rpmb key. The key blob should be checked in spl and be
passed to Trusty OS if it's valid. If the key blob are damaged, RPMB
storage proxy service will return fail and should make the device hang.
Test: Build and boot ok on imx8qm/qxp.
Change-Id: Ia274cd72109ab6ae15920e91b2a2008e1f1e667c
Signed-off-by: Ji Luo <ji.luo@nxp.com>
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Add implementation necessary for supporting SPL on QXP
ARM2 board with dynamic offset detection from container header.
Signed-off-by: Teo Hall <teo.hall@nxp.com>
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This is a hack for imx8qm-mek, since the offset of the flash.bin image
on eMMC differs when compared to imx8qxp-mek. Basically, the default value
is 32K, but for 8qm-mek it's 0. This can go away once the qm and qxp get
aligned (again) from this point of view.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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This transforms almost all related functions from mmc specific to device
independent. This allows the container size to be computed from QSPI and other
future devices that will be supported for boot.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
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Add "clocks" command to list clocks values for core and some peripherals
on QM/QXP.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit c2c9b6487440946a52564ee20c2b1943a4085152)
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Add relevant functions and files to parse the container image set from mmc/sd
and get the total size of it. So we can get the offset of u-boot-atf.bin image
when it is padded to container image set at 1KB alignment position.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Starting U-Boot in a XEN VM, needs a header, just like Linux Kernel.
Without it, xen tool will take is as a file not supported.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 344ddf76c6de808699ab742d3c11728ca62f36ee)
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Porting the FSL android fastboot features from imx u-boot v2017.03 to
support all SoCs: imx6/imx7/imx7ulp/imx8/imx8m
Signed-off-by: Ye Li <ye.li@nxp.com>
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We clean USBOTG register USBCMD if it is used in serial download mode.
When XRDC blocking is enabled, we can't write this register directly,
must enable the OTG power, otherwise the kernel will get SError
exception in mfgtool.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit cf2143dc97b2a8f21b828c7386c59ee965d981f2)
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launching the kernel
Make sure that all devices that are powered up by uboot
are powered down before bringing up kernel.
Else the subsystem/device will never be powered down by SCFW even though
from the kernel's point of view it should be powered down.
Benefiting from power domain driver, We have implemented the function "power_off_pd_devices"
to power off all active devices. No need to explicitly power off them in board_quiesce_devices.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add common functions for LVDS/DC setup, video framebuffer init/disable,
LVDS to HDMI card settings, etc. Refactor it from video_imxdpuv1.c.
1. Add power, clocks, PLL relevant setup for LVDS and DC.
2. Configure the LVDS and its PHY settings for the display format and pixel link.
3. Setup the LVDS to HDMI card.
4. Implement the video_hw_init by calling DC driver API to output data to
specified display panel.
Signed-off-by: Oliver Brown <oliver.brown@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 9317f7ea4d976335a633f7056bbac1f77b01247a)
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Add the power domain DM driver for i.MX8, that it depends on the DTB
power domain trees to generate the power domain provider devices. Users
needs add power domain trees with property "compatible = "nxp,imx8-pd";"
- When power on one PD device, the driver will power on its ancestor PD devices
in power domain tree.
- When power off on PD device, the driver will check its child PD devices first,
only all child PD devices are off, then power off the current PD device. Then the
driver checks sibling PD devices. If sibling PD devices are off, then it will power
off parent PD device.
- There is no counter maintained in this driver, but a state to hold current on/off
state. So the request and free functions are empty.
- The power domain implemetation in i.MX8 DTB set the "#power-domain-cells" to 0, so
there is no ID binding with each PD device. We don't use "id" variable in
struct power_domain. At same time, we have to set of_xlate to empty to bypass standard
of_xlate in uclass driver.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 19c5632dc481d0fe983a4699d263bc9fc14edfcf)
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Add support for iMX8 SoC platforms, and extend to support LSIO GPIO0..GPIO7 ports.
Since the i.MX8 GPIO banks are indexed from 0 not 1 on other i.MX platforms,
so we have to adjust the index accordingly.
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit cb3eabdb56173a75495717bf88fbc1d04623f6d7)
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We met u-boot hang when booting from eMMC fastboot on QM/QXP boards.
The hang happens on u-boot accessing USB2 PHY for checking USB boot.
The root cause is when putting AP image (u-boot-atf.bin) in first container,
the USB2 PHY reset bit won’t be set in CONN SS by SCFW, because this SS has been
powered on by SC ROM.
In normal boot case, we won't meet such issue. Because we put u-boot-atf.bin in second
container and AP ROM will boot up for loading this binary. When AP ROM completes the
loading, it calls “misc_boot_status” API to power off the boot device and also power
off the CONN SS. Then when u-boot enables any the module in CONN, the CONN SS will power
on again by SCFW and set the USB2 PHY reset bit.
Since the clock settings are different in SC ROM and SCFW, so it is suggested to power off
CONN SS when booting is completed. In this patch, we check the g_ap_mu field in pass over
structure which is used to pass into from SC ROM to AP ROM. This field is set only when AP
image is included in the second container. If this field is not set, we suppose the booting
only uses SC ROM, then u-boot calls "misc_boot_status" at early stage to power off
boot device.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 67bb87f16e3742d6fab0b7837ffdb8bbed1245d1)
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We setup SMMU in arch_preboot_os to avoid breaking u-boot driver.
Add a kconfig entry CONFIG_IMX_SMMU to enable it.
So far, the USDHC0-USDHC1 and FEC0-FEC1 are added into sid.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 7da6345919ee59a26cf65b4bc29072eea2fc0909)
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Wrap the iomux settings through SCU APIs. Provide interfaces to follow
other i.MX platforms.
Users need to define the iomux_cfg_t which combines of three parts:
<PAD id> | <MUX ALT> | <PAD & MUX CONFIG>
<PAD id> can directly use the values in imx8qm_pins.h
<MUX ALT> is optional if the select to use default mux. Otherwise using
MUX_MODE_ALT(x) to set it.
<PAD & MUX CONFIG> is the value for CONFIG, LP_CONFIG, PULL control, Drive Strength in
Padring control register.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 28b3af555794826731fe81ba55455a3d1908efca)
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Add cpu, power, and clocks functions for support i.MX8QM and i.MX8QXP SoCs.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Nitin Garg <nitin.garg@nxp.com>
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add the MU (message unit) driver and IPC functions for communicating with SCFW.
Add CONFIG_HAVE_SC_FIRMWARE for enabling the IPC feature and holding the
IP channel in global data.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
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Using the latest SCFW-API based on commit from SCFW master branch
"
commit 433c7fb773e3a5853e2744ff1f958bb225cd338a
Author: Chuck Cannon <chuck.cannon@nxp.com>
Date: Tue Apr 17 16:09:56 2018 -0500
Only default start CPUs for EMUL, SIMU, and test builds.
Signed-off-by: Chuck Cannon <chuck.cannon@nxp.com>
"
Signed-off-by: Ye Li <ye.li@nxp.com>
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