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2015-02-21ARM: nomadik: move SoC sources to mach-nomadikMasahiro Yamada
Move arch/arm/cpu/arm926ejs/nomadik/* -> arch/arm/mach-nomadik/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com> Cc: Alessandro Rubini <rubini@unipv.it>
2015-02-21ARM: kirkwood: move SOC sources to mach-kirkwoodMasahiro Yamada
Move arch/arm/cpu/arm926ejs/kirkwood/* -> arch/arm/mach-kirkwood/* Note: Perhaps, can we merge arch/arm/mach-kirkwood and arch/arm/mvebu-common into arch/arm/mach-mvebu, like Linux? Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stefan Roese <sr@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-02-21ARM: davinci: move SoC sources to mach-davinciMasahiro Yamada
Move arch/arm/cpu/arm926ejs/davinci/* -> arch/arm/mach-davinci/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com>
2015-02-21ARM: tegra: collect SoC sources into mach-tegraMasahiro Yamada
This commit moves files as follows: arch/arm/cpu/arm720t/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/arm720t/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/arm720t/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/arm720t/tegra124* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/arm720t/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/armv7/tegra20/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/armv7/tegra30/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/armv7/tegra114/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/armv7/tegra124/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/armv7/tegra-common/* -> arch/arm/mach-tegra/* arch/arm/cpu/tegra20-common/* -> arch/arm/mach-tegra/tegra20/* arch/arm/cpu/tegra30-common/* -> arch/arm/mach-tegra/tegra30/* arch/arm/cpu/tegra114-common/* -> arch/arm/mach-tegra/tegra114/* arch/arm/cpu/tegra124-common/* -> arch/arm/mach-tegra/tegra124/* arch/arm/cpu/tegra-common/* -> arch/arm/mach-tegra/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Simon Glass <sjg@chromium.org> [ on nyan-big ] Cc: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
2015-02-21ARM: at91: collect SoC sources into mach-at91Masahiro Yamada
This commit moves source files as follows: arch/arm/cpu/arm920t/at91/* -> arch/arm/mach-at91/arm920t/* arch/arm/cpu/arm926ejs/at91/* -> arch/arm/mach-at91/arm926ejs/* arch/arm/cpu/armv7/at91/* -> arch/arm/mach-at91/armv7/* arch/arm/cpu/at91-common/* -> arch/arm/mach-at91/* Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.co>
2015-02-17Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini
2015-02-16sunxi: Support the FEL boot mode in the regular u-boot buildSiarhei Siamashka
So that the CONFIG_SPL_FEL option is not needed anymore. And the regular SPL binary, generated by the default u-boot build, is now also bootable over USB in the FEL mode. The SPL still can boot from the SD card too. A bunch of system registers need to be saved/restored in order to ensure that the IRQ handler still works in the BROM FEL code after getting control back from the SPL. This is done in the sunxi code instead of abusing ifdefs in 'start.S'. The decision whether to load the main u-boot binary from the SD card or return to the FEL code in the BROM is done at runtime. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> [hdegoede@redhat.com: Since we now restore various regs before returning to the FEL BROM code we can drop the sunxi specific #ifdefs in start.S] Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16sunxi: Normalise FEL supportSimon Glass
Make sunxi's FEL code fit with the normal U-Boot boot sequence instead of creating its own. There are some #ifdefs required in start.S. Future work will hopefully remove these. This series is available at u-boot-dm, branch sunxi-working. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16arm: Allow lr to be saved by board codeSimon Glass
The link register value can be required on some boards (e.g. FEL mode on sunxi) so use a branch instruction to jump to save_boot_params() instead of a branch link. This requires a branch back to save_boot_params_ret so adjust the users to deal with this. For exynos just drop the function since it doesn't do anything. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-02-16sunxi: dram: Un-inline dram helper functionsHans de Goede
Move the dram helper functions to a separate C file, rather then having them as inline helpers in dram.h. This saves 144 bytes in the .text segment for sun6i builds. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-02-16keystone2: ddr3: eliminate using global ddr3_size variableVitaly Andrianov
KS2 ddr3 initialization uses ddr3_size global variable before u-boot relocation. Even if the variable is not being used after relocation, writing to it corrupts relocation table. This patch removes the global ddr3_size variable and uses local one instead. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
2015-02-16clock_am43xx:Set the MAC clock to /5 for OPP100Steve Kipisz
When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
2015-02-16ARM: DRA7-evm: DDR3: Update leveling valuesLokesh Vutla
Update the software leveling parameters. This fixes the random crash seen on DRA7-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-02-16ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register valueLokesh Vutla
The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-02-16ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clockAngela Stegmaier
DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-02-13Merge git://git.denx.de/u-boot-samsungTom Rini
2015-02-13Merge git://git.denx.de/u-boot-dmTom Rini
2015-02-13Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini
2015-02-13Exynos: Clock: Cleanup soc_get_periph_rateAkshay Saraswat
Since we have src, div and pre-div mask bits defined corresponding to peripherals, calculation of clock specific to I2C appears redundant and confusing. Using clk_bit_info struct we can write calculations generic to all peripherals which makes code easy to understand and free from peripheral specific exceptions. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13Exynos: clock: change mask bits as per peripheralAkshay Saraswat
We have assumed and kept mask bits for divider and pre-divider as 0xf and 0xff, respectively. But these mask bits change from one peripheral to another, and hence, need to be specified in accordance with the peripherals. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13Exynos5: Use clock_get_periph_rate generic APIAkshay Saraswat
Replacing SoC and peripheral specific function calls with generic clock_get_periph_rate calls to get the peripheral clocks. Also, removing dead code of peripheral and SoC specific function implementations which was used earlier for fetching peripheral clocks. This code is not being used anymore because of the introduction of generic clock_get_periph_rate function. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13Exynos5: Fix exynos5_get_periph_rate calculationsAkshay Saraswat
exynos5_get_periph_rate function reads incorrect div for SDMMC2 & 3. It also reads prediv and does division only for SDMMC0 & 2 when actually various other peripherals need that. Adding changes to fix these mistakes in periph rate calculation. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13Exynos542x: Add and enable get_periph_rate supportAkshay Saraswat
We planned to fetch peripheral rate through one generic API per peripheral. These generic peripheral functions are in turn expected to fetch apt values from a function refactored as per SoC versions. This patch adds support for fetching peripheral rates for Exynos5420 and Exynos5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13Exynos542x: Move exynos5420_get_pll_clk up and renameAkshay Saraswat
Moving exynos5420_get_pll_clk function definition up in the code to keep it together with rest of SoC_get_pll_clk functions. This makes code more legible and also removes the need of declaration when called before the position of definition in code. Also, renaming exynos5420_get_pll_clk to exynos542x_get_pll_clk because it is being used for both Exynos 5420 and 5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13Exynos5: Fix compiler warnings due to clock_get_periph_rateAkshay Saraswat
Apparently, members of clk_bit_info array do not map correctly to the members of enum periph_id. This mapping got broken after we changed periph_id(s) to reflect interrupt number instead of their position in a sequence. This patch intends to fix above mentioned issue. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13EXYNOS5: Add function to enable exynos5420 usbdev phy ctrlJoonyoung Shim
Exynos5420 has different registers with other exynos5 SoCs to control usb device phy, so need separated function to enable exynos5420 usb device phy. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13arm: exynos: fix the div value for set_mmc_clkJaehoon Chung
The most exynos used the "Ratio + 1" as div value. And value at register is "Ratio". So if want to set exact value, it needs to subtract one. Value at register ("Ratio") = div - 1 Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-02-13arm: rmobile: r8a7794: Enable SMP mode of Auxiliary Control RegisterNobuhiro Iwamatsu
r8a7794 uses ARM SoC of CA7 base. If we want to use dcache on CA7, we need to enable SMP bit of Auxiliary Control Register. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2015-02-13arm: rmobile: Add SILK board supportVladimir Barinov
SILK is an entry level development board based on R-Car E2 SoC (R8A7794) This commit supports the following peripherals: - SCIF, I2C, Ethernet, QSPI, MMC, USB Host Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2015-02-12dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to KconfigSimon Glass
Move this option to Kconfig and update all boards. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-12dm: omap3: Move driver model CONFIGs to KconfigSimon Glass
Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-12dm: tegra: Move driver model CONFIGs to KconfigSimon Glass
Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-12dm: exynos: Move driver model CONFIGs to KconfigSimon Glass
Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-12dm: Move Raspberry Pi driver model CONFIGs to KconfigSimon Glass
Remove driver model CONFIGs from the board config header and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-02-10Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini
2015-02-10Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2015-02-10arm: mxs: Add 'Wait for JTAG user' if booted in JTAG modeGraeme Russ
When booting in JTAG mode, there is no way to use soft break-points, and no way of knowing when SPL has finished executing (so the user can issue a 'halt' command to load u-boot.bin for example) Add a debug output and simple loop to stop execution at the completion of the SPL initialisation as a pseudo break-point when booting in JTAG mode Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
2015-02-10arm: mxs: Enable booting of mx28 without batteryGraeme Russ
Section 4.1.2 of Freescale Application Note AN4199 describes the configuration required to operate the mx28 from a 5V source without a battery. This patch changes the behaviour of the dropout control of the DC-DC converter (refer to section 11.12.9 of the mx28 Application Processor Reference Manual - Document Number: MCIMX28RM, Rev 2, 08/2013) to the following: - Always use 4P2 Linear Regulator if CONFIG_SYS_MXS_VDD5V_ONLY is defined - Switch between 4P2 Linear Regulator and Battery, using whichever has the highest voltage if CONFIG_SYS_MXS_VDD5V_ONLY isnot set (this is the same as the pre-patch behaviour) Signed-off-by: Graeme Russ <gruss@tss-engineering.com> Signed-off-by: Damien Gotfroi <dgotfroi@greenwatch.be>
2015-02-10arm: mxs: Add debug outputs and comments to mxs SPL source filesGraeme Russ
It is difficult to track down fail to boot issues in the mxs SPL. Implement the following to make it easier: - Add debug outputs to allow tracing of SPL progress in order to track where failure to boot occurs. DEUBUG and CONFIG_SPL_SERIAL_SUPPORT must be defined to enable debug output in SPL - Add TODO comments where it is not clear if the code is doing what it is meant to be doing, even tough the board boots properly (these comments refer to existing code, not to any code added by this patch) Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
2015-02-10imx: mx6: Fixed AIPS3 base address issueYe.Li
Should use AIPS3 configuration address 0x0227C000 to set AIPS3, not the AIPS3 base address. Additional, replace AIPS1_BASE_ADDR to AIPS3_ARB_BASE_ADDR to align with AIPS1 and AIPS2, and resolve the AIPS3_ARB_BASE_ADDR undefine problem. Signed-off-by: Ye.Li <B37916@freescale.com>
2015-02-07arm, at91, wdt: do not disable WDT in SPLHeiko Schocher
if CONFIG_AT91SAM9_WATCHDOG is set, do not disable WDT in SPL Signed-off-by: Heiko Schocher <hs@denx.de>
2015-02-07ARM: atmel: cleanup: remove at91cap9 related codeBo Shen
As the at91cap9adk board is removed by commit: b5508344 (ARM: remove broken "at91cap9adk" board), so the at91cap9 code is not used anymore, and also the document for at91cap9 can not be found on www.atmel.com, so remove the at91cap9 related code. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07ARM: atmel: sama5d4: build related file when enable SPLBo Shen
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: sama5d4: can access DDR in interleave modeBo Shen
The SAMAA5D4 SoC can access DDR in interleave mode. Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: sama5d4: add interrupt redirect functionBo Shen
Signed-off-by: Bo Shen <voice.shen@atmel.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-02-07ARM: atmel: sama5d4: add bus matrix init functionBo Shen
Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: spl: can not disable osc for sama5d4Bo Shen
The SAMA5D4 SoC on chip rc oscillator can not be disabled. Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: spl: add saic to aic redirect functionBo Shen
Some SoC need to redirect the saic to aic to make the interrupt to work, here add a weak function to be replaced by real function. Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: spl: add weak bus matrix init functionBo Shen
Some SoC need to configure the bus matrix, add an weak function to be replace by real function. Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-02-07ARM: atmel: clock: make it possible to configure HMX32Bo Shen
Signed-off-by: Bo Shen <voice.shen@atmel.com>
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