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path: root/arch/arm/cpu/armv7/tegra-common
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2012-08-22Initial Toradex Colibri T20 L4T R15 support.T20_LinuxImageV2.0Alpha1_20120808Marcel Ziswiler
2012-02-16arm: tegra: add chipid value to uniquely identify tegra3Varun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi Change-Id: Iacd6fdb178afbfdb978dbe53bbe2766916bf26f9 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14685
2012-02-14arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Ie04bf9ac17482a37afd0f4515dc3aafeb4f48ae7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/15883
2012-02-08Revert "arm: tegra2: split LP0 code to help future chips"Brian Harring
This reverts commit 4c7502242627f64d91432cb4958be5f93f65fbff Don't think this is the cause of http://code.google.com/p/chromium-os/issues/detail?id=26116, but it was in the same batch so I'm reverting in the process. Change-Id: Icc013ced6c22e29d569ee4ca8ef73522154ec1a8 Reviewed-on: https://gerrit.chromium.org/gerrit/15561 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08Revert "arm: tegra2: add .lds to calculate warm boot code size"Brian Harring
This reverts commit 9a3fbb5f0b02382c7abe0cf40a4f08abbf269d05 Broke tegra2: http://code.google.com/p/chromium-os/issues/detail?id=26116 Change-Id: I7d35211c6ebce7a10750cb1033c6f8ba9a0f63bc Reviewed-on: https://gerrit.chromium.org/gerrit/15560 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08arm: tegra2: add .lds to calculate warm boot code sizeVarun Wadekar
move away from the current method, where we add wb_end() immediately after wb_start() and then use the function addresses to calculate the WB code size. Add a .lds script to expose __wb_end after wb_start() in the .text section and then reference this variable in the WB size calculation code. BUG=chromium-os:23496 TEST=build on Seaboard. Verified that uboot.map has the correct address assigned to __wb_end and that LP0 works reliably. Change-Id: I170277f00b450d38063018453faf44d5a38abaaa Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14682
2012-02-08arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Id9756c08f61502affa8beee636d883d01468e6ec Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13799
2012-02-07tegra: Change parent clock for Tegra2 and Tegra3Puneet Saxena
Set display parent clock separately for Tegra2 and Tegra3. BUG=chromium-os:23496 TEST=Built ok for Cardhu Walgui and Seaboard. Tested on Waluigi. Change-Id: Ie03d37b8dda77dcfcb72e70c34e769a23323e598 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14697
2012-02-07tegra: Extend support for RAM size as 2GBPuneet Saxena
Add a case for returning RAM size as 2GB by reading PMC scratch20 register. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I5dc8fdf7cd9718e5dd2ca24cd1f467c5b6e9a6aa Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14696
2012-02-07tegra: Move display.c & pwfm.c from tegra2 to tegra-commonPuneet Saxena
Move pwfm.c and display.c under common folder tegra-common. BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I23c5f02270dde7bfdd6e1d26ed9984385986194e Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14694
2011-12-20tegra: Add debugging to display clocks during initSimon Glass
When DEBUG is enabled, display important clocks during init. BUG=chromium-os:22938 TEST=build and boot on Kaen Change-Id: Ic27e7d79bdcd9cf44d94ec25c52fc8776ddc7d04 Reviewed-on: https://gerrit.chromium.org/gerrit/13205 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-12tegra: Update clocks after fdt is availableSimon Glass
Some clocks cannot be set to the final value until we have the fdt and know what PLLP should be set to. For now the only example is coresight - so this adds a call to update this clock once the A9 is up and running with the fdt. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I7a07306cfb0a24cec4dcdb08cac78659a1afc73f Reviewed-on: https://gerrit.chromium.org/gerrit/12251 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-12tegra: Remove CONFIG_SYS_PLLP_BASE_IS_408MHZSimon Glass
This setting is now in the fdt, so remove the CONFIG item. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I336a6cc2140c725fdda85330efe617f82f205a90 Reviewed-on: https://gerrit.chromium.org/gerrit/12250 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-05tegra: Add a clock rate parameter to clock_early_init()Simon Glass
Since PLLP can be set to two different values, make it a parameter to the function that sets up the PLLs. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I81ccc1cc3356796793ec2dd4ab22ed7fbd52f01d Reviewed-on: https://gerrit.chromium.org/gerrit/12245 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-12-02Adjust pllx_set_rate to remove delayBernie Thompson
This is using the latest patch recommendation from Dilan at Nvidia, we adjust the ordering to clear bypass earlier and remove the delay. This patch was run successfully for over 2000 reboots. BUG=chrome-os-partner:6145 TEST=Manual Signed-off-by: Bernie Thompson <bhthompson@chromium.org> Change-Id: I9ef2f12d5c8abae86791f50b0f5e0e5a4249d947 Reviewed-on: https://gerrit.chromium.org/gerrit/12385 Reviewed-by: Micah Catlin <micahc@google.com> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Bernie Thompson <bhthompson@chromium.org> Tested-by: Bernie Thompson <bhthompson@chromium.org>
2011-12-01tegra: Move tegra_get_chip_type() to ap20.cSimon Glass
This function is better off in architecture code than board code. This is quite an invasive change unfortunately. BUG=chromium-os:23496 TEST=build and boot on Seaboard, T33, Kaen Change-Id: I17764b134c25b684666d2c0fae2d255ac80e61b1 Reviewed-on: https://gerrit.chromium.org/gerrit/12244 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org>
2011-11-29Changing implementation of pllx_set_rate() to reduce possibility of ↵Micah Catlin
intermittent hang Currently with 200uS delay after PLL for stability. BUG=chrome-os-partner:6145 TEST=None Originaly-Reviewed-on: https://gerrit.chromium.org/gerrit/11091 Originaly-Reviewed-by: Bernie Thompson <bhthompson@chromium.org> Originaly-Tested-by: Bernie Thompson <bhthompson@chromium.org> Originaly-Commit-Ready: Katie Roberts-Hoffman <katierh@chromium.org> Originaly-Reviewed-by: Katie Roberts-Hoffman <katierh@chromium.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Change-Id: Idcb95d4698ea856785be8a8232c08c89309af887 Reviewed-on: https://gerrit.chromium.org/gerrit/12158
2011-11-28arm: Tegra3: update T30 clock_and_reset controller supportTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=chromium-os:21033 TEST=built Seaboard & Waluigi OK. Booted my Waluigi to cmd prompt OK. MMC, SPI and I2C still work fine, as does UART. More can be done at a later date to cleanup AP20.c for T30 (and rename/move it, since AP20 is a T2x name) and use new T30 V/W clock enables/resets/sources/etc. Change-Id: Ia3a86c519481fffde6926e1fece1dcf898d199c9 Reviewed-on: https://gerrit.chromium.org/gerrit/11911 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-11-18arm: Tegra3: complete 408MHz PLLP initTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=chromium-os:21033 TEST=Built and booted OK on my Waluigi. UART is OK, mmc, spi, i2c OK. Note that this is only valid with CONFIG_SYS_PLLP_BASE_IS_408MHZ. No affect on Tegra2. Seaboard builds fine, BTW. Change-Id: I05a367afd1e78a2170d7308a658ce64017850ca0 Reviewed-on: https://gerrit.chromium.org/gerrit/11811 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15arm: Tegra: power: make power.c/.h common for future Tegra3 LCD useTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=built Seaboard and Waluigi OK. Booted Waluigi OK. Change-Id: I1bfbe03945d7dae44e0840349b9698fc08cef07d Reviewed-on: https://gerrit.chromium.org/gerrit/11504 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-14arm: tegra2: change initial CPU clock to 312MhzYen Lin
Set CPU clock initially to 312Mhz; once CPU voltage is raised, CPU clock will then be raied to 1.2GHz (for T25) or 1.0GHz (for T20). BUG=chrome-os-partner:5914 TEST=Build and test on Seaboard Change-Id: I0c95a1df6b87c896daca8c03c9dc33b245764621 Reviewed-on: https://gerrit.chromium.org/gerrit/11199 Tested-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Doug Anderson <dianders@chromium.org>
2011-10-20tegra3: Add T30 supportSimon Glass
This adds support for T30 init to ap20.c, and modifies the board file to cope with it also. The only thing missing at this point is the pinmux setup. BUG=chromium-os:21033 TEST=build and boot on Seaboard Change-Id: I3e75245c1fdb99bc15eadcf60b173e6f0d9bb56c Reviewed-on: http://gerrit.chromium.org/gerrit/8704 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-06tegra: Move architecture init code into commonSimon Glass
We will want arch_cpu_init() for both T20 and T30, so move it into the common area. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I5d3a1d59da9f8f2300ddce46469fe55caf27b482 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/8691
2011-10-06tegra: Add support for 408MHz PLLPSimon Glass
The 216MHz PLLP is not always wanted - this adds support for 408MHz which will be used on T30. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I4c053b5a9db4efb7b926ad2c9072f392d24033c9 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/8689 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2011-10-06tegra: Detect the number of CPUsSimon Glass
This adds ap20_get_num_cpus() which returns the number of CPUs in the system, and adjusts a clock function to use it. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: If7b56a2cecfb3d856308cac43dfcb32d3f1fef14 Reviewed-on: http://gerrit.chromium.org/gerrit/8688 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Build early code for ARMv4TSimon Glass
The Tegra family has an ARMv4T chip which runs board_init_f(). It does not support the BLX instruction which the init_sequence function table generates. The easiest fix is to build this file for ARMv4T on Tegra. The alternative is to move the arch_cpu_init() call out of the init sequence. But that fix would not make the reason for the change so obvious. There is no code size impact. BUG=chromium-os:19353 TEST=build and boot on Seaboard Change-Id: Idb0ab17bd0839c472cda7bf4940522245792e328 Reviewed-on: http://gerrit.chromium.org/gerrit/8684 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make warmboot.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I896719336126346c540bbae0c0559302189460ef Reviewed-on: http://gerrit.chromium.org/gerrit/8641 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make scu.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I27113943da1e2dd3045f139938bc0c45998a0170 Reviewed-on: http://gerrit.chromium.org/gerrit/8639 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make pmc.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I89c132f9d857a76ee03f24ec910619df00a6d4ac Reviewed-on: http://gerrit.chromium.org/gerrit/8638 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make clk_rst.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: Idc12f106caaaf7601de8e66d8440840375eb9c42 Reviewed-on: http://gerrit.chromium.org/gerrit/8637 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-04tegra: Make bitfield.h a common fileSimon Glass
This is needed by both T2x and T3x. BUG=chromium-os:19004 TEST=build and boot on seaboard Change-Id: I03cb8e7b189cae0efb58d1ceed55a1e0dcd57c7f Reviewed-on: http://gerrit.chromium.org/gerrit/8636 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-13tegra: Rename is_tegra2_processor_resetSimon Glass
Change tegra2 to tegra to make it more generic. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: Iad6de3bb6cc6031167862054b78a57f66dea9cd5 Reviewed-on: http://gerrit.chromium.org/gerrit/7127 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-13tegra: Refactor board.cSimon Glass
This moves everything except the query_sdram_size() function into a common board.c file. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I4578f08cd4cfde5e9e28ff800d7a12dbb8e13841 Reviewed-on: http://gerrit.chromium.org/gerrit/7125 Reviewed-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-09-09tegra: Move tegra2 files into tegra-commonSimon Glass
This code is required for Tegra30 also, so we move it into a common directory. BUG=chromium-os:19004 TEST=build and boot on Seaboard Change-Id: I9af13892861f54c0d7da6d4f9ee0715bc5ab6357 Reviewed-on: http://gerrit.chromium.org/gerrit/7124 Reviewed-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
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