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2012-02-27tegra: configs: enable warm boot on CardhuVarun Wadekar
enable CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT BUG=chromium-os:23496 TEST=build and boot on Cardhu Change-Id: If21303468193c7f5f6ba1c0c0b7cd0ccb5a08c0e Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13801
2012-02-27tegra: configs: enable warm boot on WaluigiVarun Wadekar
enable CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT BUG=chromium-os:23496 TEST=build and boot on Waluigi Change-Id: I622d228d02767954ffa7e101ad6f5f5fb1146702 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13802
2012-02-27arm: tegra3: add warmboot code needed for LP0Varun Wadekar
BUG=chromium-os:23496 TEST=build and boot on Waluigi, Cardhu by enabling CONFIG_TEGRA_LP0 and CONFIG_TEGRA3_WARMBOOT. odification of the work done by: a. Jimmy Zhang <jimmzhang@nvidia.com> b. Yen Lin <yelin@nvidia.com> c. Wei Ni <wni@nvidia.com> Change-Id: If2fa63ccd23341694955bca25fb5cfc4a8a805ad Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13800
2012-02-24arm: tegra: move warmboot_avp.h over to common locationVarun Wadekar
warmboot_avp.h needs to be present in include/arch-tegra in order to use it for Tegra3. BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: I3f369194e4002e8257c9d2ff37253bc20733138d Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/15394
2012-02-24arm: tegra3: header file for the MC/EMC registersVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I6d26502d1ecc393b266ffe06b540f59c595e19ae Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14811
2012-02-24arm: tegra3: header file for sdmmc controller registersVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: Ifa06f941798ff242197dcd31f4091567d91fe4b2 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14810
2012-02-24arm: tegra3: add header for APB_MISC_GP and padctrl registersVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I74bb2418ab996e362060351de3ba7efd538ffd87 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14809
2012-02-24arm: tegra3: add header file to describe the AHB controllerVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I20ac75c71d86d65ff422ff3f4f966a69718f4f91 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14808
2012-02-24arm: tegra3: add PMC registersVarun Wadekar
These registers would be useful for the warmboot code. BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I58f52b6b8653d72b2e842ee44bdf3632eff304a2 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14690
2012-02-24arm: tegra3: add AHB aperture base addressVarun Wadekar
Would be useful for the warmboot code. BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I271f6cdcc0248337e516c2c32014c6ec4f08fb15 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14689
2012-02-24arm: tegra3: add flow controller registersVarun Wadekar
These registers would be useful for the warmboot code. BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I8da1ed3a382e1b65247236cb19f527f81d8ecaac Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14688
2012-02-23ehci: fix PCI controllers lookupVincent Palatin
We were not searching on the last PCI bus. Fix the loop to go up to pci_last_busno() included. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=run on Link with only one PCI bus active, see we can detect the EHCI controllers. Change-Id: Icdcd19df0c622039f56e7403c2616348b5d8b7d6 Reviewed-on: https://gerrit.chromium.org/gerrit/16481 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
2012-02-21Fix vbexport_test displayVadim Bendebury
It turns out that running 'vbexport_test display' on coreboot platforms fails to display bitmap images, sometimes reporting memory corruption and rebooting the system. The problem was twofold: - the gbb pointer is not properly initialized (as it is supposed to when CONFIG_HARDWARE_MAPPED_SPI is defined). - the bitmap images block includes an element which in fact is not a bitmap. When scanning the block, the test tried displaying all elements, generating an error when this one-off element is encountered. This change fixes both issues. BUG=chromium-os:26586 TEST=manual . build a new chromeos-bootimage . reboot the system stopping it in u-boot console dialogue . run `vbexport_test display' command from the console The test was failing before this change, it is passing now. Change-Id: Iee9491d150b9ce5513f7446ab4df806d23e6d4d8 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/16206 Reviewed-by: Bill Richardson <wfrichar@chromium.org>
2012-02-17usb: properly detect empty mass storage media readerVincent Palatin
When a USB card reader is empty, it will return "Not Ready - medium not present" as Key Code Qualifier. In that situation, it's useless waiting for the full timeout since the result won't change until the user inserts a card. U-Boot mass storage returns empty mass storage devices with a size of 0, skip them in the VBoot devices enumeration. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=None TEST=On Link, run without a MMC card. Change-Id: Iac37887742e5738e249f595e0413eec16b391fae Reviewed-on: https://gerrit.chromium.org/gerrit/15582 Commit-Ready: Vincent Palatin <vpalatin@chromium.org> Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2012-02-16arm: tegra: add chipid value to uniquely identify tegra3Varun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi Change-Id: Iacd6fdb178afbfdb978dbe53bbe2766916bf26f9 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14685
2012-02-16arm: config: tegra: add bct offset addressVarun Wadekar
BUG=chromium-os:23496 TEST=build for Cardhu, Waluigi and Seaboard Change-Id: I32dbfa02ac1d6954b3a7e515914fbc0b6695f98b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14683
2012-02-15Fix USB keyboard in RW imagesStefan Reinauer
USB keyboard initialization was added in twostop_boot as a hack. However, if u-boot is running from one of the RW sections, twostop_boot is never executed, instead the code proceeds to twostop_readwrite_main_firmware() which was lacking the USB keyboard initialization. This patch adds USB keyboard initialization to the RW code path. BUG=chrome-os-partner:7940 TEST=boot from RW section in dev mode, observe that USB keyboard is working. (stumpy) Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: Ie49d14680a72c2216b4a68091ae6e6adcca91242 Reviewed-on: https://gerrit.chromium.org/gerrit/15913 Reviewed-by: Vincent Palatin <vpalatin@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org>
2012-02-15chromium: Report Ctrl-Enter key to verified boot.Tom Wai-Hong Tam
Add this special handle of Ctrl-Enter, which is converted into '\n' by i8042 driver. BUG=chrome-os-partner:6759 TEST=compile the firmware and update it to Lumpy; during the dev screen, press Ctrl-Enter to trigger USB boot. Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Change-Id: Ifde312f4ef6de9b328dc22b96ca02a2a9ccf6068 Reviewed-on: https://gerrit.chromium.org/gerrit/15805 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Wai-Hong Tam <waihong@chromium.org> Commit-Ready: Tom Wai-Hong Tam <waihong@chromium.org>
2012-02-14X86: Add support for Ctrl-Enter in i8042 driver.Tom Wai-Hong Tam
Make Ctrl-Enter act like LF (Line Feed) such that u-boot can differentiate it from pure Enter key. There are other Ctrl-(numeric keypad key)'s, like Ctrl-[ for ESC (Escape) key, but they are not useful yet in current u-boot. So keep the Ctrl-(key) and non-Ctrl-(key) tables the same except Enter. This change is together with https://gerrit.chromium.org/gerrit/15749 BUG=chrome-os-partner:6759 TEST=compile the firmware and update it to Lumpy; during the dev screen, press Ctrl-Enter to trigger USB boot. Change-Id: Ie3197f7ba93ed63c851bdfb918c8e384c90977dd Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/15750 Reviewed-by: Simon Glass <sjg@chromium.org>
2012-02-14arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Ie04bf9ac17482a37afd0f4515dc3aafeb4f48ae7 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/15883
2012-02-08Revert "arm: tegra2: split LP0 code to help future chips"Brian Harring
This reverts commit 4c7502242627f64d91432cb4958be5f93f65fbff Don't think this is the cause of http://code.google.com/p/chromium-os/issues/detail?id=26116, but it was in the same batch so I'm reverting in the process. Change-Id: Icc013ced6c22e29d569ee4ca8ef73522154ec1a8 Reviewed-on: https://gerrit.chromium.org/gerrit/15561 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08Revert "arm: tegra2: add .lds to calculate warm boot code size"Brian Harring
This reverts commit 9a3fbb5f0b02382c7abe0cf40a4f08abbf269d05 Broke tegra2: http://code.google.com/p/chromium-os/issues/detail?id=26116 Change-Id: I7d35211c6ebce7a10750cb1033c6f8ba9a0f63bc Reviewed-on: https://gerrit.chromium.org/gerrit/15560 Reviewed-by: Brian Harring <ferringb@chromium.org> Tested-by: Brian Harring <ferringb@chromium.org>
2012-02-08arm: tegra2: add .lds to calculate warm boot code sizeVarun Wadekar
move away from the current method, where we add wb_end() immediately after wb_start() and then use the function addresses to calculate the WB code size. Add a .lds script to expose __wb_end after wb_start() in the .text section and then reference this variable in the WB size calculation code. BUG=chromium-os:23496 TEST=build on Seaboard. Verified that uboot.map has the correct address assigned to __wb_end and that LP0 works reliably. Change-Id: I170277f00b450d38063018453faf44d5a38abaaa Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14682
2012-02-08arm: tegra2: split LP0 code to help future chipsVarun Wadekar
split the LP0 code for tegra2 into common LP0 code and chip specific warm boot code BUG=chromium-os:23496 TEST=build for Seaboard Change-Id: Id9756c08f61502affa8beee636d883d01468e6ec Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13799
2012-02-07video: tegra: Change the clock settings for LCD driverPuneet Saxena
As clock source for graphics related clocks is different for Tegra2 and Tegra3, define it under platform specific directories. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Original work by - Mayuresh Kulkarni <mkulkarni@nvidia.com> Change-Id: I6cee11df5e75eaf3836565c4fa4f3ab3e45d8cac Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14700
2012-02-07video: tegra: Update LCD max height & 'lcd_line_length'Puneet Saxena
Assert occurs due to LCD max height was bigger than default Maximum LCD height, causing 'panel_info' is not initialized. Increase default Max LCD height as Waluigi has LCD height in pixel more than 768. Initialize global variable 'lcd_line_length' correctly. 'lcd_line_length' was not initialized before use, causing initialization of dependent variables wrongly. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I24a9fc54541c861c48fd885e2d58d32786c31bf8 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14699
2012-02-07tegra3: fdt: change lcd frame buffer addressPuneet Saxena
For Waluigi, existing frame buffer address does not fall under external memory map. Setting it to the location set as per the default initialization. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I2284d43c11f4d6622344429508b1f99e30929f19 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14698
2012-02-07tegra: Change parent clock for Tegra2 and Tegra3Puneet Saxena
Set display parent clock separately for Tegra2 and Tegra3. BUG=chromium-os:23496 TEST=Built ok for Cardhu Walgui and Seaboard. Tested on Waluigi. Change-Id: Ie03d37b8dda77dcfcb72e70c34e769a23323e598 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14697
2012-02-07tegra: Extend support for RAM size as 2GBPuneet Saxena
Add a case for returning RAM size as 2GB by reading PMC scratch20 register. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I5dc8fdf7cd9718e5dd2ca24cd1f467c5b6e9a6aa Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14696
2012-02-07video: tegra: Handle pinmux setting differenly for Tegra2 an Tegra3Puneet Saxena
For Tegra2, pinmuxing is done in each driver, For Tegra3 it is done at boot up time. Handling it conditionally for Tegra2 and Tegra3. BUG=chromium-os:23496 TEST=Build ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I95e2dc4d46c0c47037611ff9177f2d8823c11d1f Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14695
2012-02-07tegra: Move display.c & pwfm.c from tegra2 to tegra-commonPuneet Saxena
Move pwfm.c and display.c under common folder tegra-common. BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: I23c5f02270dde7bfdd6e1d26ed9984385986194e Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14694
2012-02-07video: tegra: Rename tegra2.c to tegra.cPuneet Saxena
Enables common LCD support for Tegra2 and Tegra3 BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Change-Id: I39af6a01956a3f1545e7cccfa9c23a3f81d3dc0c Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14693
2012-02-07tegra: Rename "CONFIG_VIDEO_TEGRA2" to "CONFIG_VIDEO_TEGRA"Puneet Saxena
Enables common LCD support for Tegra2 and Tegra3 BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Change-Id: I938824045440cc4964c2ac6bf727a90ee5f129b4 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14692
2012-02-07arm: Tegra3: Add initrd ATAG support to all Tegra3Varun Wadekar
Helps kernel developers using kernels with custom ramdisk images. Some developers who would like to work with upstream kernel specifically requested for this feature, since it helps them during early development days. BUG=chromium-os:23496 TEST=build and boot on Cardhu, Waluigi Change-Id: I698da421bf924a5c86229a80c0a25021d3e6f046 Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14475 Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2012-02-07tegra: config: waluigi: Enable keyboard support for WaluigiPuneet Saxena
Add Keyboard config options CONFIG_TEGRA_KEYBOARD and CONFIG_KEYBOARD. BUG=chromium-os:23496 TEST=Tested on Waluigi. key press echoes the key on console. Build OK for cardhu. Change-Id: I7856f2d22c935a4a94f91c67263913e1240f25b5 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13790 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
2012-02-06tegra3: fdt: Add Waluigi keyboard mapPuneet Saxena
Add Waluigi keyboard map in Waluigi fdt BUG=chromium-os:23496 TEST=Build and tested on Waluigi. Change-Id: Iaf39dabc2bef2f12c2f0b875cc3c397386dbb446 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13929 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-06tegra3: fdt: Add Tegra30 keyboard controller definitionPuneet Saxena
Add Keyboard controller option in tegra30 fdt. BUG=chromium-os:23496 TEST=Build ok for Waluigi, Seaboard and Cardhu. Change-Id: I20fe7feed42a96edea138dc32c532e0d1d535226 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14546 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-06tegra: config: Rename CONFIG_TEGRA2_KEYBOARDPuneet Saxena
Replace Tegra2 specific tag "CONFIG_TEGRA2_KEYBOARD" by common tag "CONFIG_TEGRA_KEYBOARD" to include tegra keyboard driver. BUG=chromium-os:23496 TEST=Build ok for Cardhu,Seaboard and Waluigi. Change-Id: Idd16990ba525b8391c3c14e37efd5587f09a25c8 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13860 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-06tegra: change Keyboard config namePuneet Saxena
Rename CONFIG_TEGRA2_KEYBOARD to common CONFIG_TEGRA_KEYBOARD BUG=chromium-os:23496 TEST=Build OK for Waluigi, Cardhu and Seaboard. Change-Id: Ice2741622fe6434ba25ece8fe7fbe2ca989c44ef Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13930 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-06Arm: tegra3: Add 16x8 keyboard supportPuneet Saxena
Expand existing 4x6 keyboard support to 16x8 keyboard. Add Tegra2 specific changes under Tegra2 config "CONFIG_TEGRA2". BUG=chromium-os:23496 TEST=Tested on Waluigi.key press echoes the key on console. Built ok for Cardhu and Seaboard. Change-Id: Iab291a636d41b721d914014a5fe9ecc8775bf260 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13928 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-02-05tegra: waluigi: enable LCD supportPuneet Saxena
BUG=chromium-os:23496 TEST=Built ok for Cardhu, Waluigi and Seaboard. Tested on Waluigi. Change-Id: Ifb4deba51137251ea0564bf3e66f33f7c62420e4 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14701 Reviewed-by: Simon Glass <sjg@chromium.org>
2012-01-26AHCI: Make sending the SETFEATURES_XFER command optionalGabe Black
This command doesn't really do anything when talking to a SATA device, and sending it confuses some of them. This change makes sending the command optional, and defaults to not. The situations where it should be sent are not the common case. With the standard SSD in the machine, here are some times with the option turned off: 1. 8277 2. 8273 3. 8050 And turned on: 1. 8303 2. 8155 3. 8276 Sending that command seems to have no meaningful effect on performance. BUG=chrome-os-partner:7714 TEST=Booted off an SSD that hadn't worked with U-Boot previously. This SSD was lent to us by Grant, and has chips labelled as Toshiba NV6424, Taiwan 11159AE P, and TC58NVG5D2FTA10. Change-Id: I750a6c7931a95a1529e0b99ee98528a549824ee4 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/14916 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
2012-01-26lzma: update to lzma sdk 9.20Stefan Reinauer
Our security reviewers suggested that we update all copies of lzma sdk code used in boot loaders to the latest version. Updated code taken from latest lzma sdk release 9.20 at http://downloads.sourceforge.net/sevenzip/lzma920.tar.bz2 Signed-off-by: Stefan Reinauer <reinauer@google.com> BUG=chromium-os:24221 TEST=boot on stumpy, see it still work Change-Id: I884546f3aaf013a083fa25f306d7d921245fbc16 Reviewed-on: https://gerrit.chromium.org/gerrit/14757 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
2012-01-25Improve AHCI debuggingStefan Reinauer
- remove unused ssleep macro - add some useful debugging information Signed-off-by: Stefan Reinauer <reinauer@google.com> BUG=none TEST=boot latest firmware on stumpy, no functional change. Change-Id: Ieef3c199225b8c1aa979dfebf8a6f2178d5aa316 Reviewed-on: https://gerrit.chromium.org/gerrit/14836 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org>
2012-01-25AHCI: cosmetics and cleanupStefan Reinauer
- print the correct speed - print all the AHCI capability flags (information taken from Linux kernel driver) - clean up some comments Signed-off-by: Stefan Reinauer <reinauer@google.com> BUG=chrome-os-partner:7714 TEST=See the following string in bios_log: AHCI 0001.0300 32 slots 6 ports 6 Gbps 0x3 impl SATA mode Change-Id: Ib32dbeddd0714359948e2bec033b2ec7aabbdb10 Reviewed-on: https://gerrit.chromium.org/gerrit/14754 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2012-01-25vbexport: report correct number of scsi drivesStefan Reinauer
Right now our code makes the assumption that there always is one SCSI drive in the system (the AHCI attached SDD). However, this might not be the case. This patch prevents vboot from using an uninitialized disk entry when instead it should go into recovery mode. BUG=chrome-os-partner:7716 TEST=none Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I761bbb3c92a60d4205a217c7b025f699deed83b0 Reviewed-on: https://gerrit.chromium.org/gerrit/14753 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Commit-Ready: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2012-01-22usb: add special keys handling to the HID driverVincent Palatin
Generate ANSI 3.64 sequences to handle arrow keys, Fx and other special keyboard keys. Signed-off-by: Vincent Palatin <vpalatin@chromium.org> BUG=chrome-os-partner:7666 TEST=on Stumpy in recovery mode, press arrow keys and see the language of the message change. Change-Id: I4560ca0c68ea5a9da4cde8247ea5ecc74938f84a Reviewed-on: https://gerrit.chromium.org/gerrit/14596 Tested-by: Vincent Palatin <vpalatin@chromium.org> Reviewed-by: Terry Lambert <tlambert@chromium.org> Commit-Ready: Terry Lambert <tlambert@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com> (cherry picked from commit 93954c89f388f3f36149504ebbcd6f6a70fd3a8f) Reviewed-on: https://gerrit.chromium.org/gerrit/14606 Commit-Ready: Vincent Palatin <vpalatin@chromium.org>
2012-01-19CHROMIUM: Arm: tegra: mmc: change bounce buffer printf to debugPuneet Saxena
BUG=chromium-os:23496 TEST=Built ok for Cardhu Walgui and Seaboard. Tested on Waluigi. Change-Id: I86d029e09713b0d8f885b97d7ec34119266dfe11 Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/13699 Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-19Enable frequency selection in VbExBeep().Bill Richardson
BUG=none TEST=manual In dev-mode, press "Ctrl-U" with no USB stick inserted. If "crossystem dev_boot_usb" is 0, you'll hear two 400Hz beeps. If "crossystem dev_boot_usb" is 1, you'll hear one 200Hz beep. Signed-off-by: Bill Richardson <wfrichar@google.com> Change-Id: Ifd45a067ec8b922863331f13f3f4525ef40f7346 Reviewed-on: https://gerrit.chromium.org/gerrit/14529 Tested-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Commit-Ready: Bill Richardson <wfrichar@chromium.org>
2012-01-18Make the memory wiping code use arch_phys_memsetGabe Black
By using arch_phys_memset, the wiping code doesn't need to worry about what addresses can be accessed by memset or how to actually get at them. BUG=chrome-os-partner:7579 TEST=From the original, larger patch: Built and booted on Lumpy, Stumpy, and Kaen. Looked at the log to see that the regions in high memory are listed as cleared. Artificially injected a range to "clear" with 0xA5 and then 0x5A which was over the framebuffer and covered part or all of the screen on Lumpy. Verified that the screen was partially or completely filled with an appropriate looking color. Had U-Boot print the PDTs it was generating to verify that the high address bits were preserved. Identity mapped only some of memory and verified that things that should be mapped were accessible and things that shouldn't be weren't. Signed-off-by: Gabe Black <gabeblack@google.com> Change-Id: Ia1859e8df5a0bbe41839a697829dfc775e1b1e48 Reviewed-on: https://gerrit.chromium.org/gerrit/14419 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Gabe Black (Do Not Use) <gabeblack@google.com> Tested-by: Gabe Black (Do Not Use) <gabeblack@google.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-16 05:54:52 +0000