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2015-03-03Prepare v2015.04-rc3v2015.04-rc3Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-02mpc837xerdb: "fix Calling __hwconfig without a buffer" warningSinan Akman
Signed-off-by: Sinan Akman <sinan@writeme.com>
2015-03-02Merge branch 'xnext/zynqmp' of git://www.denx.de/git/u-boot-microblazeTom Rini
2015-03-02arm64: Add Xilinx ZynqMP supportMichal Simek
Add basic Xilinx ZynqMP arm64 support. Serial and SD is supported. It supports emulation platfrom ep108 and QEMU. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-02atngwmkii: convert to generic boardAndreas Bießmann
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-03-02kconfig: remove unneeded U-Boot extension codeMasahiro Yamada
This code was introduced to support the multiple .config configuration in U-Boot. We do not need it any more. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-02serial: ns16550: Fix build error due to a typoAxel Lin
Fix trivial typo. Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Axel Lin <axel.lin@ingics.com>
2015-03-02MAINTAINERS, git-mailrc: Update my email addressTom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-02armv7.h: Add <asm/io.h>Tom Rini
With a389531 we now call readl() from this file so add <asm/io.h> so that we have a prototype for the function. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-02Merge git://git.denx.de/u-boot-usbTom Rini
2015-03-02Merge git://git.denx.de/u-boot-pxaTom Rini
2015-03-02MAINTAINERS: Add F: drivers/usb/gadget to DFU custodian responsibilityLukasz Majewski
After discussion during the last u-boot mini summit with USB maintainer - Marek Vasut - it has been decided, that gadget development should be coordinated by DFU custodian. Such patch formalizes current development status. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
2015-03-02pxa: colibri_pxa270: integrate latest validated register settingsMarcel Ziswiler
Integrate latest validated register settings from Toradex WinCE BSP 4.2 working accross all module versions from early V1.x, V1.2D, V2.2B to V2.4A. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: colibri_pxa270: remove CONFIG_ENV_ADDR_REDUNDMarcel Ziswiler
Usually not required for NOR flash. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: colibri_pxa270: fix wrong comment about voipac ethernet chipMarcel Ziswiler
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: colibri_pax270: fix CONFIG_BOOTCOMMANDMarcel Ziswiler
While 'mmc init' is no longer required the address to bootm the kernel from NOR flash was wrong. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: colibri_pxa270: avoid overwriting factory configuration blockMarcel Ziswiler
Specify a CONFIG_BOARD_SIZE_LIMIT of 256 KB in order to avoid overwriting the factory configuration block located at offset 0x40000 in NOR flash. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: colibri_pxa270: disable loadb/s commands and long helpMarcel Ziswiler
To save more than 20 KB of precious space in NOR flash get rid of the following configuration options: CONFIG_CMD_LOADB CONFIG_CMD_LOADS CONFIG_SYS_LONGHELP Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: colibri_pxa270: migrate to generic boardMarcel Ziswiler
Migrate Toradex Colibri PXA270 to use CONFIG_SYS_GENERIC_BOARD. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-02pxa: balloon3/colibri_pxa270: fix environment optionally being nowhereMarcel Ziswiler
I couldn't quite figure out whether or not CONFIG_SYS_ENV_IS_NOWHERE actually ever worked but nowadays this is called CONFIG_ENV_IS_NOWHERE. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: balloon3: fix comment about sdram banksMarcel Ziswiler
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02pxa: balloon3: remove nowhere used symbol CONFIG_SYS_MEM_BUF_IMPMarcel Ziswiler
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-02remove nowhere used symbol CONFIG_SYS_CLKS_IN_HZMarcel Ziswiler
Basically finish what the following commit started a long time ago: 488f5d8790c451fc527fe5d2ef218f2a5e40ea17 Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> For mx35pdk/woodburn: Acked-by: Stefano Babic <sbabic@denx.de>
2015-03-02pxa: fix wrong comment about vpac270 being the arch numberMarcel Ziswiler
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2015-03-01Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2015-03-01Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini
2015-03-01Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini
2015-03-01Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini
2015-03-01ARM: UniPhier: remove SSC_WAY_SIZE and SSC_NUM_ENTRIES macrosMasahiro Yamada
Each way of the system cache has 256 entries for PH1-Pro4 and older SoCs, whereas 512 entries for PH1-Pro5 and newer SoCs. The line size is still 128 byte. Thus, the way size is 32KB/64KB for old/new SoCs. To keep lowlevel_init SoC-independent, set BOOT_RAM_SIZE to the constant value 32KB. It is large enough for temporary RAM and should work for all the SoCs of UniPhier family. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: remove stop_mpll() from PH1-Pro4 PLL initializationMasahiro Yamada
This function was intended for MN2WS0235 (what we call PH1-Pro4TV). On that SoC, MPLL is already running on the power-on reset and it makes sense to stop the PLL at early boot-up. On the other hand, PH1-Pro4(R) does not have SC_MPLLOSCCTL register, so this function has no point. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: consolidate MEMCONF setting codeMasahiro Yamada
This code is duplicated in ph1-ld4/sg_init.c and ph1-pro4/sg_init.c. Merge the same code into a new file, memconf.c. The helper functions no longer have to be placed in the header file. Also, move them into memconf.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: switch to 1CS support cardMasahiro Yamada
The 3CS support card (CONFIG_DCC_MICRO_SUPPORT_CARD) used to be used very often before, but it is recently getting a minority. Swith to the 1CS support card (CONFIG_PFC_MICRO_SUPPORT_CARD). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: support 1CS support card for all the UniPhier SoCsMasahiro Yamada
Two support card variants are used with UniPhier reference boards: - 1 chip select support card (original CPLD) - 3 chip selects support card (ARIMA-compatible CPLD) Currently, the former is only supported on PH1-Pro4, but it can be expanded to PH1-LD4, PH1-sLD8 with a little code change. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: switch to xHCI for PH1-Pro4Masahiro Yamada
PH1-Pro4 includes both EHCI and xHCI IP cores. Unfortunately, U-Boot cannot enable EHCI and xHCI support simultaneously. Some users may wish Super-Speed connection. Disable CONFIG_USB_EHCI_HCD and enable CONFIG_USB_XHCI_HCD. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01usb: UniPhier: add UniPhier on-chip xHCI host driver supportMasahiro Yamada
Support xHCI host driver used on Panasonic UniPhier platform. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
2015-03-01ARM: UniPhier: add xHCI device nodes to PH1-Pro4 device treeMasahiro Yamada
Each USB port corresponds to the following IP core: port0: xHCI (0x65a00000) SS+HS port1: xHCI (0x65c00000) HS (SS PHY is not implemented) port2: EHCI (0x5a800100) HS port3: EHCI (0x5a810100) HS Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: enable xHCI and GIO cores for PH1-Pro4Masahiro Yamada
This is necessary to use the USB 3.0 host controllers on PH1-Pro4. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: add I/O pin settings for xHCI on PH1-Pro4Masahiro Yamada
This is necessary to use the xHCI cores for PH1-Pro4. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: replace "usb-ehci" with "generic-ehci"Masahiro Yamada
EHCI host controllers have a common register interface. We may wish to implement a generic EHCI driver someday. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: move uniphier_ehci_reset() functionMasahiro Yamada
Because uniphier_ehci_reset() is only called from ehci-uniphier.c, it can be a static function there. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
2015-03-01ARM: UniPhier: remove EHCI platform devicesMasahiro Yamada
Now UniPhier platform highly depends on Device Tree configuration (CONFIG_OF_CONTROL is select'ed by Kconfig). Since the EHCI is only used on main U-Boot, we can drop platform devices of the EHCI controllers. We still keep UART platform devices because they might be useful for SPL. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Marek Vasut <marex@denx.de>
2015-03-01ARM: UniPhier: enable STDMAC for EHCIMasahiro Yamada
Deassert the reset signal and provide the clock for STDMAC core. This is necessary for the USB 2.0 host controllers. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: reset NAND core in SPL for non-NAND boot modeMasahiro Yamada
For all the UniPhier SoCs so far, the reset signal of the NAND core is automatically deasserted after the PLL gets stabled. (The bit 2 of SC_RSTCTRL is default to one.) This causes a fatal problem on the NAND controller of PH1-LD4. For that SoC, the NAND I/O pins are not set up yet at the power-on reset except the NAND boot mode. As a result, the NAND controller begins automatic device scanning with wrong I/O pins and finally hangs up. Actually, U-Boot dies after printing "NAND:" on the console unless the boot mode latch detected the NAND boot mode. To work around this problem, reset the NAND core in SPL for non-NAND boot modes. If CONFIG_NAND_DENALI is enabled, the reset signal is deasserted again in U-Boot proper. At this time, I/O pins have been correctly set up, the device scanning should succeed. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: split clkrst_init() into two functionsMasahiro Yamada
Split the current clkrst_init() into two functions: - early_clkrst_init(): called from SPL Deassert the reset signals of the memory controller and some other basic cores. - clkrst_init(): called from main U-boot Deassert the reset signals that are necessary for the access to peripherals etc. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: rename SC_CLKCTRL_CLK_* to SC_SCLKCTRL_CEN_*Masahiro Yamada
Follow the register macros in the LSI specification book. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: fix SBC init codeMasahiro Yamada
Now UniPhier SoCs only work with CONFIG_SPL and the function sbc_init() is called from SPL. The conditional #if !defined(CONFIG_SPL_BUILD) has no point any more. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: fix comments in PH1-Pro4 SBC codeMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01serial: UniPhier: move LCR register setting to probe functionMasahiro Yamada
We do not have to set the LCR register every time we change the baud-rate. We just need to set it up once in the probe function. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01serial: UniPhier: use 32 bit register accessMasahiro Yamada
For PH1-Pro4, the 8 bit write access to LCR register (offset = 0x11) is not working correctly. As a side effect, it also modifies MCR register (offset = 0x10) and results in unexpected behavior. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
2015-03-01ARM: UniPhier: update defconfigs using savedefconfigMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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