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In case USB serial downloader has been used to load U-Boot start the
serial download protocol (SDP) emulation. This allows to download
complete images such as Toradex Easy Installer over USB SDP as well.
This code uses the boot ROM provided boot information to reliably
detect USB serial downloader.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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In case USB serial downloader has been used to load U-Boot start the
serial download protocol (SDP) emulation. This allows to download
complete images such as Toradex Easy Installer over USB SDP as well.
This code uses the boot ROM provided boot information to reliably
detect USB serial downloader.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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The current mechanism using SCR/GPR registers work well when
the serial downloader boot mode has been selected explicitly
(either via boot mode pins or using bmode command). However,
in case the system entered boot ROM due to unbootable primary
boot devices (e.g. empty eMMC), the SPL fails to detect that
it has been downloaded through serial loader and tries to
continue booting from eMMC:
Trying to boot from MMC1
mmc_load_image_raw_sector: mmc block read error
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
The only known way to reliably detect USB serial downloader
is by checking the USB PHY receiver block power state...
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This macro allows to detect whether the boot ROM initialized USB
already (serial downloader). This is helpful to reliably detect
if the system has been recovered via USB serial downloader.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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In case USB serial downloader has been used to load U-Boot start the
serial download protocol (SDP) emulation. This allows to download
complete images such as Toradex Easy Installer over USB SDP as well.
This code uses the boot ROM provided boot information to reliably
detect USB serial downloader.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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The i.MX 7 boot ROM provides a structure with boot information.
The reference manual (chapter 6.6.14 Boot Information for Software
in the RM) only lists 6 boot devices, but tests have shown that
the boot device type is consistently 0xf in case the SoC has been
booted through USB Serial Downloader. Create a new boot mode for
the USB Serial Download Protocol (SDP).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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The function get_boot_device might be useful in board files,
add it to the sys_proto.h header file.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Allow optionally bringing up the Apalis type specific 4 lane PCIe port
as well as the PCIe switch as found on the Apalis Evaluation board. In
order to avoid violating the PCIe reset timing do this by overriding the
tegra_pcie_board_port_reset() function. Note however that both the
Apalis type specific 4 lane PCIe port as well as the regular Apalis PCIe
port are also left disabled in the device tree by default.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Fix PCIe port 2 on-module connected to the Intel i210 gigabit
Ethernet chip.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Add some more comments describing the various PCIe ports available.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Introduce a weak tegra_pcie_board_port_reset() function by default
calling the existing tegra_pcie_port_reset() function. Additionally add
a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe
port index if required. This allows overriding the PCIe port reset
functionality from board specific code as e.g. required for Apalis T30
and Apalis TK1.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Fix as3722_ldo_enable() functions for LDOs with an index > 7. Turns out
there are actually two separate AS3722_LDO_CONTROL registers
AS3722_LDO_CONTROL0 and AS3722_LDO_CONTROL1. Actually make use of both.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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As the AS3722 GPIO0 is also a not connected on our Apalis TK1 module
explicitly configure it to high-impedance as well.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Make sure the Apalis GPIO 8 aka FAN_EN is on when using Apalis TK1
modules.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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If the Cortex-M4 is running we carve out 1MiB of memory for
rpmsg communication and/or the firmware running from DDR.
On the Colibri iMX7D this area is in the middle of its 512MiB
of memory. Linux seems not to handle the sparse memory area
well and shows only the first 254MiB of memory as available.
Enabling highmem seems to work around this issue. However,
enabling highmem is not ideal since memory from the highmem
area is more restricted then lowmem.
Aligning the carved out memory to ARM Linux' PMD (page middle
directory) size of 2MiB seem to allow allocating all available
memory as lowmem. Hence increase the carveout region to 2MiB.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Add an optional -y parameter to 'cfgblock create’ to simplify
automation.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Use ext4 file system by default.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Use ext4 file system by default.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Use a slower speed of 10 kbit/s for DDC to improve reliability.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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By keeping RESET_MOCI_CTRL low we avoid explicitly releasing
RESET_MOCI#.
Please note that module hardware versions up to V1.1A will already
release RESET_MOCI# in hardware coming out of reset.
Please further note that with this change the USB hub on the Apalis
Evaluation board is kept in reset in U-Boot and therefore none of its
ports are operational in U-Boot.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Fix USB OTG power enable aka USBO1_EN which on Apalis T30 is connected
to the T30 ball GEN2_I2C_SCL.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Set vidargs default to VGA resolution
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Make sure CMA memory is not greater than 50% of available physical
memory.
Allow user to change the CMA memory via 'cma-size' U-Boot environment
variable.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Trying to boot from an ext4 rootfs fails due to us defaulting to ext3.
While the downstream T20/T30 L4T kernel has issues with ext4 later TK1
L4T should work just fine with it. Hence enable ext4 for sdboot and
usbboot on TK1.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Using the SDP (Serial Download Protocol) in combination with some
USB hosts showed warnings such as:
EP0/out FAIL info=4018080 pg0=8df79500
ERROR: Unexpected report 4
at ../drivers/usb/gadget/f_sdp.c:327/sdp_rx_data_complete()
It seems that the descriptors are somehow not ready/overwritten
or similar. The exact cause and issue is not unterstood, but a
delay after handle_setup() seems to resolve the issue with three
different USB host machines which had previously shown the issue
regularly.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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If config block support is enabled, USB gadget modes unconditionally
use Toradex Product ID as USB PID. Some applications might prefer a
different and/or static USB PID. Add a Kconfig configuration option
to descide whether to use USB PID from config block or the fallback
config option CONFIG_G_DNL_PRODUCT_NUM.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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The OCRAM_S alias for Cortex-M4's system bus is missing. Add
the alias so that firmwares which have code linked in that
area can be loaded successfully.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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Use the same on-flash bad block table in U-Boot as we already
use/maintain in Linux.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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Add config option which allows to enable on flash bad block table
support. This effectively has the same effect as when using the
device tree property "nand-on-flash-bbt" in Linux.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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We have two commands to change the bootmode fuses:
mfgr_fuse which set fuse 0/5 and 0/6
and
updt_fuse which burns bit 4 of 0/5.
Before Image 2.6 we fused in mfgr_fuse 0x5062, which boots
from the user partition of the eMMC.
To workaround certain hangs we moved to fastboot mode and
using the first bootpartition of the eMMC requiring a fuse
value of 0x5072 which could be achived by the then added
updt_fuse command. At the same time the mfgr_fuse command
was changed to also fuse 0x5072, revert that second change
so that one can fuse both values, one with just mfgr_fuse
and the later with mfgr_fuse;updt_fuse.
Note that the mfgr_fuse command is only needed at module
production time, a customer might need to use updt_fuse
when upgrading an older module to be compatible with a
newer image. The command is integrated into the image
update scripts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Colibri iMX6 V1.1 HW can use the PMIC GEN3 to power the NVCC_SD1.
Change the settings fused into the PMIC's OTP to powerup with
GEN3 set to output 3.3V.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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The old geometry used to round down the ECC strength. This allows to
compile a U-Boot which has the same ECC format used in current Linux
kernels by adding this line to the board configuration header file:
#define CONFIG_NAND_MXS_BCH_LEGACY_GEO
Note that this leads to 14 bit ECC per 512 byte block, which requires
2149 bytes overall. The SoC's boot ROM is only able to handle pages
up to 2112 bytes, hence this format cannot be used for the boot/flash
configuration block (BCB/FCB).
Note that upstream Linux can also calculate ECC using JEDEC/ONFI
NAND chip parameters by using the fsl,use-minimum-ecc device tree
property.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Brandon Shibley <brandon.shibley@toradex.com>
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Discard the unused usdhc3_emmc_pads iomux table to prevent the following
build time warning:
u-boot-toradex.git/board/toradex/colibri_imx7/colibri_imx7.c:112:29:
warning: ‘usdhc3_emmc_pads’ defined but not used
[-Wunused-const-variable=]
static iomux_v3_cfg_t const usdhc3_emmc_pads[] = {
^~~~~~~~~~~~~~~~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Discard the unused vga_pads iomux table to prevent the following build
time warning:
u-boot-toradex.git/board/toradex/apalis_imx6/apalis_imx6.c:580:29:
warning: ‘vga_pads’ defined but not used [-Wunused-const-variable=]
static iomux_v3_cfg_t const vga_pads[] = {
^~~~~~~~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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Make sure TPS62362 set 0 defaults to 1.200V as the Linux kernel may
switch to set 0 using TPS65911 GPIO1 (EN_CORE_DVFS_N) connected to
TPS62362 VSEL1 prior to actually setting it to a sane value dependent on
the current CPU frequency.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
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With CONFIG_SPL_SILENT_CONSOLE the 'U-Boot SPL...' version string is
no longer linked into the SPL binary.
Factor out the version string and make sure that it is not optimize
away by lto.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits also on UARTs not used in the boot loader to prevent
an interrupt storm when Linux enables the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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If the UART is used in DTE mode the RI and DCD bits in UCR3 become
irq enable bits. Both are set to enabled after reset and both likely
are pending.
Disable the bits to prevent an interrupt storm when Linux enables
the UART interrupts.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This adds a Kconfig SPL_SILENCE_CONSOLE which allows to suppress any
console output which in the normal program flow is printed in the SPL.
Error messages and the likes will still be printed.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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This adds a Kconfig DISABLE_CONSOLE_IN_SPL which allows to suppress any
console output in the SPL.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use i.MX bootaux support introduced for i.MX 6SoloX/i.MX 7 for
Vybrid too. Starting the Cortex-M4 core on Vybrid works a bit
differently, namely it uses a GPR register to define the initial
PC. There is no way to define the initial stack (the stack is
set up in a boot ROM). This is not a problem for most firmwares
since the firmwares startup code reinitialize the stack as part
of the firmware startup code anyway.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Move Freescale/NXP Vybrid to a standard arch/board approach, similar
to what has been done to i.MX 6 earlier in commit 89ebc82137be ("ARM:
mx6: move to a standard arch/board approach").
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Support elf firmware files for the auxiliary Cortex-M4 core. This
has the advantage that the user does not need to know to which
address the binary has been linked to. However, in order to load
the elf sections to the right address, we need to translate the
Cortex-M4 core memory addresses to primary/host CPU memory
addresses (U-Boot is typically running on the A7/A9 core). This
allows to boot firmwares from any location with just using
bootaux, e.g.:
tftp ${loadaddr} low_power_demo.elf && bootaux ${loadaddr}
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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For i.MX 6SoloX/i.MX 7 simple binary files are used to boot the
auxiliary CPU core (Cortex-M4). This patch moves the "parsing" of
this binary firmwares to the SoC independent code. This allows to
add different binary formats more easily.
While at it, also move the comment about the inner workings how
to boot the Cortex-M4 core to a more appropriate location.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Use device-tree fixup to communicate the MTD partitions to the
kernel. Remove mtdparts from the kernel command line.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Disable 3.3V Ethernet and ARM rail when entering sleep mode.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Commit 3f353ceccbbb ("vf610: refactor DDRMC code") changed on-die
termination (ODT) values from 120 Ohm to 60 Ohm and enabled a static
read/write leveling which has not been tested with this board. This
commit reverts both changes and makes sure that memory gets
initialized as it has been done before the mentioned commit.
Fixes: 3f353ceccbbb ("vf610: refactor DDRMC code")
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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