Age | Commit message (Collapse) | Author |
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Set USB vendor and product ID of the module when using DFU. This
allows to identify the module over USB and act accordingly if
necessary (e.g. flash different version or root filesystem or
similar use cases).
Also the serial number of the USB device is visible by using the
lsusb utility:
$ lsusb -d 1b67: -v
Bus 002 Device 092: ID 1b67:0018
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 2.00
bDeviceClass 2 Communications
bDeviceSubClass 2 Abstract (modem)
bDeviceProtocol 0
bMaxPacketSize0 64
idVendor 0x1b67
idProduct 0x0018
bcdDevice 2.21
iManufacturer 1 Toradex
iProduct 2 USB download gadget
iSerial 3 4799890
...
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Switch default console to ttyLP0 by default since future image
will use the mainline kernel which uses the lpuart driver.
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Fix the DIV_SELECT definition for PLL3 and PLL7, but don't set
it in the PLL control registers since USB needs a clock multiplier
of 20 to get 480MHz.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Improve the evaluation of the reset source. Bit description according
to latest reference manual rev. 7.
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Environment range is used to move the config block to the next block
in case the first erase block of the environment is marked as bad
block. The absence of this config made saving of the environment
impossible when the first block of the environment partition was
marked bad.
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Fix usage of multiple USB controllers by setting returning ENODEV
for the respective controllers when trying to initialize them in
the non-standard mode (on USBH allows only host mode, on USBC allow
only device mode).
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Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Enable clock and PLL's for USB
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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This patch disables subpage writes for vf610_nfc nand
driver. This is required as without this fix, writing
unaligned u-boot images with DFU results in a hang.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Switch to Thumb to builds which are considerable smaller:
415512 19. Nov 14:52 ../u-boot-toradex/u-boot.imx
vs.
313112 19. Nov 14:55 ../u-boot-toradex/u-boot.imx
Especially download time through serial loader is linearly
to size, hence download time is faster by 25% too.
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Resynchronize memcpy/memset with kernel and build them explicitly
in Thumb2 mode (unified syntax). Those assembler files can be
built and linked in ARM mode too, however when calling them from
Thumb2 built code, the stack got corrupted and the copy did not
succeed (the exact details have not been traced back). Hoever,
the Linux kernel builds those files in Thumb2 mode. Hence U-Boot
should build them in Thumb2 mode too when CONFIG_SYS_THUMB_BUILD
is set.
Also add implicit-it=always to AFLAGS when building for Thumb2.
Furthermore add no-warn-deprecated option to AFLAGS to rid of
deprecated unified syntax:
arch/arm/lib/memcpy.S: Assembler messages:
arch/arm/lib/memcpy.S:153: Warning: conditional infixes are deprecated in unified syntax
arch/arm/lib/memcpy.S:154: Warning: conditional infixes are deprecated in unified syntax
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Improve error handling in common configblock code. Also fixes a
warning when loading configblock from NAND (unused variable offset).
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In order to support dual ethernet configurations, a second MAC
address is needed. Toradex assignes two addresses for each module,
one address is the serial number, and the second is the serial
number with an offset of 0x100000.
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Without this, when CONFIG_ENV_VARS_UBOOT_CONFIG is active we get
a compile time error when doing 'make env'.
In file included from tools/env/fw_env.c:117:0:
include/env_default.h:110:11: error: expected ‘}’ before ‘CONFIG_SYS_ARCH’
When building U-Boot this is included indirectly by the compiler switch
-include
/home/trdx/git.toradex.com/u-boot-2014.10-toradex/include/linux/kconfig.h
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This patch fixes operation of our on-board AX88772B chip without EEPROM
but with a ethaddr coming from the regular U-Boot environment. This is
a forward port of some remaining parts initially implemented by
Antmicro.
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DDR leveling parameters are board specific, hence we should be able
to set them differently per board. Extract the leveling parameters
in a seperate struct to be able to set them per board.
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With the new JEDEC standardized initialization parameter, the
initialization takes longer than 200us. Use the status bit to
determine whether the memory initialization was completed.
Also use recommended JEDEC defaults for t_INIT.
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On VF50, we can use PLL1 as DDR clock since the CPU is clocked
with 400MHz as well. This saves some power (measured around ~10mW).
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Add Toradex config block support using the new common config block
handling. Extend common config block handling to support reading
from NAND too.
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Migrate Apalis/Colibri T30 to U-Boot 2014.10 and integrate new update
concept based on Apalis/Colibri iMX6 and Colibri VF50/VF61.
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Add common confg block hanlding. The config block is a Toradex
specific data structure containing manufacturing data and static
module information such as ethernet address.
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Now that the FW/SW synchronisation is fixed we can reduce the hack
introduced by the following commit:
02bf24ad4a7c882e25771f656b973d5458695cf0
e1000: i210/i211 hack
Note that we leave one final hack for now required for unprogrammed
i210 operation.
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I finally had a look at the datasheet and spotted an additional
register address difference between regular E1000 and i210/i211 chips.
This patch fixes this and now successfully works on programmed
i210/i211 as well as unprogrammed i211.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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Commit 951860634fdb557bbb58e0f99215391bc0c29779 may have changed
the logic unintentially from "if (!(swfw_sync & (fwmask | swmask)))"
to "if ((swfw_sync & swmask) && !(swfw_sync & fwmask))". This change
breaks some e1000 NIC with a message "ERROR: Unable to read EEPROM!".
Signed-off-by: York Sun <yorksun@freescale.com>
CC: Marek Vasut <marex@denx.de>
CC: Tim Harvey <tharvey@gateworks.com>
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Migrating our BSPs towards mainline U-Boot I noticed it suddenly booting
slower. With mainline Linux I noticed about a 1 to 2 second increase
while booting downstream L4T takes 10 to 15 seconds longer!
This reverts commit 858530a8c0a7ce7e573e513934804a00d6676813.
Conflicts:
drivers/serial/Makefile
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Synchronize environment with i.MX6 U-boot. Load device tree
unconditionally, but set parameter to device tree file only when
loading succeeded. Also load the device tree when using SD or NFS
boot.
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Switch to zImage for SD and NFS-Boot. Explicitly define the load
address in all commands.
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Newer UBI implementation do not allow small UBI partitions since
the amount of bad blocks is now calculated by the size of the MTD
partition (instead volume size). On small partitions, this leads
to UBI partitions only consisting of reserved blocks. Therefor we
now use only one volume, which also allows better wear leveling
and bad block management.
Since it is needed to attach the whole UBI partition, mounting
the UBI filesystem would be a good option. Measurement showed that
the overhead reading from UBI filesystem compared to read from
a UBI volume is minimal (below 100ms).
Furthermore, this also adds support to load device trees for newer,
device tree based kernels. By setting the variable fdt_board, the
scripts read the FDT file and try to pass this to the kernel. The
FDT file will be concatinated:
${soc}-colibri-{fdt_board}.dtb
E.g. when fdt_board is set to "eval-v3", the scripts will load the
device tree file "vf610-colibri-eval-v3.dtb" on a Colibri VF61.
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Vybrid product family consists of several rather similar SoC which
can be determined by softare during boot time. This allows to use
the variable ${soc} for Linux device tree files.
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Enables caches which provides a rather huge speedup of the boot
loader. Also mark the on-chip RAM as cachable since this is the
area U-Boot runs from.
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Since we use the same UART to download U-Boot and get the U-Boot
prompt, it is quite hard to switch between the download program
and the terminal emulator within the boot delay. This patch
disables the automatic boot by setting the bootdelay to -1 when
using the recovery mode (serial downloader).
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Detect VF5xx CPU's by reading the CPU count register. Also we can
guess the second number of the CPU type (VF6x0) which indicates the
presence of a L2 cache.
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The boot ROM was not able to detect bad blocks in the U-Boot area
due to disabled "bad block marking swap" functionality. The
description of this field is a bit unclear, but tests show that
skipping bad blocks in U-Boot area only work if this field is set
to 0.
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Enable the SCSC (Slow Clock Source Controller) and select the
external 32KHz oscillator. This improves accuracy of the RTC.
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This adds initial support for Colibri VF50/VF61 based on Freescale
Vybrid SoC. The board support package is based on Freescale Tower
board, with following differences:
- CPU clocked at 500MHz
- Use PLL2 as DDR3 clock (400MHz)
- New Machine ID
- Console on UART1 (Colibri UART_A)
- Ethernet on FEC1
- Enabled command line editing
- PLL5 based RMII clocking (e.g. no external crystal)
- UART_A and UART_C I/O muxing
- Boot from OCRAM gfxRAM
- Boot from NAND by default
Tested on Colibri VF50/VF61 booting using serial loader over UART.
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Add an additional target which prepends the u-boot.imx image with
0x400 padding bytes. On Vybrid, this is required for NAND boot
devices. The configuration CONFIG_IMX_NAND enables this image
for a board.
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Add writebcb command which creates a NAND Boot Configuration Block
at the beginning of the active flash device. The offset of the
boot firmware are specified using arguments, at least one location
is mandatory.
Currently only the FCB (Firmware Configuration Block) is supported,
the DBBT (Discovered Bad Block Table) is optional and is not
used currently.
The firmware, e.g. U-Boot (along with the IVT header and a 0x400
long prefix) need to be written to NAND seperatly.
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The i.MX V2 headers total size is 0x7fc. The header is placed
in front of the U-Boot binary which of course is aligned to
text base. Hence the header starting point is not page
aligned (e.g. at 0x3f400404). This is still a valid header,
which boots fine using serial loader. However, the image
fails to boot from NAND (tested on a VF61x SoC).
Most parts of the header have a length of a multiply of 16
bytes.The rest of the header is filled with 8 bytes long DCD
data. Only the boot data header is 3 word long (12 bytes).
This patch makes sure the whole image is exactly 0x800 by
adding one padding word after the boot data header. Since
the individual data structures are referenced by pointers,
this still results in a valid i.MX V2 header while
maintaining page alignment.
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In order to avoid code duplication move the DDR initialization to
the common place under imx-common. Currently, only TREF, TRFC,
COL_DIFF and ROW_DIFF can be choosen from board file.
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Prepare v2014.10
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Signed-off-by: Tom Rini <trini@ti.com>
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Currently uboot wrongly uses 25mV / step for dcdc3, this is a copy and paste
error introduced when adding the axp152_mvolt_to_target during review of the
axp152.c driver. This results in u-boot setting Vddr to 2.3V instead of 1.5V.
This commit fixes this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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With the introduction of CONFIG_LOCALVERSION support we cannot build
tools without having a config file (as we won't know our PLAIN_VERSION
until then).
Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Tom Rini <trini@ti.com>
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Now with everything in place actually enable i210/i211 aka gigabit
Ethernet over PCIe support.
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Hack driver to avoid the following error for now
e1000: e1000#0: ERROR: Hardware Initialization Failed
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This patch adds support for i211 as well as unprogrammed aka tools only
i210/i211 chip support.
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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This network interface card in found on the NVIDIA Jetson TK1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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