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2021-08-30kp_imx53: Switch to using a local namespace for ID EEPROMTom Rini
This platform does not use any of the standard EEPROM functionality and instead provides its own. Use a local namespace for the I2C related defines to access the EEPROM. Cc: Lukasz Majewski <lukma@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <lukma@denx.de>
2021-08-30powerpc: Remove unused FCC ethernet codeTom Rini
This code is no longer used, remove it. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30exynos: Update environment macros a bitTom Rini
Rework the default environment a bit to not use non-standard CONFIG_ENV_... names and similar one-off CONFIG names. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-30arm: keystone2: Rename CONFIG_ENV_KS2_BOARD_SETTINGSTom Rini
Rename CONFIG_ENV_KS2_BOARD_SETTINGS to ENV_KS2_BOARD_SETTINGS so that it better fits with the rest of the environment addition macros. Cc: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30aristainetos2: Rename CONFIG_EXTRA_ENV_BOARD_SETTINGSTom Rini
Rename CONFIG_EXTRA_ENV_BOARD_SETTINGS to EXTRA_ENV_BOARD_SETTINGS in order to not further add to the CONFIG namespace. Cc: Heiko Schocher <hs@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-08-30usb: dwc2: Rename CONFIG_DWC2 namespace to DWC2Tom Rini
There are a number of DWC2 configuration options that are set in dwc2.h and referenced in dwc2.c only. Move these out of the CONFIG_DWC2 namespace and in to the DWC2 namespace. Note that hikey was defining an option that was already always enabled, so we can remove that hunk. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30Prepare v2021.10-rc3Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-30configs: Resync with savedefconfigTom Rini
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-27Merge tag 'xilinx-for-v2021.10-rc3' of ↵Tom Rini
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.10-rc3 xilinx: - Disable CONFIG_ARCH_FIXUP_FDT_MEMORY - Print information about cpu via soc drivers and enable DISPLAY_CPUINFO - Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT zynq: - Wire single QSPI - Use power-source instead of io-standard properties - Enable nor on zc770-xm012 zynqmp: - Change handling around multi_boot() - Setup offset for u-boot.itb in spi - Generate run time dfu_alt_info for capsule update - Use explicit values for enums (zynqmp_firmware.h) - Enable RTC/SHA1/BUTTON/BUTTON_GPIO command - Disable WDT driver by default - Bind usb/scsi via preboot because of EFI - DT updates/fixes - Add soc driver - Fix SPL SPI boot mode versal: - Add soc driver sdhci: - Update tap delay programming for zynq_sdhci driver cmd: - Fix RTC uclass handling in date command - Update pwm help message - Update reset help message watchdog: - Fix wwdt compilation rtc: - Deal with seq alias in rtc uclass - Add zynqmp RTC driver fdt: - Add kernel-doc for fdt_fixup_memory_banks()
2021-08-26xilinx: zynqmp: Enable stack relocation to DDRMichal Simek
There is no space in OCM for SPL stack because the space in OCM is occupied by TF-A. That's why move relocate stack to DDR to 0x18000000 address and also enable SPL_SIZE_LIMIT not to be more then 0xfffea000 which is default address for TFA. It is good to summarize current DDR usage in SPL flow. 0-0x80000 is used for BSS (CONFIG_SPL_BSS_START_ADDR, CONFIG_SPL_BSS_MAX_SIZE) 0x100000 is used for DTB passing address (CONFIG_XILINX_OF_BOARD_DTB_ADDR) 0x17fffe70 - CONFIG_SPL_STACK_R_ADDR - is used for GD 0x18000000 is used for SPL stack (CONFIG_SPL_STACK_R_ADDR) 0x20000000-0x21000000 is used for SPL malloc area (CONFIG_SYS_SPL_MALLOC_START, CONFIG_SYS_SPL_MALLOC_SIZE) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Update descriptions for u-boot.itsMichal Simek
Use TF-A instead of ATF in description. And update generic description with removing ATF because also configurations without it are supported. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Enabling generic function for DT reselectionMichal Simek
U-Boot support board detection at run time and based on it change DT. This feature is implemented for SOM Kria platforms which contain two eeproms which contain information about SOM module and CC (Carrier card). Full U-Boot starts with minimal DT file defined by CONFIG_DEFAULT_DEVICE_TREE which is available in multi DTB fit image. It is using default setup of board_name variable initializaed to DEVICE_TREE which corresponds to CONFIG_DEFAULT_DEVICE_TREE option. When DTB_RESELECT is enabled board_detection() is called. Keep it your mind that this code is called before relocation. board_detection() is calling xilinx_read_eeprom() which fills board_info (xilinx_board_description) structure which are parsed in board_name_decode(). Based on DT configuration and amount of nvmemX aliases name of the board is composed by concatenating CONFIG_SYS_BOARD "-" <board_name> "-rev" <board_revision> "-" <cc_name> "-rev" <cc_revision>. If CC is not present or more are available it keeps going. When board name is composed and returned from board_name_decode() it is assigned to board_name variable which is used by board_fit_config_name_match() which is called via fdtdec_setup() when it goes over config options in multi dtb FIT image. From practical point of view multi DTB image is key point here which has to contain configs for detected combinations. Unfortunately as of now they have to be full DTBs and DTBOs are not supported. That's why configuration like: config_X { description = "zynqmp-board-cc"; fdt = "board", "cc"; }; needs to be squashed together with: fdtoverlay -o zynqmp-board-cc -i arch/arm/dts/zynqmp-board.dtb \ arch/arm/dts/zynqmp-cc.dtbo and only one dtb is in fit: config_X { description = "zynqmp-board-cc"; fdt = "board-cc"; }; For creating multi DTBs fit image use mkimage -E, e.g.: mkimage -E -f all.its all.dtb When DTB_RESELECT is enabled xilinx_read_eeprom() is called before relocation and it uses calloc for getting a buffer. Because this is dynamic memory it is not relocated that's why xilinx_read_eeprom() is called again as the part of board_init(). This second read with calloc buffer placed in proper position board_late_init_xilinx() can setup u-boot variables as before. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Generate different u-boot.itb for MULTI_DTB_FITMichal Simek
When MULTI_DTB_FIT is enabled fit-dtb.blob fit image is created which contain all DTBs listed by CONFIG_OF_LIST. And with DTB_RELESELECT there is a need to handle it as one file with DTBs in it not as separate DTBs in u-boot.its/itb. That's why extend mkimage_fit_atf.sh to generate u-boot.itb correctly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: dts: Make sure that all DTBs are 64bit alignedMichal Simek
Start of DTB should be 64bit aligned that's why also make sure that end is also 64bit aligned. It is not required but it is nice thing to do. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26Makefile: Align fit-dtb.blob and u-boot.itb by 64bitsMichal Simek
Enabling MULTI_DTB_FIT and DTB_RESELECT can end up with multi DTBs in FIT image placed and aligned only by 32bits (4bytes). Based on device tree specification: "Specifically, the memory reservation block shall be aligned to an 8-byte boundary and the structure block to a 4-byte boundary." is 64bit (8bytes) alignment required. That's why make sure that fit-dtb.blob and u-boot.itb as our primary target images for Xilinx ZynqMP are all 64bit aligned. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2021-08-26xilinx: zynqmp: Check that DT is 64bit alignedMichal Simek
DT needs to be 64bit aligned. If it is not fdt64_to_cpu will fail when try to read information about reserved memory. The system ends in exception without any clue what's going it. That's why detect not aligned DT and panic to show where the issue is coming from. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Add support for generic board detectionMichal Simek
Add support for changing DT at run time. It is done via board_detection() which returns platform_id and platform_version which can be used via board_name_decode() to compose board_local_name string which corresponds with DT which is should be used. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Free allocated structureMichal Simek
There is no need to keep fru_content around. Free this space. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Change board_info[] handlingMichal Simek
Origin code was allocating only pointers to struct xilinx_board_description and there was separate allocation for structure self and freeing in case of failure. The code is directly allocating space for all structures by one calloc to simlify logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Use variable for passing board_nameMichal Simek
Use variable which points to DEVICE_TREE by default. The reason for this change is to enable DTB_RESELECT and MULTI_DTB_FIT where board detection can be used for change DTB at run time. That's why there must be reference in board_fit_config_name_match() via variable instead of hardcoding it which is sufficient for that use case. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: fru: Replace spaces with \0 in detected nameMichal Simek
FRU spec expected \0 for unused symbols but unfortunately a lot of boards are using spaces instead of \0. That's why after saving it to desc->name name is checked again and all spaces are converted to \0. This will ensure that names can be used for string manipulations like concatenation. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Enable gpio-key/button driverMichal Simek
Enable button uclass and also gpio-key driver by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Enable sha1sum commandMichal Simek
Enable it for TPM usage. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26watchdog: versal: Include header file needed for dev_ functionsAshok Reddy Soma
dev_dbg, dev_err and dev_warn seems to be moved to different header file. Include dm/device_compat.h file to compile properly. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Add debug messages for boot modeMichal Simek
Add debug messages to see HW boot mode and also alternative boot mode in logs directly. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26cmd: boot: Update reset usage messageMichal Simek
The commit 573a3811edc8 ("sysreset: psci: support system reset in a generic way with PSCI") has added support for warm reset via PSCI but this hasn't been reflected in usage message and user has to look at the code how to run it. That's why update usage text to make this clear. Here is full help with updated usage: ZynqMP> help reset reset - Perform RESET of the CPU Usage: reset - cold boot without level specifier reset -w - warm reset if implemented Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@foundries.io>
2021-08-26cmd: pwm: Remove additional pwm descriptionMichal Simek
The first name is taken from command name that's why shouldn't be listed in help. And commands shouldn't be listed with <> which means value but value itself is command name. Also add description for commands to make it clear what it does. Before pwm pwm <invert> <pwm_dev_num> <channel> <polarity> pwm <config> <pwm_dev_num> <channel> <period_ns> <duty_ns> ... After: pwm invert <pwm_dev_num> <channel> <polarity> - invert polarity pwm config <pwm_dev_num> <channel> <period_ns> <duty_ns> - config PWM pwm enable <pwm_dev_num> <channel> - enable PWM output pwm disable <pwm_dev_num> <channel> - disable PWM output Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-26xilinx: Enable config to display cpuinfoT Karthik Reddy
Enable CONFIG_DISPLAY_CPUINFO to display SoC family & revision. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: common: Add function to print SoC infoT Karthik Reddy
Add print_cpuinfo() to print SoC info like family & revision. This function depends on CONFIG_DISPLAY_CPUINFO config. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: versal: Add soc_xilinx_versal driverT Karthik Reddy
soc_xilinx_versal driver allows identification of family & revision of versal SoC. This driver is selected by CONFIG_SOC_XILINX_VERSAL. Probe this driver using platdata U_BOOT_DEVICE structure which is defined at mach-versal/cpu.c. Add this config to xilinx_versal_virt_defconfig & xilinx_versal_mini_ospi_defconfig file to select this driver. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26soc: xilinx: zynqmp: Add soc_xilinx_zynqmp driverT Karthik Reddy
soc_xilinx_zynqmp driver allows identification of family & revision of zynqmp SoC. This driver is selected by CONFIG_SOC_XILINX_ZYNQMP. Add this config to xilinx_zynqmp_virt_defconfig file. Probe this driver using platdata U_BOOT_DEVICE structure which is specified in mach-zynqmp/cpu.c. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Reviewed-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26fdt_support: Add kernel-doc for fdt_fixup_memory_banks()Michal Simek
Add kernel-doc description for fdt_fixup_memory_banks() because it is implemented in one specific way and this information should be available for others to decide if their SoC conforms to it. If you don't want U-Boot to update your memory DT layout please disable CONFIG_ARCH_FIXUP_FDT_MEMORY. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-26xilinx: Disable ARCH_FIXUP_FDT_MEMORYMichal Simek
Based on DT spec you can have one memory node which multiple ranges or multiple nodes. fdt_fixup_memory_banks() is not implemented in a correct way when multiple memory nodes are present because all ranges are put it to the first memory node found. And next memory nodes are kept in DT which ends up in the same range specification in the same DT. Here is what it is happening. Origin DT. memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>; }; memory@800000000 { device_type = "memory"; reg = <0x8 0x00000000 0x0 0x80000000>; }; After fdt_fixup_memory_banks() memory@0 { device_type = "memory"; reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; }; memory@800000000 { device_type = "memory"; reg = <0x8 0x00000000 0x0 0x80000000>; }; As is visible memory@0 node got second range but there is still memory@800000000 node present and 2G range is listed twice. The solution can't be that second node is removed because it can be referenced already that's why it is better for us to disable this option for now. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26ARM: zynq: Enable smcc and nor for zc770-xm012Michal Simek
Enable cfi flash on zc770-xm012 configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26ARM: zynq: Wire single qspi on couple of boardsMichal Simek
Single configuration is working fine and no issue to enable it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26ARM: zynq: Replace 'io-standard' with 'power-source' propertySai Krishna Potthuri
Replace 'io-standard' property with 'power-source' property in all zynq dts files to be in sync with Zynq Pinctrl driver. Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: Add jedec compatible string for QSPI (Zynq/ZynqMP)Raju Kumar Pothuraju
Add missing "jedec, spi-nor" compatible string for QSPI flash node. Spi-nor framework uses this compatibility string to probe & initialize flash. With missing compatibility string we are observing below error: Zynq> sf probe 0 0 0 jedec_spi_nor spi_flash@0:0: unrecognized JEDEC id bytes: 00, 00, 00 Failed to initialize SPI flash at 0:0 (error -2) Signed-off-by: Raju Kumar Pothuraju <raju.kumar-pothuraju@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Update comment style sm-k26Michal Simek
Trivial style patch. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Fix header alignment on kv260 boardsMichal Simek
Fix header alignment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Fix node name for ds35/36 ledsMichal Simek
By dt-binding specs led nodes should have -led suffix that's why add it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26xilinx: zynqmp: Initialize usb and scsi via prebootMichal Simek
Based on thread https://lists.denx.de/pipermail/u-boot/2021-June/451828.html especially "Overall we have a deficiency in the UEFI implementation in that we cannot deal with block devices added or removed after initialization." there is a need to deal with removable media as usb/scsi/sata. That's why bridge this gap in EFI implementation by resetting usb and scsi resets to get all disks before efi_init_obj_list() is called. In our standard boot flow, where we use distro boot, order is fixed as "jtag mmc0 mmc1 qspi0 nand0 usb0 usb1 scsi0 pxe dhcp" with prioritizing boot device added by commit 2882b39d564b ("arm64: zynqmp: Setup the first boot_target at run time"). When device has ESP partition all devices should be detected because then efi_disk_register() in efi_init_obj_list() is called only once. The first such a device is sd/emmc(mmc0/mmc1) and then disks on usb/sata are not handled at all. The commit 6bb577dbb30f ("arm64: zynqmp: Disable EFI_CAPSULE_ON_DISK_EARLY") also pointed out on this issue but detection of removable media wasn't solved that's why do it now via preboot command. I have tested cases without usb and scsi and there is no problem with calling resets without devices itself. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26arm64: zynqmp: Disable WDT_CDNS driver by defaultMichal Simek
Do not enable watchdog driver in default zynqmp configuration. The reason is that not all distributions are handling watchdog properly and then expires and system resets. If someone needs watchdog in their design please enable it by hand. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Use set_control_reg from sdhci.cAshok Reddy Soma
Since set_control_reg is available in sdhci.c, use it and remove arasan_sdhci_set_control_reg(). Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Wait till sd card detect state is stableT Karthik Reddy
As per SD spec when SD host controller is reset, it takes 1000msec to detect the card state. In case, if we enable the sd bus voltage & card detect state is not stable, then host controller will disable the sd bus voltage. In case of warm/subsystem reboot, due to unstable card detect state host controller is disabling the sd bus voltage to sd card causing sd card timeout error. So we wait for a maximum of 1000msec to get the card detect state stable before we enable the sd bus voltage. This current fix is workaround for now, this needs to be analysed further. Zynqmp platform should behave the same as Versal, but we did not encounter this issue as of now. So we are fixing it for Versal only. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-26mmc: zynq_sdhci: Move setting tapdelay code to driverAshok Reddy Soma
Move tapdelay function calls to zynq_sdhci.c and make them static inline. zynqmp_tap_delay.h has function prototypes for the functions defined in tap_delays.c, which will not be needed anymore. Remove tap_delays.c and zynqmp_tap_delay.h files. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-26mmc: zynq_sdhci: Add xilinx_pm_request() method to set tapdelaysAshok Reddy Soma
Currently xilinx sdhci driver is using zynqmp_mmio_write() to set tapdelay values and DLL resets. Continue to use this for SPL and mini U-Boot where U-Boot will be executed at EL3 level. Use firmware call xilinx_pm_request() using appropriate arguments to set input/output tapdelays and also for DLL resets in regular flow(EL2). Host driver should explicitly request DLL reset before ITAP (assert DLL) and after OTAP (release DLL) to avoid issues in some cases. Also handle error return where possible. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-08-25Merge branch 'next-socfpga' of https://github.com/tienfong/uboot_mainlineTom Rini
2021-08-25arm: socfpga: Enable Intel N5X device buildSiew Chin Lim
Add defconfig for N5X to support legacy, ATF and VAB boot flow. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-25include: configs: Add Intel N5X device CONFIGsSiew Chin Lim
Add CONFIGs for N5X. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-08-25arm: dts: Add base dtsi and devkit dts for Intel N5X deviceSiew Chin Lim
Add device tree for N5X. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Ley Foon Tan <lftan.linux@gmail.com>