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Introduce Ethernet update capability via setethupdate which is
automatically tried by setupdate as well should SD and USB update fail
(e.g. neither an SD card nor an USB memory stick with our flash_blk.img
script and accompanying artefacts is inserted.
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Sort CONFIG_EXTRA_ENV_SETTINGS alphabetically in order to allow for
easy comparison with our other board configuration files.
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Update do_patch_ddr_size() to accommodate our new eMMC layout (e.g.
switch to primary eMMC boot area partition for patching).
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Enable the crc32 commands verify support as our U-Boot update scripts
make use of this in order to detect and migrate the Toradex factory
configuration block.
BTW: On the Tegras this gets already pulled in through tegra-common.h.
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Move the U-Boot environment before the config block at the end of the
first eMMC (hardware) boot area partition to be again more in line with
how this got recently changed on Apalis/Colibri iMX6.
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Move the U-Boot environment and config block to the end of the first
eMMC (hardware) boot area partition.
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Fix V1.0 hardware device tree naming after that got fixed in the kernel
sources of late:
http://git.toradex.com/cgit/linux-toradex.git/commit?id=9f1778fdaf4df8a39c761d47d8651d6279363571
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Fix various spelling issues in our Apalis/Colibri iMX6 configuration
files (e.g. UARTS vs. UARTs, u-boot vs. U-Boot, 8bit vs. 8-bit.
While at it also stop claiming sdboot having anything to do with an
8-bit SD slot on Colibri iMX6 which does not have any such at least in
its default pin muxing.
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Support L2 cache which is available on for the Cortex-A5 core on
some Vybrid SoCs (VFx1x series). Vybrid seems to use revision r3p2
of the PL310 cache controller. To enable the cache controller use
this two configuration symbols:
#define CONFIG_SYS_L2_PL310
#define CONFIG_SYS_PL310_BASE CA5_L2C_BASE_ADDR
Note: U-Boot is currently not able to detect the existence of the
L2 cache at runtime. Hence enabling these configurations leads to
a crash on SoCs which do not have a L2 cache (e.g. VF500 on
Colibri VF50)
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This helps to get rid of error -12 (ENOMEM) messages when attaching
the UBI partition.
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Use the CONFIG_ZERO_BOOTDELAY_CHECK option to allow interrupt the
boot process even if the delay is 0.
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Enable eMMC specific boot support commands by defining
CONFIG_SUPPORT_EMMC_BOOT in our Apalis/Colibri iMX6 configuration
files.
This allows switching to proper eMMC (hardware) boot area partition
booting once our update scripts can cope with this as well as follows:
Configure the eMMC to 8-bit DDR boot operation mode:
mmc bootbus 0 2 1 2
Enable booting from the (hardware) boot area partition 1 and the boot
acknowledge to be sent during boot operation:
mmc partconf 0 1 1 0
BTW: A good overview about the thematic can be found in Micron's
TN-FC-06: Booting from Embedded MMC (e.MMC) - JEDEC v. 4.41.
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Fix various comment style, indentation and spelling issues in our
Apalis/Colibri iMX6 board files.
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This resyncs the driver changes with the Linux version of the
driver. The driver received some feedback in the LKML and got
recently acceppted, the latest version can be found here:
https://lkml.org/lkml/2015/9/2/678
Notable changes are:
- On ECC error, reread OOB and count bit flips in OOB too.
If flipped bits are below threshold, also return an empty
OOB buffer.
- Return the amount of bit flips in vf610_nfc_read_page.
- Use endianness aware vf610_nfc_read to read ECC status.
- Do not enable IDLE IRQ (since we do not operate with an
interrupt service routine).
- Use type safe struct for buffer variants (vf610_nfc_alt_buf).
- Renamed variables in struct vf610_nfc (column and page_sz)
to reflect better what they really representing.
The U-Boot version currently does not support RAW NAND write
when using the HW ECC engine.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Return success/failure depending whether config block loading
succeeded or failed (e.g. if written in different ECC format or
not available at all).
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If the DCU framebuffer is not configured, the board file still
tries to call fsl_dcu_fixedfb_setup, which leads to a compile
issue. Call fsl_dcu_fixedfb_setup only if DCU is enabled.
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Follow the rename imx6q-apalis-eval_v1_0.dtb to imx6q-apalis_v1_0-eval.dtb
in the kernel.
The v1_0 denotes the Apalis module version, not the evaluation board version.
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These methods should be passed a slave device, not a bus. This matches the
old SPI interface. It is important to know which device is claiming the bus
so passing a bus is not that useful.
Reported-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Peng Fan <Peng.Fan@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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Implement early TPS6586X PMIC rail configuration setting SM0 being
VDD_CORE_1.2V to 1.2 volts and SM1 being VDD_CPU_1.0V to 1.0 volts.
While those are PMIC power-up defaults the SoC might have been reset
separately with certain rails being left at lower DVFS states which
is e.g. the case upon watchdog reset while otherwise nearly idling.
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To create the soc environment variable we concatenate two strings
on the stack. So far, strcat has been used for the first string as
well as for the second string. Since the variable on the stack is
not initialized, the first strcat may not start using the first
entry in the character array. This then could lead to an buffer
overflow on the stack.
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Set DDR property fixup also in (future) version 2.x revisions.
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Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
[add CONFIG_DM to colibri_vf_defconfig]
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Add iomux definitions for DSPI second instance.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Most of the drivers available for Vybrid are not yet converted
to OF model to use device tree model, only few drivers
like SPI and GPIO drivers use device trees.
Add separate defconfig for who needs to use device tree model.
Later this can be integrated to single defconfig.
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Add device tree files for Freescale Vybrid platform and
Toradex Colibri VF50, VF61 modules.
Device tree files are taken from upstream Kernel.
Removed the stuff which are not used/supported yet in U-Boot.
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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Move the Freescale DSPI driver over to driver model.
Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>
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The environment variable was called bootargsm4, which is somewhat
incongruent with the boot command name "m4boot". Rename the bootargs
environment variable for Cortex-M4 to m4bootargs.
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Add additional environment variable "fdt_fixup" which will be
called between device tree load command and kernel boot command.
This allows to change device tree using U-Boot scripting
environment.
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We do use PWM instance zero by default which is actually muxed for PWM
as primary function.
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Enable the display driver on Apalis T30. Unfortunately the PWM pin
muxing wasn't any good neither which made that display stay dark.
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On popular request enable the display driver on Colibri T30. A few
notes about some things encountered during porting: While analogue VGA
(e.g. via the on-carrier RAMDAC) worked just fine from the beginning
the EDT display flickered like crazy which turned out to be a pin
muxing issue. Unfortunately the PWM pin muxing wasn't any good neither
which made that display stay dark. Enjoy.
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On popular request make the display driver from T20 work on T30 as
well. Turned out to be quite straight forward. However a few notes
about some things encountered during porting: Of course the T30 device
tree was completely missing host1x as well as PWM support but it turns
out this can simply be copied from T20. The only trouble compiling the
Tegra video driver for T30 had to do with some hard-coded PWM pin
muxing for T20 which is quite ugly anyway. On T30 this gets handled by
a board specific complete pin muxing table. The older Chromium U-Boot
2011.06 which to my knowledge was the only prior attempt at enabling a
display driver for T30 for whatever reason got some clocking stuff
mixed up. Turns out at least for a single display controller T20 and
T30 can be clocked quite similar. Enjoy.
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Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384 (resp.
1536 on Colibri T20). This increases the tftp download speed
considerably.
While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to
fifty '#' independent of the downloaded file size.
While at it also fix some spacing from using spaces to tabs.
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This is a copy/paste error from the Apalis T30 configuration as there
we show the Linux framebuffer console by default on the second
framebuffer instance being the DVI-D aka HDMI one due to analogue VGA
not being available. This patch changes it for the Colibri T30 back to
the first framebuffer instance being the parallel RGB aka TFTLCD one
which usually gets converted to analogue VGA via an on-carrier RAMDAC
(e.g. at least on the Colibri Evaluation board as well as Iris this is
the case).
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Use the correct I2C instance for the I2C going to SODIMM_194/196.
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use Apalis GPIO1 to switch on VPGM
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commit 2da77958e96151295e72f8f85aee352d0b4010fe added a configuration option
to include commands used during production.
Fixing the use of the CONFIG macro.
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Some firmwares running on the secondary core rely on UART pins
muxed at start time. Mux the Vybrid UART2 (which maps to Colibri
UART_B) at startup.
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Add support for ARM global timer. This allows to save the platform
wide PIT timer for other purposes such as MQX on the secondary
Cortex-M4 core.
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Fixup the device-tree with the property fsl,has-cke-reset-pulls
which annotates that the board has pull-ups/downs which are required
to put the memory into self-refresh mode. The self-refresh mode in
turn is a requirement to put the SoC into deep sleep mode LPSTOP.
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Use device-tree fixup to communicate the MTD partitions to the
kernel. U-Boot's mtdparts environment variable will be used as
partition source for the device-tree based partition table too.
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Allow to boot eCos, MQX and bare-metal firmwares to boot on the
secondary Cortex-M4. The boot code is equal for all those firmware
types, the argument register will be set to 0 and the code will
jump to the specified entry point directly.
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Add new identifiers for Cortex-M4 related (RT)OS eCos, MQX and
Bare-metal.
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Move entry point is Thumb2 check just after reading the entry point
from the FIT image.
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Include vf610m4bootldr, a mini boot loader for the Cortex-M4 CPU
inside Freescale Vybrid SoC. The mini loader enables caches and
copies the pointer to the device tree from the platform specific
argument register (PERSISTENT_ARG1) to the Cortex-M4 r2 register,
where the Linux kernel expects the pointer. The mini loader hence
essentially takes over the parts of the m4boot command which can
not be done from the Cortex-A5 main CPU.
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Add m4boot command which allows to boot FIT images on the Cortex-M4
kernel. The command currently only supports FIT image, which allows
to provide entry point and load addresses for all boot artifacts.
Currently, the Cortex-M4 mini loader needs to be loaded manually
to Kernel loadaddr - 0x80 (e.g. 0x8f000000, if kernel is loaded at
0x8f000080).
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Do not configure all interrupts to the primary core by default since
newer Linux versions configure the MSCM interrupt router correctly
by themself. This also prevents warnings due to already routed
interrupts when booting Linux on the secondary Cortex-M4 CPU.
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Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384.
This increases the tftp download speed from ~2.5 to ~8.2MiB/s.
While at it enable CONFIG_TFTP_TSIZE which limits the progress bar
to 50 '#' indepent off the downloaded file size.
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