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2009-01-23NAND: Fix cache and memory inconsistency issueDave Liu
We load the secondary stage u-boot image from NAND to system memory by nand_load, but we did not flush d-cache to memory, nor invalidate i-cache before we jump to RAM. When the system has cache enabled and the TLB/page attribute of system memory is cacheable, it will cause issues. - 83xx family is using the d-cache lock, so all of d-cache access is cache-inhibited. so you can't see the issue. - 85xx family is using d-cache, i-cache enable, partial cache lock. you will see the issue. This patch fixes the cache issue. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23NAND: Enable nand lock, unlock featureNishanth Menon
Enable nand lock, unlock and status of lock feature. Not every device and platform requires this, hence, it is under define for CONFIG_CMD_NAND_LOCK_UNLOCK Nand unlock and status operate on block boundary instead of page boundary. Details in: http://www.micron.com/products/partdetail?part=MT29C2G24MAKLAJG-6%20IT Intial solution provided by Vikram Pandita <vikram.pandita@ti.com> Includes preliminary suggestions from Scott Wood Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23NAND: move board_nand_init to nand.hMike Frysinger
Rather than putting the function prototype for board_nand_init() in the one place where it gets called, put it into nand.h so that every place that also defines it gets the prototype. Otherwise, errors can go silently unnoticed such as using the wrong return value (void rather than int) when defining the function. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23OneNAND: Additional sync with 2.6.27Stefan Roese
- Add subpage write support - Add onenand_oob_64/32 ecclayout This has been missing and without it UBI has some incompatibilies issues with the current (>= 2.6.27) Linux kernel version. vid_hdr_offset is placed differently (2048 instead of 512) without this fix. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-01-23Add markbad functionKyungmin Park
Add missing markbad function If not, it's hang when it entered the mtd->mark_bad(). Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-01-23OneNAND: Bad block aware read/write command supportStefan Roese
Update OneNAND command to support bad block awareness. Also change the OneNAND command style to better match the NAND version. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-01-23OneNAND: Save version_id in onenand_chip structStefan Roese
The version (ver_id) was not stored in the onenand_chip structure and because of this the continuous locking scheme could be enabled on some chips. Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-23OneNAND: Fix compiler warningsStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-23mpc83xx: enable eLBC NAND support for MPC8315ERDB boardDave Liu
Signed-off-by: Dave Liu <daveliu@freescale.com>
2009-01-23Sync with 2.6.27Kyungmin Park
Sync with OneNAND kernel codes Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-01-22Merge branch 'fixes'Haavard Skinnemoen
2009-01-21Prepare v2009.01v2009.01Wolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-01-18Prepare 2009.01-rc3v2009.01-rc3Wolfgang Denk
Update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-01-18Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk
2009-01-18build system: treat all Darwin's alikeMike Frysinger
The x86 based version of Darwin behaves the same quirky way as the powerpc Darwin, so only check HOSTOS when setting up Darwin workarounds. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-17fdt_resize(): fix actualsize calculations with unaligned blobsPeter Korsgaard
The code in fdt_resize() to extend the fdt size to end on a page boundary is wrong for fdt's not located at an address aligned on a page boundary. What's even worse, the code would make actualsize shrink rather than grow if (blob & 0xfff) was bigger than the amount of padding added by ALIGN(), causing fdt_add_mem_rsv to fail. Fix it by aligning end address (blob + size) to a page boundary instead. For aligned fdt's this is equivalent to what we had before. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
2009-01-16ncb: use socklen_tMike Frysinger
The recvfrom() function takes a socklen_t, not an int. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-16Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk
2009-01-16Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk
2009-01-16sh: serial: use readx/writex accessorsJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: serial: coding style cleanupJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: Fix compile error on lowlevel_init fileNobuhiro Iwamatsu
lowlevel_init of SH was corrected to use the write/readXX macro. However, there was a problem that was not able to be compiled partially. This patch corrected this. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: Fix up rsk7203 target for out of tree buildKieran Bingham
Fix up rsk7203 target to build successfully using out-of-tree build. Signed-off-by: Kieran Bingham <kbingham@mpc-data.co.uk> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: use write{8,16,32} in all lowlevel_initJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: lowlevel_init coding style cleanupJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: update sh2/sh2a timer coding styleJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-16sh: update sh timer coding styleJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-01-14Prepare 2009.01-rc2v2009.01-rc2Wolfgang Denk
Update CHANGELOG. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-01-14cpu/mpc824x/Makefile: fix warning with parallel buildsWolfgang Denk
Parallel builds would occasionally issue this build warning: ln: creating symbolic link `cpu/mpc824x/bedbug_603e.c': File exists Use "ln -sf" as quick work around for the issue. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-01-14ppc4xx: Add loadpci command to esd's CPCI4052 and CPCI405AB boardsMatthias Fuchs
This patch adds esd's loadpci BSP command to CPCI4052 and CPCI405AB board. This requires CONFIG_CMD_BSP and CONFIG_PRAM. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-14ppc4xx: Disable pci node in device tree on CPCI405 pci adaptersMatthias Fuchs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-14ppc4xx: Cleanup CPCI405 board codeMatthias Fuchs
This patch cleans up CPCI405 board support: - wrap long lines - unification of spaces in function calls - remove dead code Use correct io accessors on peripherals. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-14ppc4xx: Enable auto RS485 mode on PLU405 boardsMatthias Fuchs
This patch turns on the auto RS485 mode in the 2nd external uart on PLU405 boards. This is a special mode of the used Exar XR16C2850 uart. Because these boards only have a 485 physical layer connected it's a good idea to turn it on by default. Signed-off-by: Matthias Fuchs <mf@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
2009-01-14Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk
2009-01-14Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
2009-01-13Some changes of TLB entry setting for MPC8572DSHaiying Wang
- Move the TLB entry of PIXIS_BASE from TLB0 to TLB1[8], because in CAMP mode, all the TLB0 entries will be invalidated after cpu1 brings up kernel, thus cpu0 can not access PIXIS_BASE anymore (any access will cause DataTLBError exception) - Set CONFIG_SYS_DDR_TLB_START to 9 for MPC8572DS board. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2009-01-13Change DDR tlb start entry to CONFIG param for 85xxHaiying Wang
So that we can locate the DDR tlb start entry to the value other than 8. By default, it is still 8. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2009-01-13Change PCIE1&2 deciide logic on MPC8544DS board more readableRoy Zang
The IO port selection for MPC8544DS board: Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 This patch changes the PCIE12 and PCIE2 logic more readable. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13PCIE2 and PCIE3 are decided by corresponing bit in devdisr instead of PCIE1 bitRoy Zang
PCIE2 and PCIE3 should be decided by corresponing bit in devdisr instead of PCIE1 bit. On MPC8572DS board, PCIE refers to PCIE1. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13Fix IO port selection issue on MPC8544DS and MPC8572DS boardsRoy Zang
The IO port selection is not correct on MPC8572DS and MPC8544DS board. This patch fixes this issue. For MPC8572 Port cfg_io_ports PCIE1 0x2, 0x3, 0x7, 0xb, 0xc, 0xf PCIE2 0x3, 0x7 PCIE3 0x7 For MPC8544 Port cfg_io_ports PCIE1 0x2, 0x3, 0x4, 0x5, 0x6, 0x7 PCIE2 0x4, 0x5, 0x6, 0x7 PCIE3 0x6, 0x7 Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
2009-01-13mpc8610hpcd: Fix PCI mapping conceptsBecky Bruce
Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-01-13sbc8641d: Fix PCI mapping conceptsBecky Bruce
Rename _BASE to _BUS, as it's actually a PCI bus address, separate virtual and physical addresses into _VIRT and _PHYS, and use each appopriately. This makes the code easier to read and understand, and facilitates mapping changes going forward. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-01-12MPC86xx: fix build warningsWolfgang Denk
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-01-10Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk
2009-01-07bf537-stamp/nand: fix board_nand_init prototypeMike Frysinger
The board_nand_init() function should return an int, not void. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-07Blackfin: drop CONFIG_SPI handling in board initMike Frysinger
The eeprom SPI init functions are duplicated as the common code already executes these for us. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-07Blackfin: fix out-of-tree building with ldscriptsMike Frysinger
Many of the Blackfin board linker scripts are preprocessed, so make sure we output the linker script into the build tree rather than the source tree. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-07Blackfin: fix linker scripts to work with --gc-sectionsMike Frysinger
Make sure all .text sections get pulled in and the entry point is properly referenced so they don't get discarded when linking with --gc-sections. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-07Blackfin: set proper LDRFLAGS for parallel booting LDRsMike Frysinger
In order to boot an LDR out of parallel flash, the ldr utility needs a few flags to tell it to generate the right header. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-01-06at91rm9200: move define from lowlevel_init to headerJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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