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To properly reset a Colibri iMX7 the PMIC reset capabilities need
to be used.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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The command usb reset potentially requires to deregister USB keyboards,
hence enable it if USB Keyboards are enabled.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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The i.MX 7Solo only has one USB controller. Do not enable USB_PEN
but return a -ENODEV return code instead. This allows "usb start"
to work properly on Colibri iMX7S modules.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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There could be runtime determined board specific reason why a EHCI
initialization fails (e.g. ENODEV if a Port is not available). In
this case, properly return the error code.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Read the number of cores in the fuses to distinguish between
the dual and solo versions.
Tested on a mx7d sabresd and on a mx7solo warp7.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit e25a0656bac63c5fcd20ef4313dc09c409fc512d)
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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The management data input/output (MDIO) requires open-drain,
i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports
this feature. So to TO1.1, need to enable open drain by setting
bits GPR0[8:7] for TO1.1.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Enabled RDC (resource domain controller) to isolate peripherals between
the A7(s) and M4 core.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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In current design, if any peripheral was assigned to both A7 and M4,
it will receive ipg_stop or ipg_wait when any of the 2 platforms
enter low power mode. We will have a risk that, if A7 enter wait,
M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait
asserted same time.
There are 26 peripherals impacted by this IC issue:
SIM2(sim2/emvsim2)
SIM1(sim1/emvsim1)
UART1/UART2/UART3/UART4/UART5/UART6/UART7
SAI1/SAI2/SAI3
WDOG1/WDOG2/WDOG3/WDOG4
GPT1/GPT2/GPT3/GPT4
PWM1/PWM2/PWM3/PWM4
ENET1/ENET2
Software Workaround:
The solution is set M4 to a different domain with A core.
So the peripherals are not shared by them. This way requires
the uboot implemented the RDC driver and set the 26 IPs above to domain 0 only.
CM4 image will set the M4 to domain 1 only.
This patch enables the CONFIG_MXC_RDC for mx7d SABRESD board and ARM2 boards, and
setup the 26 IP resources to domain 0.
Signed-off-by: Ye.Li <B37916@freescale.com>
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Add the peripherals/masters definitions and registers base addresses
for mx7d RDC. Enable the RDC driver by setting CONFIG_MXC_RDC.
Signed-off-by: Ye.Li <B37916@freescale.com>
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We can rely on finish bit for temperature reading for TO1.1.
Also introduce CHIP_REV_xx macros for 7D.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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i.MX7D TO1.1 changes DDR retension mode control to IOMUXC_GPR,
add support to this change for LPSR which needs to exit from
DDR retension mode.
Signed-off-by: Anson Huang <Anson.Huang@freescale.com>
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U-Boot on Apalis iMX6 has a known problem:
Apparently Apalis iMX6 does not works with Gigabit switches...
Limiting speed to 10/100Mbps, and setting master mode, seems to
be the only way to have a successful PHY auto negotiation.
How to fix: Understand why Linux kernel do not have this issue.
However, the current work around did not take effect since the
generic phy config function (which gets called after the board
level work-around) reenabled gigabit advertisment again.
Use the newly introduced environment variable to disable gigabit
Ethernet advertisement.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Disable Gigabit ethernet advertisment when the environment variable
"disable_giga" is set. This feature is already present in the KSZ9023,
this patch implements the same functionality as part of phylib.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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The four level shifter output enables Shift_CTRL_OE[0 to 2 and 4] were
wrongly pulled up therefore disabling the respective pin's input resp.
output capabilities.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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With the next release our update scripts write the kernel and
device tree in seperate UBI volumes. This allows to use a lot
less UBI/UBIFS support in U-Boot, which should lower the risk
of hitting bugs in this area. Boot times are also slightly
faster (measurements showed an improvement of ~150ms).
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Implement optional PCIe EvalBoard initialisation which properly reset the PLX
(now Avago) PEX 8605 PCIe switch plus PCIe devices on the Apalis Evaluation
carrier board.
Please note that you will have to enable the second PCIe port in the dts as well
e.g.:
diff --git a/arch/arm/dts/tegra30-apalis.dts b/arch/arm/dts/tegra30-apalis.dts
index be4f4d6..321c7d6 100644
--- a/arch/arm/dts/tegra30-apalis.dts
+++ b/arch/arm/dts/tegra30-apalis.dts
@@ -59,6 +59,7 @@
};
pci@2,0 {
+ status = "okay";
nvidia,num-lanes = <1>;
};
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Make sure the Intel i210 gigabit Ethernet controller gets properly enabled by
disabling DEV_OFF_N in the initialisation sequence.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Fix PCIe gigabit Ethernet initialisation by explicitly
controlling +V3.3_ETH provided by LDO9 and LDO10.
Note: For this to work an assembly option needs to be
patched on the current prototypes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Newer U-Boot changed the DCD alignment with the effect that the
MMDCx_MDCTL reg/val pair moved 4 bytes.
Move away from a hardcoded offset and parse the IVT and DCD table
to find the correct location.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Get rid of the noatime mount option as L4T resp. Ubuntu does not seem to like
that one at all and rather fails booting as follows:
* Starting NVIDIA specific init script [fail]
...
* Starting NSM status monitor [ OK ]
The disk drive for / is not ready yet or not present.
keys:Continue to wait, or Press S to skip mounting or M for manual recovery
* Starting NSM status monitor [ OK ]
...
* Starting NSM status monitor [fail]
* Stopping NSM status monitor [ OK ]
* Starting Bridge socket events into upstart [ OK ]
The mount now defaults to relatime.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Adding command availability check for update fusing command useful for
update scripts.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Adding update fusing command to assist in updating modules to the fast
boot mode as per the following article on our developer website:
http://developer.toradex.com/knowledge-base/linux-booting#eMMC_Fast_Boot_Mode_ApalisColibri_iMX6
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
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Currently a divider of 6 has been used, leading to following NAND
Flash Controller (NFC) clocks:
VF61: 27.7 MHz (166.7MHz bus clock)
VF50: 22 MHz (132MHz bus clock)
The NAND Flash Memory used on VF50 allows to use clock speed of
up to 33MHz, while the Flash Memory of VF61 allows 50MHz. We can
use the same divider of 4 on both modules to configure the maximal
possible clock speeds:
VF61: 41.7 MHz
VF50: 33 MHz
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Configure the Ricoh PMIC RN5T567 at startup to reset the board
without delay.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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Add power driver for Ricoh PMIC used on Colibri iMX7.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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With the next release our update scripts write the kernel and
device tree in seperate UBI volumes. This allows to use a lot
less UBI/UBIFS support in U-Boot, which should lower the risk
of hitting bugs in this area. Boot times are also slightly
faster (measurements showed an improvement of ~150ms).
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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This reverts commit c31a8b2bdb47dc8fa71c259423bd8fed840b8a25.
The introduction of a union results in correct alignment.
The additional reserved word now misaligns the structure again.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Conflicts:
tools/imximage.h
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Updated regulator naming in device tree as discussed with Stefan
earlier.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Cap product id to avoid issues with a yet unknown one.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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As we now have the configblock handling the MAC address is set
from the configblock.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Used during manufacturing for setting the boot fuses.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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While at it fix whitespace issue.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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While at it remove unusable boot modes from the list.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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This lives now in colibri_imx7_defconfig
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Code mostly ported from imx-kobs-5.3.
MTD partitioning is set accordingly.
writebcb: Write Boot Control Block (FCB and DBBT)
writeboot: Write bootloadder
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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Modification taken from imx-kobs-5.3.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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We need raw nand access to write the fcb in cmd_writebcb_mx7.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
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