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2015-10-21arm: mvebu: Enable DM_USB on AXP / A38x boardsStefan Roese
This patch enables DM_USB on the Marvell AXP / A38x eval boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-21usb: ehci-marvell.c: Add DM supportStefan Roese
This patch adds driver model (DM) support to the Marvell EHCI driver. This will be used by the MVEBU SoC's, currently Armada XP and 38x. Tested on Marvell Armada XP and 38x eval boards. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-21arm: mvebu: Add DM (driver model) supportStefan Roese
This patch adds driver model support for some Marvell MVEBU SoC's. Including Armada XP and 38x. All 3 currently mainlined boards are converted. DM is now selected automatically for MVEBU platforms. With this DM support now available for MVEBU, hardcoding the base addresses and other information is not necessary any more. Probing should be done by using the values provided via the device tree now instead. For this the driver also need to be converted to DM. Patches for some of the drivers will follow. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-21arm: mvebu: Add basic Armada XP / 38x dtsi/dts filesStefan Roese
These will be needed by the upcoming DM (driver model) support for the Armada XP / 38x SoC's. This will provide DT based probing. The dts files are copied 1:1 from the Linux kernel release v4.2. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-21arm: mvebu: Do not call board_init_r() from board_init_f()Stefan Roese
Instead of calling board_init_r() directly from board_init_f(), just return from board_init_f(). This will make the code continue executing in crt0.S _main(), from which the board_init_r() is called. This patch aligns the MVEBU SPL with the correct SPL design as well as reduces the stack utilisation slightly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-21kwbimage: Align payload size to 4 bytesStefan Roese
The MVEBU BootROM does not allow non word aligned payloads. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-21dm: core: Enable optional use of fdt_translate_address()Stefan Roese
The current "simple" address translation simple_bus_translate() is not working on some platforms (e.g. MVEBU). As here more complex "ranges" properties are used in many nodes (multiple tuples etc). This patch enables the optional use of the common fdt_translate_address() function which handles this translation correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-21arm: mvebu: Only set CONFIG_SKIP_LOWLEVEL_INIT for SPLStefan Roese
When running on the AXP I sometimes noticed a strange behavior. As some characters are not echoed on the U-Boot prompt. Not disabling the lowlevel_init code, especially calling cpu_init_cp15() in the main U-Boot seems to solve this issue. Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-21arm: mvebu: Add option to use UART xmodem protocol via kwbootStefan Roese
This patch enables the use of the kwboot tool, to boot mainline U-Boot on the Marvell Armada XP/38x SoC's. This is done by returning to the SoC's BootROM after SPL has initialized the SDRAM. We need to make sure to not reconfigure the internal register space and MBARs. Otherwise the BootROM will not be able to continue after SPL jumps back to it. To use this feature, please don't forget to change the BOOT_FROM line in your board specfic kwbimage.cfg file this way: BOOT_FROM uart Tested on these Marvell eval boards: DB-MV784MP-GP - Armada XP DB-88F6820-GP - Armada 38x Signed-off-by: Stefan Roese <sr@denx.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-10-20arm: mvebu: Move Armada XP/38x Kconfig to mach specific Kconfig fileStefan Roese
Introduce a mach-mvebu/Kconfig for all Armada based SoC's. Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-19Prepare v2015.10v2015.10Tom Rini
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19powerpc: Drop old non-generic-board codeSimon Glass
This code is no-longer used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-10-19sbc8641d: enable and test CONFIG_SYS_GENERIC_BOARDPaul Gortmaker
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19sbc8641d: increase monitor size from 256k to 384kPaul Gortmaker
Between v2015.07-rc1 and v2015.07-rc2 this board started silent boot failure. A bisect led to commit 6eed3786c68c8a49d ("net: Move the CMD_NET config to defconfigs"). This commit looks harmless in itself, but it did implicitly add a feature to the image which led to this: u-boot$git describe 6eed3786c68c8a49d v2015.07-rc1-412-g6eed3786c68c ^^^ u-boot$ls -l ../41*/u-boot.bin -rwxrwxr-x 1 paul paul 261476 Oct 16 16:47 ../411/u-boot.bin -rwxrwxr-x 1 paul paul 266392 Oct 16 16:43 ../412/u-boot.bin u-boot$bc bc 1.06.95 Copyright 1991-1994, 1997, 1998, 2000, 2004, 2006 Free Software Foundation, Inc. This is free software with ABSOLUTELY NO WARRANTY. For details type `warranty'. 256*1024 262144 i.e. we finally broke through the 256k monitor size. Jump it up to 384k and fix the hard coded value used in the env offset at the same time. We were probably flirting with the 256k size issue without knowing it when testing on different baselines in earlier commits, but since this is all board specific, a rebase or reorder to put this commit 1st is of little value. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19sbc8641d: add basic flash setup instructions to README filePaul Gortmaker
...so that I don't have to go work them out from scratch again by peering at the manual. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19sbc8641d: set proper environment sector size.Paul Gortmaker
When debugging an env fail due to too small a malloc pool, it was noted that the env write was 256k. But the device sector size is 1/2 that, as can be seen from "fli" output: Bank # 1: CFI conformant flash (16 x 16) Size: 16 MB in 131 Sectors Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1888 Erase timeout: 4096 ms, write timeout: 1 ms Buffer write timeout: 2 ms, buffer size: 64 bytes Sector Start Addresses: FF000000 E RO FF020000 E RO FF040000 E RO FF060000 E RO FF080000 E RO FF0A0000 E RO FF0C0000 E RO FF0E0000 E RO FF100000 E RO FF120000 E RO [...] FFF00000 RO FFF20000 RO FFF40000 RO FFF60000 RO FFF80000 RO FFFA0000 RO FFFC0000 RO FFFE0000 E RO FFFE8000 RO FFFF0000 E RO FFFF8000 RO => The desired env sector is FFF40000->FFF60000, or 0x20000 in length, just after the 256k u-boot image which starts @ FFF00000. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19sbc8641d: increase malloc pool size to a sane defaultPaul Gortmaker
Currently the board fails to save its env, since the env size is much smaller than the sector size, and the malloc fails for the pad buffer, giving the user visible symptom of: Unable to save the rest of sector (253952) Allow for 1M malloc pool, the same as used on the sbc8548 board. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19sbc8641d: enable command line editingPaul Gortmaker
It is just too painful to use interactively without it. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2015-10-19image-fit: Fix signature checkingAndrej Rosano
On signature verification failures fit_image_verify() should exit with error. Signed-off-by: Andrej Rosano <andrej@inversepath.com>
2015-10-19igep00x0: Use BCH8 ECCLadislav Michl
Used NAND chips requires at least 4-bit error correction, so use BCH8 as it is what kernel uses. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
2015-10-19vexpress64: Juno: Add initialisation code for Juno R1 PCIe host bridge.Liviu Dudau
Juno R1 has an XpressRICH3 PCIe host bridge that needs to be initialised in order for the Linux kernel to be able to enumerate the bus. Add support code here that enables the host bridge, trains the links and sets up the Address Translation Tables. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Tested-by: Ryan Harkin <ryan.harkin@linaro.org> [trini: Always declare vexpress64_pcie_init and continue handling logic inside the function] Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19vexpress64: Juno: Declare all 8GB of RAM and make them visible to the kernel.Liviu Dudau
Juno comes with 8GB RAM, but U-Boot only passes 2GB to the kernel. Declare a secondary memory bank and set the sizes correctly. Signed-off-by: Liviu Dudau <Liviu.Dudau@foss.arm.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org> Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
2015-10-19dfu: dfu_sf: Take the start address into accountFabio Estevam
The dfu_alt_info_spl variable allows passing a starting point for the binary to be flashed in the SPI NOR. For example, if we have 'dfu_alt_info_spl=spl raw 0x400', this means that we want to flash the binary starting at address 0x400. In order to do so we need to erase the entire sector and write to the the subsequent SPI NOR sectors taking such start address into account for the address calculations. Tested by succesfully writing SPL binary into 0x400 offset and the u-boot.img at offset 64 kiB of a SPL NOR. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Use lldiv for the math] Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19dfu: dfu_sf: Use the erase sector size for erase operationsFabio Estevam
SPI NOR flashes need to erase the entire sector size and we cannot pass any arbitrary length for the erase operation. To illustrate the problem: Copying data from PC to DFU device Download [=========================] 100% 478208 bytes Download done. state(7) = dfuMANIFEST, status(0) = No error condition is present state(10) = dfuERROR, status(14) = Something went wrong, but the device does not know what it was Done! In this case, the binary has 478208 bytes and the M25P32 SPI NOR has an erase sector of 64kB. 478208 = 7 entire sectors of 64kiB + 19456 bytes. Erasing the first seven 64 kB sectors works fine, but when trying to erase the remainding 19456 causes problem and the board hangs. Fix the issue by always erasing with the erase sector size. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
2015-10-19doc/README.scrapyard: Add more entriesTom Rini
- Add deletions from August 30 2015. - A few from Sept 12, one from Oct 2nd. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19Revert "arm: Remove inetspace_v2_cmc board"Tom Rini
Upon further review when populating README.scrapyard, inetspace_v2_cmc is a variant on netspace_v2 and not just an orphan config. This reverts commit 653600a715db49859c06ba5dfb858c15c4108d54. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2015-10-19Revert "arm: Remove d2net_v2 defconfig file"Tom Rini
Upon further review when populating README.scrapyard, d2net_v2 is a variant on net2big_v2 and not just an orphan config. To help in the future also add this to board/LaCie/net2big_v2/MAINTAINERS which needed a little consolidation anyhow. This reverts commit 1363740e7948a8e4bee8d5adcdf0f63f7782879d. Cc: Simon Guinot <simon.guinot@sequanux.org> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19doc/README.scrapyard: Populate recent removalsTom Rini
Add in the commit IDs / dates for boards removed on Sept 2nd. Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-19ARM: rpi: add another revision of Raspberry Pi A+Lubomir Rintel
Seen this one in the wild. Is labelled "Raspberry Pi Model A+ V1.1, (C) Raspberry Pi 2014". A standard A+ board, much like the one with version 0x12, didn't notice any differencies. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
2015-10-19ARM: dockstar: move start of environment areaEric Cooper
The default dockstar configuration for U-Boot currently causes it to overrun the environment area, so that a "saveenv" command bricks the device. This patch moves the environment to a higher address to avoid that. Signed-off-by: Eric Cooper <ecc@cmu.edu>
2015-10-17ARM: k2e/l: Apply WA for selecting PA clock sourceLokesh Vutla
On keystone2 Lamarr and Edison platforms, the PA clocksource mux in PLL REG1, can be changed only after enabling its clock domain. So selecting the output of PASS PLL as input to PA only after enabling the clockdomain. This is as per the debug done by "Vitaly Andrianov <vitalya@ti.com>" and based on the previous work done by "Hao Zhang <hzhang@ti.com>" Fixes: d634a0775bcf ("ARM: keystone2: Cleanup PLL init code") Reported-by: Vitaly Andrianov <vitalya@ti.com> Tested-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-17arch/powerpc/config.mk: Pass -fno-ira-hoist-pressure when possibleTom Rini
There are various toolchain issues that cause us to produce invalid binaries with certain gcc 4.8.x and 4.9.x versions when we don't pass this flag in. Tested-by: Joakim Tjernlund <joakim.tjernlund@transmode.se> Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-16Merge git://git.denx.de/u-boot-socfpgaTom Rini
2015-10-17arm: dts: socfpga: add "u-boot,dm-pre-reloc" to socfpga_cyclone5_socdk dtsDinh Nguyen
We need "u-boot,dm-pre-reloc" in the socfpga_cyclone5_socdk.dts file in order for the SPL to use SD/MMC. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-17arm: socfpga: enable data/inst prefetch and shared override in the L2Dinh Nguyen
Update the L2 AUX CTRL settings for the SoCFPGA. Enabling D and I prefetch bits helps improve SDRAM performance on the platform. Also, we need to enable bit 22 of the L2. By not having bit 22 set in the PL310 Auxiliary Control register (shared attribute override enable) has the side effect of transforming Normal Shared Non-cacheable reads into Cacheable no-allocate reads. Coherent DMA buffers in Linux always have a Cacheable alias via the kernel linear mapping and the processor can speculatively load cache lines into the PL310 controller. With bit 22 cleared, Non-cacheable reads would unexpectedly hit such cache lines leading to buffer corruption. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-10-16vf610twr: Fix typo in DRAM initAnthony Felice
This commit fixes a typo in vf610twr DRAM init that was causing a hang in U-Boot for the Vybrid Tower. This typo was introduced in commit 3f353cecc (vf610: refactor DDRMC code). Signed-off-by: Anthony Felice <tony.felice@timesys.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-16Merge branch 'master' of git://git.denx.de/u-boot-samsungTom Rini
2015-10-16arm: mmu: Add missing volatile for reading SCTLR registerAlison Wang
Add 'volatile' qualifier to the asm statement in get_cr() so that the statement is not optimized out by the compiler. (http://comments.gmane.org/gmane.linux.linaro.toolchain/5163) Without the 'volatile', get_cr() returns a wrong value which prevents enabling the MMU and later causes a PCIE VA access failure. Signed-off-by: Alison Wang <alison.wang@freescale.com>
2015-10-15Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini
2015-10-15pci: pcie_imx: Fix hang on mx6qpFabio Estevam
PCI driver currently hangs on mx6qp. Toggle the reset bit with the appropriate timings to fix the issue. Based on the FSL kernel driver implementation. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2015-10-15armv8/gic: Fix GIC v2 initializationThierry Reding
Initialize all GICD_IGROUPRn registers and set up GICC_CTLR to enable interrupts to the primary CPU. This fixes issues seen after booting a Linux kernel from U-Boot. Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Suggested-by: Mark Rutland <mark.rutland@arm.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-15armv8/mmu: Set bits marked RES1 in TCRThierry Reding
For EL3 and EL2, the documentation says that bits 31 and 23 are reserved but should be written as 1. For EL1, only bit 23 is not reserved, so only write bit 31 as 1. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-15Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2015-10-15ARM: uniphier: fix address mapping in README.uniphierMasahiro Yamada
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-10-15armv8/mmu: Clean up TCR programmingThierry Reding
Use the inner shareable attribute for memory, which makes more sense considering that this code is called when caches are being enabled. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-10-15arm: vf610twr: improve memory layoutStefan Agner
Currently, the device tree relocation is disabled, likely to keep some DDR3 RAM at the end for Cortex-M4 firmwares. This can be archived using bootm_size, which limits the image processing range of the boot commands. Move the device tree standard load address to a higher address which aligns better with what we are doing on other boards. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-10-15colibri_vf: Fix bstlen fieldFabio Estevam
Commit 3f353cecc ("vf610: refactor DDRMC code") changed the original bstlen field from 3 to 0. Restore the original value for proper behaviour. Based on the patch from Anthony Felice <tony.felice@timesys.com> for the vf610twr board. Reported-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-10-15mtd: nand: vf610_nfc: resync with upstream Linux versionStefan Agner
This resyncs the driver changes with the Linux version of the driver. The driver received some feedback in the LKML and got recently acceppted, the latest version can be found here: https://lkml.org/lkml/2015/9/2/678 Notable changes are: - On ECC error, reread OOB and count bit flips in OOB too. If flipped bits are below threshold, also return an empty OOB buffer. - Return the amount of bit flips in vf610_nfc_read_page. - Use endianness aware vf610_nfc_read to read ECC status. - Do not enable IDLE IRQ (since we do not operate with an interrupt service routine). - Use type safe struct for buffer variants (vf610_nfc_alt_buf). - Renamed variables in struct vf610_nfc (column and page_sz) to reflect better what they really representing. The U-Boot version currently does not support RAW NAND write when using the HW ECC engine. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Tested-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr> Tested-by: Stefan Agner <stefan@agner.ch> Acked-by: Scott Wood <scottwood@freescale.com>
2015-10-14Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD
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