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2009-02-19Create configuration option for restricted ns16550 functionsRon Madrid
This patch will create a configuration option for a minimum configuration for the ns16550 serial driver at drivers/serial/ns16550.c and will apply this new configuration option to the SIMPC8313.h config file in order to fix the NAND bootstrap build error. This option will exclude all functions with exception of NS16550_putc and NS16550_init. This will be used primarily to save space and remove unused code from builds in which space is limited. Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net>
2009-02-19mkconfig: include board config.h before asm/config.hKim Phillips
swapping the include order suppresses warnings for board configs that define their own CONFIG_MAX_MEM_MAPPED: In file included from /home/r1aaha/git/u-boot/include/config.h:5, from /home/r1aaha/git/u-boot/include/common.h:35, from simpc8313.c:26: /home/r1aaha/git/u-boot/include/configs/SIMPC8313.h:81:1: warning: "CONFIG_MAX_MEM_MAPPED" redefined In file included from /home/r1aaha/git/u-boot/include/config.h:4, from /home/r1aaha/git/u-boot/include/common.h:35, from simpc8313.c:26: /home/r1aaha/git/u-boot/include/asm/config.h:28:1: warning: this is the location of the previous definition Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-02-18Fix build errors after making flash_get_info() non-staticWolfgang Denk
Fix for these build problems: error: static declaration of 'flash_get_info' follows non-static declaration Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-02-18ppc4xx: PCIe: Change 16GB inbound memory to 4GBStefan Roese
This patch fixes a problem recently seen on some 4xx platforms. For example on Kilauea PCIe slot #0. Signed-off-by: Stefan Roese <sr@denx.de>
2009-02-18ppc4xx: Some more PMC405 coding-style cleanupStefan Roese
Signed-off-by: Stefan Roese <sr@denx.de>
2009-02-18ppc4xx: Update PMC405 board supportMatthias Fuchs
This patch prepares the good old PMC405 board support for upcoming PMC405V2 patches. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
2009-02-18ppc4xx: Cleanup PMC405 board supportMatthias Fuchs
This patch fixes coding style for PMC405 board support. Also some unneeded features/code is removed. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
2009-02-18qong: changes to Dave/DENX Qong configurationIlya Yanok
1. Changes to the default environment: - "bootcmd" defined as "run flash_self" - "saveenv" command removed from "update" - "uboot" changed to "u-boot" (also in "load") - "addmtd" variable defined (and added to all boot commands) 2. CONFIG_CMD_JFFS2 defined to enable "mtdparts" command 3. MTDIDS_DEFAULT and MTDPARTS_DEFAULT defined 4. CONFIG_SYS_CBSIZE changed from 256 to 512. That solves the problem with truncated "bootargs" environment variable. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-02-18common/console: avoid ifdef CONFIG_CONSOLE_MUX when it's possibleJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-18common/console: coding style cleanupJean-Christophe PLAGNIOL-VILLARD
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-02-18mpc8xx_pcmcia: move CONFIG_8xx out of .c file and into MakefileMike Frysinger
Move the CONFIG_8xx mpc8xx_pcmcia.c protection out of the C file and into the Makefile so we avoid pointless compiling of the file. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-18disk: convert part_* files to COBJ-$(CONFIG_XXX) styleMike Frysinger
Move the CONFIG_XXX out of the part_XXX.c file and into Makefile to avoid pointless compiles. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-18include/image.h: Ease grepping of image_* functionsPetri Lehtinen
Because the functions have been defined using macros, grepping for their definitions is not possible. This patch adds the real function names in comments. Signed-off-by: Petri Lehtinen <petri.lehtinen@inoi.fi> Acked-by: Mike Frysinger <vapier@gentoo.org>
2009-02-18rename CONFIG_CMD_ENV to CONFIG_CMD_SAVEENVMike Frysinger
The CONFIG_CMD_ENV option controls enablement of the `saveenv` command rather than a generic "env" command, or anything else related to the environment. So, let's make sure the define is named accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-02-18disable imls command if no flash is definedValeriy Glushkov
Default CONFIG_CMD_IMLS must be disabled when CONFIG_SYS_NO_FLASH is defined Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
2009-02-18API: Improve glue mid-layer of the API demo application.Rafal Jaworowski
- Extend ub_dev_read() and ub_dev_recv() so they return the length actually read, which allows for better control and error handling (this introduces additional error code API_ESYSC returned by the glue mid-layer). - Clean up definitions naming and usage. - Other minor cosmetics. Note these changes do not touch the API proper, so the interface between U-Boot and standalone applications remains unchanged. Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2009-02-18API: Only output test data when reading was successful.Rafal Jaworowski
Signed-off-by: Rafal Czubak <rcz@semihalf.com>
2009-02-18API: Provide syscall entry point for the ARM architecture.Rafal Jaworowski
Signed-off-by: Rafal Czubak <rcz@semihalf.com> Acked-by: Rafal Jaworowski <raj@semihalf.com>
2009-02-18API: Use stack pointer as API signature search hint in the glue layer.Rafal Jaworowski
De-hardcode range in RAM we search for the API signature. Instead use the stack pointer as a hint to narrow down the range in which the signature could reside (it is malloc'ed on the U-Boot heap, and is hoped to remain in some proximity from stack area). Adjust PowerPC code in API demo to the new scheme. Signed-off-by: Rafal Czubak <rcz@semihalf.com> Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
2009-02-17TQM8260: fix locations of kernel and ramdisk images in flashWolfgang Denk
After introducing redundant environment the kernel images was overlapping with environment. Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-02-1683xx: Add eSDHC support on 8379 EMDS boardAndy Fleming
Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-1685xx: Add eSDHC support for 8536 DSAndy Fleming
Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Add support for the Freescale eSDHC found on 8379 and 8536 SoCsAndy Fleming
This uses the new MMC framework Some contributions by Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Add MMC FrameworkAndy Fleming
Here's a new framework (based roughly off the linux one) for managing MMC controllers. It handles all of the standard SD/MMC transactions, leaving the host drivers to implement only what is necessary to deal with their specific hardware. This also hooks the infrastructure into the PowerPC board code (similar to how the ethernet infrastructure now hooks in) Some of this code was contributed by Dave Liu <daveliu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Eliminated arch-specific mmc header requirementAndy Fleming
The current MMC infrastructure relies on the existence of an arch-specific header file. This isn't necessary, and a couple drivers were forced to implement dummy files to meet this requirement. Instead, we move the stuff in those header files into a more appropriate place, and eliminate the stubs and the #include of asm/arch/mmc.h Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Convert mmc_init to mmc_legacy_initAndy Fleming
This is to get it out of the way of incoming MMC framework Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Eliminate support for using MMC as memoryAndy Fleming
MMC cards are not memory, so we stop treating them that way. Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-1632bit BUg fix for DDR2 on 8572Poonam_Aggrwal-b10812
This errata fix is required for 32 bit DDR2 controller on 8572. May also be required for P10XX20XX platforms Signed-off-by: Poonam_Agarwal-b10812 <b10812@lc1106.zin33.ap.freescale.net>
2009-02-16TQM85xx: Fix a couple warnings in TQM8548 buildAndy Fleming
The ecm variable in sdram.c was being declared for all 8548, but only used by specific 8548 boards, so we make that variable require those specific boards, too The nand code was using an index "i" into a table, and then re-using "i" to set addresses for each upm. However, then it relied on the old value of i still being there to enable things. Changed the second "i" to "j" Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16MPC85xx: TQM8548: workaround for erratum DDR 19 and 20Wolfgang Grandegger
This patch adds the workaround for erratum DDR20 according to MPC8548 Device Errata document, Rev. 1: "CKE signal may not function correctly after assertion of HRESET". Furthermore, the bug DDR19 is fixed in processor version 2.1 and the work-around must be removed. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM8548: use cache for AG and BE variantsWolfgang Grandegger
This patch makes accesses to the system memory cachable by removing the caching-inhibited and guarded flags from the relevant TLB entries for the TQM8548_BE and TQM8548_AG modules. FYI, the Freescale MPC85* boards are configured similarly. This results in a big averall performace improvement. TFTP downloads, NAND Flash accesses, kernel boots, etc. are much faster. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM8548_AG: add 1 GiB DDR2-SDRAM configurationWolfgang Grandegger
This patch add support for the 1 GiB DDR2-SDRAM on the TQM8548_AG module. Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM8548: fix SDRAM timing for 533 MHzWolfgang Grandegger
According to new TQM8548 timing specification: Refresh Recovery: 34 -> 53 clocks CKE pulse width: 1 -> 3 cycles Window for four activities: 13 -> 14 cycles Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM8548: add support for the TQM8548_AG moduleWolfgang Grandegger
The TQM8548_AG is a variant of the TQM8548 module with 1 GiB memory, CAN and without PCI/PCI-X and RTC. U-Boot can be built for this module with "$ make TQM8548_AG_config". Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM8548: add support for the TQM8548_BE moduleWolfgang Grandegger
The TQM8548_BE is a variant of the TQM8548 module with NAND and CAN interface. With NAND support, the image is significantly larger and TEXT_BASE is adjusted accordingly. U-Boot can be built for this module with "$ make TQM8548_BE_config". Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM85xx: make standard PCI/PCI-X configurableWolfgang Grandegger
The TQM8548_AG module does not have the standard PCI/PCI-X interface connected but just the PCI Express interface . So far it was not possible to disable it without disabling the complete PCI interface (CONFIG_PCI) including PCI Express. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-16MPC85xx: TQM85xx: fix flash protection for boot loaderWolfgang Grandegger
As the reset vector is located at 0xfffffffc, all flash sectors from the beginning of the U-Boot binary to 0xffffffff must be protected. On the TQM8548-AG having small sectors at the end of the flash it happened that the last two sector were not protected and an "erase all" left an un-bootable system behind: Bank # 2: CFI conformant FLASH (32 x 16) Size: 32 MB in 270 Sectors AMD Standard command set, Manufacturer ID: 0xEC, Device ID: 0x257E Erase timeout: 8192 ms, write timeout: 1 ms FFFA0000 E RO FFFC0000 RO FFFE0000 RO FFFE4000 RO FFFE8000 RO FFFEC000 RO FFFF0000 RO FFFF4000 RO FFFF8000 E FFFFC000 The same bug seems to be in drivers/mtd/cfi_flash.c:flash_init() and many board BSPs as well. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
2009-02-1686xx: Update CPU info output on bootupPeter Tyser
- Update style of 86xx CPU information on boot to more closely match 85xx boards - Fix detection of 8641/8641D - Use strmhz() to display frequencies - Display L1 information - Display L2 cache size - Fixed CPU/SVR version output == Before == Freescale PowerPC CPU: Core: E600 Core 0, Version: 0.2, (0x80040202) System: Unknown, Version: 2.1, (0x80900121) Clocks: CPU:1066 MHz, MPX: 533 MHz, DDR: 266 MHz, LBC: 133 MHz L2: Enabled Board: X-ES XPedite5170 3U VPX SBC == After == CPU: 8641D, Version: 2.1, (0x80900121) Core: E600 Core 0, Version: 2.2, (0x80040202) Clock Configuration: CPU:1066.667 MHz, MPX:533.333 MHz DDR:266.667 MHz (533.333 MT/s data rate), LBC:133.333 MHz L1: D-cache 32 KB enabled I-cache 32 KB enabled L2: 512 KB enabled Board: X-ES XPedite5170 3U VPX SBC Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-02-1686xx: Update Global Utilities structurePeter Tyser
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-02-1686xx: Reset updatePeter Tyser
Update the 86xx reset sequence to try executing a board-specific reset function. If the board-specific reset is not implemented or does not succeed, then assert #HRESET_REQ. Using #HRESET_REQ is a more standard reset procedure than the previous method and allows all board peripherals to be reset if needed. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-02-16fsl-ddr: Allow system to boot if we have more than 4G of memoryKumar Gala
Previously if we >=4G of memory and !CONFIG_PHYS_64BIT we'd report an error and hang. Instead of doing that since DDR is mapped in the lowest priority LAWs we setup the DDR controller and the max amount of memory we report back is what we can map (CONFIG_MAX_MEM_MAPPED) Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
2009-02-16mpc85xx: Add support for the P2020Srikanth Srinivasan
Added various p2020 processor specific details: * SVR for p2020, p2020E * immap updates for LAWs and DDR on p2020 * LAW defines related to p2020 Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-1685xx: print boot header info to distinquish 36-bit addr map on MPC8572 DSKumar Gala
Added some info that is printed out when we boot to distiquish if we built MPC8572DS_config vs MPC8572DS_36BIT_config since they have different address maps. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-16Fixup SGMII PHY ids in the device treeAndy Fleming
The device tree's PHY addresses need to be fixed up if we're using the SGMII Riser Card. The 8572, 8536, and 8544 DS boards were modified to call this function. Code idea taken from Liu Yu <yu.liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Make some minor whitespace changes to eliminate line-wrappingAndy Fleming
Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-16Add eth_get_dev_by_indexAndy Fleming
This allows code to iterate through the ethernet devices Signed-off-by: Andy Fleming <afleming@freescale.com>
2009-02-1685xx: Fix bug in device tree setup in 36-bit physical confgKumar Gala
In the 36-bit physical config for MPC8572DS when need the start address of memory and it size to be kept in phys_*_t instead of a ulong since we support >4G of memory in the config and ulong cant represent that. Otherwise we end up seeing the memory node in the device tree reporting back we have memory starting @ 0 and of size 0. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-1685xx: Fix address map for 36-bit config of MPC8572DSKumar Gala
When we introduced the 36-bit config of the MPC8572DS board we had the wrong PCI MEM bus address map. Additionally, the change to the address map exposes a small issue in our dummy read on the ULI bus. We need to use the new mapping functions to handle that read properly in the 36-bit config. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-1685xx: Fix how we map DDR memoryKumar Gala
Previously we only allowed power-of-two memory sizes and didnt handle >2G of memory. Now we will map up to CONFIG_MAX_MEM_MAPPED and should properly handle any size that we can make in the TLBs we have available to us Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-02-16fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controllerKumar Gala
If we only have one controller we can completely ignore how memctl_intlv_ctl is set. Otherwise other levels of code get confused and think we have twice as much memory. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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