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2015-11-19i8042: Use functions to handle register accessSimon Glass
At present the register access in kbd_reset() is quite primitive. This makes it hard to follow. Create functions to read and write data, both to a single register, and via the command/data approach. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-on: Intel Crown Bay and QEMU Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19video: Drop unused console functionsSimon Glass
CONFIG_CONSOLE_CURSOR, CONFIG_SYS_CONSOLE_BLINK_COUNT and CONFIG_CONSOLE_TIME are not used by any board. The implementation is not great and stands in the way of a refactor of i8042. Drop these for now. They can be re-introduced quite easily later, perhaps with driver-model real-time-clock (RTC) support. When reintroducing, it might be useful to make a few changes: - Blink time would be more useful than blink count - The confusing #ifdefs should be avoided - The time functions should support driver model - It would be best keyed off console_tstc() or some similar idle loop rather than a particular input driver (i8042 in this case) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19dm: cros_ec: Convert cros_ec keyboard driver to driver modelSimon Glass
Adjust the cros_ec keyboard driver to support driver model. Make this the default for all Exynos boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19dm: tegra: Convert keyboard driver to driver modelSimon Glass
Adjust the tegra keyboard driver to support driver model, using the new uclass. Make this the default for all Tegra boards so that those that use a keyboard will build correctly with this driver. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19dm: stdio: Plumb in the new keyboard uclassSimon Glass
When driver model is used for keyboards we must scan the available keyboards and register them with stdio. Add code to do this. At some point (once LCD/video is converted) we should be able to convert stdio to driver model and avoid these dual data structures. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19cros_ec: Use udevice instead of cros_ec_dev for keyboard functionsSimon Glass
In preparation for converting the cros_ec keyboard driver to driver model, adjust the cros_ec functions it will use to use a normal struct udevice. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19input: Add the keycode translation tables separatelySimon Glass
Require the caller to add the keycode translation tables separately so that it can select which ones to use. In a later patch we will add the option to add German tables. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19input: Return -ENOSPC when there is not spaceSimon Glass
Return a useful error instead of -1 when something goes wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19input: Add a device pointer to the input configSimon Glass
The read_keys() method in input is passed a struct input_config. Add a device pointer there so that we can find out the device that is referred to with driver model. Once all drivers are converted we can update the input structure to use driver model instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19dm: input: Create a keyboard uclassSimon Glass
Add a uclass for keyboard input, mirroring the existing stdio methods. This is enabled by a new CONFIG_DM_KEYBOARD option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2015-11-19dm: usb: Add support for USB keyboards with driver modelSimon Glass
Switch USB keyboards over to use driver model instead of scanning with the horrible usb_get_dev_index() function. This involves creating a new uclass for keyboards, although so far there is no API. Signed-off-by: Simon Glass <sjg@chromium.org>
2015-11-19rockchip: Turn on CONFIG_DEBUG_UART_NS16550 in defconfigsAriel D'Alessandro
No UART driver was specified in defconfig, thus DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since commit 220e8021af96741bd7149ca9895e1f0c8a38d0bb added a new Altera UART driver. Signed-off-by: Ariel D'Alessandro <ariel@vanguardiasur.com.ar> Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini
2015-11-19Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini
2015-11-19Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini
2015-11-19common: mii: Do not allow to exceed max phy limitMichal Simek
Phy can have addresses 0-31. Check this boundary to ensure that user can't call commands on phy address 32 and more. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-19zynq: sdhci: Define max clock by macroMichal Simek
zc1571 with silicon can operate on 200MHz maximum frequency. Setup this frequency by default and fix setting for ep108. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19net: zynq: Fix MDC setting for zynqMichal Simek
Based on spec: "MDC must not exceed 2.5 MHz (MDC is only active during MDIO read and write operations)" Zynq is running on 111MHz. Current setting is 32 which is 111/32=3.47 which is above of 2.5MHz. Using 48 divider will give us correct setting according spec (111/48=2.31). Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Remove unused MDCCLKDIV2 macroMichal Simek
Driver cleanup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Fix mdc clock division setting for 100Mbit/sMichal Simek
Using set and clear macro is incorrect because it is not overwritting origin mdc clock division setup. For example origin setup is 8(0b001) and new setup is 64(0b100) which means 0b101 is setup which is 96 divider. Using writel to rewrite all setting like for 1000Mbit/s case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Wait till packet is sentMichal Simek
Wait till BD is processed to ensure that packet was sent successfully. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19net: zynq: Disable secondary queuesEdgar E. Iglesias
Zynq has no priority queues. ZynqMP has one priority queue and this change is required to get ethernet working. This patch was not needed on ep108 for uknown reason even it should be used. Tested on Zynq and ZynqMP. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19net: zynq: Add dummy packet to fix packet duplication issueMichal Simek
Target is duplicating packets. IP prefetches another BD and process it when the first one is sent. Adding one dummy BD to the chain fix the problem with packet duplication. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Do not report TX underrunMichal Simek
Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Setup BD when structures are filledMichal Simek
Fix incorrect sequence in BD handling. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Allocate BD_SPACE in connection to RX_BUFMichal Simek
BD_SEPRN_SPACE should not have hard coded value and it will be calculated based on the number of buffer descriptors that we would like to use. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19dm: sf: Add support for all targets which requires MANUAL_RELOCMichal Simek
It is follow up patch based on "dm: Add support for all targets which requires MANUAL_RELOC" (sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3) to update function pointers for DM. Using post_bind is not ideal but it is one on current option what can be used. Variable reloc_done has to be used do not call relocation after every bind. Maybe new core functions should be introduced for this case. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-11-19dm: core: Add missing entries for manual relocationMichal Simek
Patches: "dm: core: Add a post_bind method for parents" (sha1: 0118ce79577f9b0881f99a6e4f8a79cd5014cb87) "dm: core: Add a uclass pre_probe() method for devices" (sha1: 02c07b3741f1b825934b1a6eb8f23530532dc426) "dm: core: Allow the uclass to set up a device's child after binding" (sha1: 081f2fcbd9a95ba10677065359791f8fea3f8c58) "dm: core: Allow uclass to set up a device's child before it is probed" (sha1: 83c7e434c9dd3ca81f8b763e23c1881b973bcf2f) Adds new entries to struct driver and struct uclass_driver without extending code for manual relocation. This patch fixes it for all architectures which requires MANUAL_RELOC. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19dm: spi: Add support for all targets which requires MANUAL_RELOCMichal Simek
It is follow up patch based on "dm: Add support for all targets which requires MANUAL_RELOC" (sha1: 484fdf5ba058b07be5ca82763aa2b72063540ef3) to update function pointers for DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-11-19microblaze: Fix C99/gnu99 compatiblity for inline functionsNathan Rossi
'extern inline' is not portable across various C standards. To ensure compatiblity with various standards/compilers change the functions to static inline. This is a portable construct and serves as a comparable definition to 'extern inline' from the gnu90 standard. Additionally remove the function prototypes as they are not required due to the functions being declared static and functions are correctly ordered based on dependence. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Tom Rini <trini@konsulko.com> Acked-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19microblaze: Fix style issues in header filesNathan Rossi
Fix various style issues in MicroBlaze header files. Specifically fixing style voilations including '__inline__', 'foo * bar' and 'void foo ('. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19net: zynq: Fix clearing statisticMichal Simek
Previous loop was completely bogus. Iterration should go just over statistic counters. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Extend register description with offsetsMichal Simek
Extend comments with register offset to help with debuggging. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Add support for different PHY interface typesMichal Simek
MII is setup by default for all cases. The most of boards are using RGMII but PHY drivers are not doing any specific setting that's why MII setting was working fine. With TI DP83867 is necessary to setup paramaters based on interface type. Use one setting per board for it which is something what will be removed when driver is moved to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19net: zynq: Add debug message to phyread/phywriteMichal Simek
Add debug messages to phyread/write to help with PHY debug. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19ARM: zynq: Add target for building bootable SPL image for ZynqNathan Rossi
Add a build target to generate 'boot.bin' which includes SPL. This is used by the platforms BootROM to load SPL directly. This change also conditionally changes what the 'boot.bin' target generates depending on the SoC. Leaving the behaviour unchanged for the AT91 targets. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Cc: Tom Rini <trini@konsulko.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-19tools: zynqimage: Add Xilinx Zynq boot header generation to mkimageNathan Rossi
As with other platforms vendors love to create their own boot header formats. Xilinx is no different and for the Zynq platform/SoC there exists the "boot.bin" which is read by the platforms bootrom. This format is described to a useful extent within the Xilinx Zynq TRM. This implementation adds support for the 'zynqimage' to mkimage. The implementation only considers the most common boot header which is un-encrypted and packed directly after the boot header itself (no XIP, etc.). However this implementation does take into consideration the other fields of the header for image dumping use cases (vector table and register initialization). Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19ARM64: zynqmp: Enable TI phy by defaultMichal Simek
Enable TI phy for Xilinx ZynqMP platform. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19net: phy: Add support for Texas Instruments DP83867Edgar E. Iglesias
Code is taken from Linux kernel driver (v4.2). Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-11-19ARM: zynq: Choose boot image based on OF_SEPARATE macroMichal Simek
OF_CONTROL is enabled by default for all Zynq boards. The difference between two boot images is done by OF_SEPARATE or OF_EMBED macros. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2015-11-19zynqmp: mp: Add support for booting R5 from any addressMichal Simek
Put jump trampoline to TCM at 0 and setup R5 reset address to 0. Jump trampoline ensures that jump to the right location. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-11-19env_ubi.c: Correct pointer error in env loadKevin Smith
The variable "buf" in this function is a char array, and the function ubi_volume_read is expecting a char *. In the call, the address of the pointer is being taken, incorrectly passing a char **. The compiler warning was being silenced by the cast. Remove the address operator and the cast. Signed-off-by: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2015-11-18itest: add missing break statements to evalexp()Stephen Warren
The commit mentioned below replaced return statements inside a switch so that other code could be called after the switch. However, it didn't add any break statements, causing the cases to run together. Fix this. Reported-by: Coverity (CID 132282, 132283) Fixes: 7861204c9af7 ("itest: make memory access work under sandbox") Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-11-18test: fat: add error-checking to non-contig testStephen Warren
Check the result code of all command that are executed. Without this, if the fallocate invocation fails (this feature is not supported on ext3 filesystems for example) then a zero-length output file will be created, and subsequent the mkfs and mount invocations will fail, which will cause the subsequent dd invocation to attempt to fill up the host's entire free disk space. That's not a nice user experience! Related, if fallocate does fail, try to create the test disk image using dd instead. That should work everywhere. Fixes: 4a28274227d0 ("test: fat: add test of non-contiguous file reads") Signed-off-by: Stephen Warren <swarren@nvidia.com>
2015-11-18Fix sandbox build on Ubuntu 10.04Stephen Warren
gcc 4.4.3 (which is the default native compiler on x86-64 Ubuntu 10.04) doesn't seem to like initializers for sub-fields of anonymous unions. Solve this by replacing the initialization with an assignment. This fixes: lib/lz4_wrapper.c: In function ‘ulz4fn’: lib/lz4_wrapper.c:97: error: unknown field ‘raw’ specified in initializer Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-11-18km/powerpc: fix ft_board_setup prototype for km82xx & km83xxValentin Longchamp
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2015-11-18powerpc/83xx: add support for kmtegr1 boardValentin Longchamp
This board uses the same CPU (8309) as VECT1. The memory however is different since it has NAND Flash, the NOR Flash partitioning is different and of course the FPGAs as well. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com> Signed-off-by: Christoph Dietrich <christoph.dietrich@keymile.com>
2015-11-18km8309: change the default QE_FW addressValentin Longchamp
It should be after the u-boot reserved sectors and before the env sectors, since the solution used for kmvect1 (tell the linker to put the firmware into the u-boot produced binary, at the end of the area) should be the exception. The #define is only "conditional" so that we can still support kmvect1. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2015-11-18km83xx: use CONFIG_ENV_ADDR for the newenv env commandValentin Longchamp
The hardcoded value are bad, since the address could change between different boards. Furthermore, the relevant #defines are set only if #undefined here, so that they can be changed by some boards if required. Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
2015-11-18board/keymile/km82xx: setting dip_switch 3 and 4 will run bootloaderBagavathiannan Palanisamy
Setting dip_switch 3 and 4 also will run bootloader in COGE3 and COGE6 It is required remove local mgmt IP address, when DIP Switch PIN3 is enabled. DIP Switch 4 also enabled to avoid u-boot update in future for DIP switch enhancements. Signed-off-by: Bagavathiannan Palanisamy <Bagavathiannan.Palanisamy@keymile.com> Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
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