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2011-11-17UPSTREAM: net: tftpput: Add support for receiving ICMP packetsSimon Glass
ICMP packets can tell you when there is no server at the other end. It is useful for tftp to figure this out, so that a quick error can be displayed, rather than pointlessly retrying. This adds an ICMP packet handler to the net interface. Signed-off-by: Simon Glass <sjg@chromium.org> (cherry picked from commit 4793ee6522f10a3d108de7e47adbcf5f15eb3f46) Change-Id: I02bbd41b3852b92b06210db160a06c62f5bf414f Reviewed-on: https://gerrit.chromium.org/gerrit/11795 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-11-17UPSTREAM: Put common autoload code into auto_load() functionSimon Glass
This is a small clean-up patch. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Eric Bénard <eric@eukrea.com> (cherry picked from commit 093498669e77597635a24f326f11efeab213d394) Change-Id: Ib052e50e7e520c9d5c8c5344e94a4404b2ba0d30 Reviewed-on: https://gerrit.chromium.org/gerrit/11793 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-11-17UPSTREAM: net: tftpput: Move ICMP code into its own functionSimon Glass
NetReceive() is a very long function with a lot of indent. Before adding code to the ICMP bit, split it out. Signed-off-by: Simon Glass <sjg@chromium.org> (cherry picked from commit 8f79bb17a4251ec096a7184d1eaf6f5dea3d2623) Change-Id: Ic5599c5c7eedc7f00fc5d5aecdd051418e5c2e40 Reviewed-on: https://gerrit.chromium.org/gerrit/11794 Commit-Ready: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-11-16BACKPORT: Add setenv_ulong() and setenv_addr()Simon Glass
It seems we put numbers and addresses into environment variables a lot. We should have some functions to do this. (cherry picked from commit d67f10c) Change-Id: I922e72a7db872f26774459a6dc074a80016ef904 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11792 Reviewed-by: Doug Anderson <dianders@chromium.org>
2011-11-16UPSTREAM: Move simple_itoa to vsprintfSimon Glass
This function is generally useful and shouldn't hide away in hush. It has been moved as is. Signed-off-by: Simon Glass <sjg@chromium.org> (cherry picked from commit 3cce8a5496452285e1828984ad3945417205cfc3) Change-Id: I014f58e901e6b035b5eeb694c62e6e881a7b75c2 Reviewed-on: https://gerrit.chromium.org/gerrit/11791 Reviewed-by: Doug Anderson <dianders@chromium.org> Commit-Ready: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-11-16arm: Tegra3: fdt: add display (LCD/PWFM) values for Tegra3Tom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=Built Waluigi AOK, ran OK to cmd prompt Change-Id: I18ad5386958f456bf9bc819de5affc4cb5bae267 Reviewed-on: https://gerrit.chromium.org/gerrit/11716 Reviewed-by: Tom Warren <twarren@nvidia.com> Tested-by: Tom Warren <twarren@nvidia.com> Commit-Ready: Doug Anderson <dianders@chromium.org>
2011-11-15arm: Tegra: make some header files common for Tegra3 LCD useTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=built Seaboard and Waluigi AOK Change-Id: Ia860abf5ef3af66b3a39d4c57192455986b7a4f4 Reviewed-on: https://gerrit.chromium.org/gerrit/11704 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com> Commit-Ready: Doug Anderson <dianders@chromium.org>
2011-11-15tegra: enable SPI on Cardhu and WaluigiChe-Liang Chiou
BUG=chromium-os:21033 TEST=run `sf erase, write` and `sf read` on Waluigi verify the data it reads from SPI flash matches that it writes to Change-Id: Ibeefd3183e4fa367d68d0035a818e1c166e6d59d Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/11473 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15tegra: spi: add SFLASH and SLINK driversChe-Liang Chiou
BUG=chromium-os:21033 TEST=run `sf erase, write` and then `sf read` on seaboard verify the data it reads from SPI flash matches that it writes to Change-Id: I1b04afa4b54738cd93be29b70f428bdc3e6b234f Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-on: https://gerrit.chromium.org/gerrit/11472 Commit-Ready: Che-Liang Chiou <clchiou@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15spi: add TEGRA_SLINK4_BASE and TEGRA_SPIFLASH_BASE in prep for tegra3Che-Liang Chiou
BUG=chromium-os:21033 TEST=emerge-{tegra2_seaboard,waluigi} chromeos-u-boot Change-Id: Icee2c26f36937e96c24318979179ba3a0cbfc09c Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11597
2011-11-15arm: Tegra: power: make power.c/.h common for future Tegra3 LCD useTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=built Seaboard and Waluigi OK. Booted Waluigi OK. Change-Id: I1bfbe03945d7dae44e0840349b9698fc08cef07d Reviewed-on: https://gerrit.chromium.org/gerrit/11504 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15arm: Tegra: add new clocks for T30 LCDTom Warren
Signed-off-by: Tom Warren <twarren@nvidia.com> BUG=none TEST=build Seaboard and Waluigi AOK Change-Id: Id8e7227de7898bb9d117bf8d0f293ee5da7dc501 Reviewed-on: https://gerrit.chromium.org/gerrit/11506 Tested-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-15arm: Tegra3: clear IO_RESET bit in pinmux registersTom Warren
Based on Tegra3 TRM, once E_18V bits in PMC are programmed, all IO_RESETs need to be cleared on LV blocks. If not, GPIO settings on related LV pins will always be set to low even if it is set to high. Specifically, it is observed that when IO_RESET bit is not cleared in VI_D4 pinmux register, the output of GPIO on VI_D4 (PL.02) is always low. That causes LVDS shutdown all the time. Also needed for SDMMC4 pins when booting from SPI. BUG=none TEST=built and booted on Waluigi, read/write SD/MMC data OK Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Change-Id: Iaf84dc39375a49ceb3284dd1d48a8af3a0145175 Reviewed-on: https://gerrit.chromium.org/gerrit/11495 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Che-Liang Chiou <clchiou@chromium.org> Commit-Ready: Che-Liang Chiou <clchiou@chromium.org>
2011-11-14arm: tegra2: change initial CPU clock to 312MhzYen Lin
Set CPU clock initially to 312Mhz; once CPU voltage is raised, CPU clock will then be raied to 1.2GHz (for T25) or 1.0GHz (for T20). BUG=chrome-os-partner:5914 TEST=Build and test on Seaboard Change-Id: I0c95a1df6b87c896daca8c03c9dc33b245764621 Reviewed-on: https://gerrit.chromium.org/gerrit/11199 Tested-by: Yen Lin <yelin@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Doug Anderson <dianders@chromium.org>
2011-11-14ICH SPI: Use an atomic preop for Write EnableDuncan Laurie
The U-boot spi interface uses Software Sequencing and handles write transactions in three distinct steps: 1) issue Write Enable op 2) issue Page Program op 3) poll Read Status Reg for completion However in an Intel 6-series chipset the Management Engine is also issuing a lot of transactions through the same controller to the same chip. It is possible for an ME transaction to occur between the U-boot issuing WREN and sending the actual data, resulting in the host WREN being lost and the data not actually being written to the chip. This change intercepts WREN opcode and instead applies it as a prefix operator for the next issued transaction, ensuring that the two are issued back-to-back to the SPI chip. Unfortunately this register is not writable when the SPI contoller is locked down, so it is not always applicable. BUG=chrome-os-partner:6690 TEST=repeated manual testing on lumpy with boot/suspend/resume Change-Id: I75e353942fd6148a93be561ff422e37dfc6dc8c4 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11625 Reviewed-by: Stefan Reinauer <reinauer@chromium.org>
2011-11-13spi: rename tegra2_spi to tegra_spi in prep for tegra3Che-Liang Chiou
BUG=chromium-os:21033 TEST=build seaboard successfully Change-Id: Idbfbdbf0bdb1070f4a2b5f8205c1caff6ef0c811 Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11471 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-11-04Introduce ability to use hardware SPI mapping for read accesses.Vadim Bendebury
On X86 systems the hardware maps the bootprom SPI flash chip into the top of memory address range. This could be used for accessing all information in the SPI flash. The vboot-reference code requires access to FMAP sections containing cryptographic information, and as of today, u-boot reads the whole sections, which are 64 KB in size, even though the actual areas accessed by vboot-reference are much smaller. A much faster way of accessing this information would be just passing around pointers to the appropriate memory areas. This would eliminate one copy, and also would make sure that only the areas actually accessed get fetched from SPI flash. This patch provides this ability trying to keep code changes to a minimum. New feature is enabled by defining CONFIG_HARDWARE_MAPPED_SPI. The firmware storage API for file reads changes when the new configuration option is set: a pointer to pointer to buffer is passed to the read_spi() function instead of a pointer to buffer. When the new feature is enabled the read_spi() function sets the pointer value to point to the requested data instead of copying the data into the buffer. A new data type is introduced (read_buf_type), which is set to be a (void *) if the new feature is not enabled, or (void **) otherwise. This type is used as the buffer pointer in the spi_read() function. Code allocating/freeing buffers used to keep data read from SPI flash is now conditionally compiled. Call sites for the spi_read() function are modified to adjust the buffer pointer parameter (pass the address of the parameter instead of the parameter, when the new feature is enabled). gbb field access functions can be aliased to gbb_init(), as they all in fact do the same - read a certain section of the gbb area. This change does not benefit the ARM implementations, and makes the code more complicated that it should be. Some u-boot rearchitecture along with vboot_reference API enhancements could address this. A tracking issue (http://code.google.com/p/chromium-os/issues/detail?id=22528) has been opened for that. BUG=chrome-os-partner:6585, chromium-os:22528 TEST=manual . build a new stumpy firmware image . boot the stumpy, observe it start up chromeos. . assess the boot timing using the cbmem.py utility (this modification shaves in excess of 100ms off the boot time). . disable the new feature, build a stumpy image, observe that is still boots chromeOs. . run emerge-terga2_kaen chromeos-u-boot to confirem that ARM version builds cleanly. Change-Id: I4e6ab530d24f5771b5a86a48d3f3135101b469a6 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/11152
2011-11-03tegra3: Add pinmux settings (do not submit)Jimmy Zhang
This adds pinmux config settings for a generic T30 board. This is just an example - real code should do pinmux setting in the driver which is the only thing that can know what the settings should be. BUG=chromium-os:21033 TEST=build and boot on Seaboard, Waluigi Change-Id: Ia56fcfc55e6cce8ac8b75c31d0618182aaa16bf6 Reviewed-on: https://gerrit.chromium.org/gerrit/8705 Commit-Ready: Doug Anderson <dianders@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
2011-11-03CHROMIUM: config: Config options to allow us to boot a kernelDoug Anderson
With this set of config options we can now boot the kernel. With the kernel I have, it doesn't work yet, but at least it prints out some messages to the UART. BUG=chromium-os:21540 TEST=If I have a reasonable kernel in MMC1, I see that it can boot quite a ways into the kernel w/ autoboot. Change-Id: I5918fff3d48f2ff9f2bac9261c84e08e60a1560a Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10675
2011-11-03Clean up MTRR 7 right before jumping to the kernelStefan Reinauer
This cleans up the rom caching optimization implemented in coreboot (and needed throughout u-boot runtime. Signed-off-by: Stefan Reinauer <reinauer@google.com> BUG=chrome-os-partner:6585 TEST=boot coreboot on stumpy Change-Id: I7242c9c2b0546c633be8fb8ebc815ed6e6fda4d1 Reviewed-on: https://gerrit.chromium.org/gerrit/11138 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2011-11-02Move Memset from vboot_reference to vbexport/u-bootStefan Reinauer
All memory operations (except the "safe ones") live in the firmware so the fast operations can be used. Except Memset. This CL changes that problem. There is another CL for this issue (removing the function from vboot_reference) BUG=chrome-os-partner:6313 TEST=run coreboot/u-boot on Stumpy Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: Ic2ee5970d2ee9df64a9eda261a4348341cb4b31a Reviewed-on: https://gerrit.chromium.org/gerrit/10992 Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-by: Bill Richardson <wfrichar@chromium.org> Reviewed-by: Randall Spangler <rspangler@chromium.org>
2011-10-28CHROMIUM: waluigi: config: Turn on MMC for waluigi.Doug Anderson
BUG=chromium-os:21540 TEST=Able to use mmc. Change-Id: I1d566f08f9dd115b5be1a05ffa0ff07b508e0cee Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10663
2011-10-28Remove generic MMC support from the coreboot configGabe Black
The MMC reader looks like a USB device, so we don't need to support generic MMC devices directly. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: Id5729cd9d51e0c4cb2570b9b452f96bd23764b85 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10755 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28Add a high level option to the coreboot config to control network supportGabe Black
We aren't currently planning to have network support in production firmware. If we need it at some point, we can easily turn that support back on. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy Change-Id: Iad265bb2bbae5360135eaa8577cc6dfde95045f9 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10754 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28Add a high level option to the coreboot config to control IDE supportGabe Black
Disable it by default since we're using the SCSI interface now. Being able to turn IDE back on later might be necessary if we haven't gotten AHCI support working on a new platform yet. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: I07e80dc2673529f3f2ec52431e1c0958511539b0 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10753 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28Refactor the coreboot config to separate out command line optionsGabe Black
Also disable those options. This way they can be enabled when needed, but when you aren't expecting to use the command line (most of the time) they can be excluded to reduce u-boot's size and load time. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: I7ea0f02a1aa3537fa4282822bbc0d4976c2b1383 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10752 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-28CHROMIUM: waluigi: config: Turn on PMU for waluigi.Doug Anderson
BUG=chromium-os:21540 TEST=With MMC change and MMC config change, was able to use MMC. Change-Id: I61d543cbf7b2b6d885dd641b35b7c33cd85b51d6 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10662
2011-10-28mmc: tegra3: Add MMC support for Tegra3 (specifically, waluigi)Doug Anderson
BUG=chromium-os:21540 TEST=Able to talk to MMC1 on Waluigi w/ future config changes. Specifically: 1. mmcinfo 0 - works (shows info) 2. mmcinfo 1 - works (shows info) 3. mmc rescan 1; mmc part 1 - works (shows partitions) Change-Id: I730d3b91088f20ccf7ca20f3f31f7d59514af243 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10661 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-28mmc: tegra: Rename tegra2_mmc to tegra_mmc in prep for tegra3Doug Anderson
BUG=chromium-os:21540 TEST=Built u-boot and booted u-boot on tegra2_kaen Change-Id: Id6f11512ea1a95bd57b600601b488ae20b34db2d Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/10808 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-27Use new VBNV section in coreboot tableStefan Reinauer
... rather than parsing the coreboot option table BUG=none TEST=boot tested on Stumpy Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I0814dd6c37cf826fda55a0f4acd6a1763b0626db Reviewed-on: https://gerrit.chromium.org/gerrit/10758 Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2011-10-26Move the initial location of u-boot so it doesn't overlap ramoopsGabe Black
The current location overlaps with the ramoops area, but due to a bug in coreboot, this is only detected if coreboot is small enough to fit entirely in that area. BUG=chrome-os-partner:6649 TEST=Built and booted on Stumpy. Change-Id: I5f9dbfe2434d42c216257413a6f8b3dd345e087e Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/10751 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Reinauer <reinauer@google.com>
2011-10-25Turn on the skip-i8042 option on stumpyGabe Black
BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Change-Id: I81d01ee325527156bb045a310b9b489cc935456c Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/10626 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-25Implement board_i8042_skip for coreboot boardsGabe Black
This implementation, which overrides the default for chromeos/coreboot boards, skips initializing the i8042 controller if the skip-i8042 config parameter is non-zero in the flattened device tree. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Built and booted on Alex and verified that keyboard input still works. Change-Id: I6d4c64fe3d1c007f4f3d8f0556c8c5a0528e0928 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/10625 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-25Provide a board specific mechanism to decide whether to skip i8042 initGabe Black
This change adds a board overridable function which can be used to decide whether or not to initialize the i8042 keyboard controller. On systems where it isn't actually connected to anything, this can save a significant amount of boot time. On Stumpy, this saves about 200ms on boot. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Built and booted on Alex. Change-Id: Ibac6fd4149fd125f6461ae4e86936eb9b012edb6 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/10624 Commit-Ready: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-25Use finer grain udelays while waitng for the i8042 keyboard buffer to emptyGabe Black
On x86, the i8042 keyboard controller driver frequently waits for the keyboard input buffer to be empty to make sure the controller has had a chance to process the data it was given. The way the delay loop was structured, if the controller hadn't cleared the corresponding status bit immediately, it would wait 1ms before checking again. If the keyboard responded quickly but not instantly, the driver would still wait a full 1ms when perhaps 1us would have been sufficient. Because udelay is a busy wait anyway, this change decreases the delay between checks to 1us. Also, this change gets rid of a hardcoded 250ms delay. On Stumpy, this saves 100-150ms during boot. Also, the total boot time I'm measuring at ToT is a little higher than expected. I'd like to see what other people measure. BUG=chrome-os-partner:6585 TEST=Built and booted on Stumpy. Built and booted on Alex, and verified that the keyboard still worked at the u-boot prompt. Change-Id: Ic361c4e88ded8e57b4377790dd011a11a0ce385b Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/10623 Commit-Ready: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: Gabe Black <gabeblack@chromium.org>
2011-10-25pmu: Make pmu_read() and pmu_write() set the bus numberDoug Anderson
This means that callers of pmu_read() and pmu_write() don't need to manually set the bus number. This also removes the side effect where pmu_set_nominal() could end up changing the current i2c bus number. BUG=chromium-os:21540 TEST=Compiled; sanity check on Seaboard. Change-Id: I1e4abdb5b2f06e9e3bada3e709280f6092d15005 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10461
2011-10-25pmu: Make pmu_read() and pmu_write() usable without clock scalingDoug Anderson
BUG=chromium-os:21540 TEST=Compiled Change-Id: I9ea3fa2ae185417cc81881f69c4a5d1ae639917a Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10458
2011-10-25pmu: Allow inclusion of PMU code without turning on clock scalingDoug Anderson
We may want to use the PMU to adjust various voltages even if we don't have clock scaling. Separate these two conecpts. BUG=chromium-os:21540 TEST=Compiled for Seaboard Change-Id: I376afe7e795fd2dd8035186c58f48a552391b4d1 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10457
2011-10-25pmu: Move pmu.c exported function defs to non-arch pmu.hDoug Anderson
Previously the exported function definitions for pmu.c were split among board.h, emc.c, and the architecture specific pmu.h. Create a non-architecture-specific pmu.h and put them there. NOTE: The arch/pmu.h file should probably be removed eventually in favor of the device tree, since it really just defines how a particular PMU is used by a particular family of board. BUG=chromium-os:21540 TEST=Compiled for seaboard Change-Id: Ia026e3ff3f1f465be629cc8a348879d2d1564686 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10456 Reviewed-by: Tom Warren <twarren@nvidia.com>
2011-10-25pmu: Move definition of abs() and stp() out of pmu header fileDoug Anderson
These two functions were only used in pmu.c, so there was no reason for them to be in the header file. They probably should be moved elsewhere eventually, but this is a better location than they were. BUG=None TEST=Compiled Change-Id: Ia13cfd0fd828589862bfd555c3a34d3b6b4bda1c Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10455 Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Warren <twarren@nvidia.com>
2011-10-20Import the glibc implementation of x86 memset into u-bootGabe Black
I ran four iterations with the two implementations and used Vadim's CBMEM infrastructure to measure the time they took. These are all in microseconds, and the timestamp portion of the raw output of cbmem.py is included in the bug. The new implementation is about twice as fast as the old. Old: 1. 418,286 2. 418,302 3. 418,298 4. 418,290 New: 1. 184,800 2. 194,629 3. 194,188 4. 192,718 BUG=chrome-os-partner:6487 TEST=Booted on Stumpy. Change-Id: Iba398929cbba395e10851d676ae9d356ae670f41 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/10284 Reviewed-by: Mike Frysinger <vapier@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Commit-Ready: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org>
2011-10-20CHROMIUM: waluigi: config: Add i2c commandsDoug Anderson
BUG=chromium-os:21540 TEST=Saw that I could run i2c probe on busses 0-3 Change-Id: I291a7d208843e146738830eda62ccf9849503a17 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10367 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-20CHROMIUM: tegra3: i2c: Add i2c support for all but i2c4Doug Anderson
BUG=chromium-os:21540 TEST=With future config change, saw that I could run i2c probe on busses 0-3 Change-Id: Ibfad91a3e7360434111c7aa6d2ea45f73e9690fc Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10366 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-20tegra: Check for I2C support when using clock scalingSimon Glass
It is not possible to enable CONFIG_TEGRA_CLOCK_SCALING without I2C and the current error message is not friendly. Add an explicit message to the board file. BUG=chromium-os:19004 TEST=build for Seaboard with and without I2C and see that it gives an error in the second case but not the first Change-Id: I65b7f379c48ee5f737ea5a473954cfc69f457021 Reviewed-on: http://gerrit.chromium.org/gerrit/10248 Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-20tegra3: Add T30 supportSimon Glass
This adds support for T30 init to ap20.c, and modifies the board file to cope with it also. The only thing missing at this point is the pinmux setup. BUG=chromium-os:21033 TEST=build and boot on Seaboard Change-Id: I3e75245c1fdb99bc15eadcf60b173e6f0d9bb56c Reviewed-on: http://gerrit.chromium.org/gerrit/8704 Reviewed-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com> Tested-by: Simon Glass <sjg@chromium.org>
2011-10-19CHROMIUM: tegra3: i2c: Move DVC semantics choice to device treeDoug Anderson
On the tegra30, it appears that the "DVC" i2c controller has been normalized and no longer requires special semantics for accessing it (it has also just been renamed to "i2c5"). This change makes it so that we don't pick DVC semantics based on the periperal ID, but instead allow the device tree to specify. BUG=chromium-os:21540 TEST=Compiled / booted on Kaen Change-Id: Idfd96d1193b5ac267c61416544c63cc03dab396d Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10279 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-19CHROMIUM: fdt: Use __func__ in print messages.Doug Anderson
This moves debug messages from manually including their own function name to using __func__ to get it. This is less error prone. As a result of this, some error messages are now fixed to list the proper function name. BUG=None TEST=Added '#define DEBUG 1' to this file and saw that several of the debugs messages seemed fine; no compiler warnings found. Change-Id: I548c3e2e8850ee558149b9879d2801c19fe21d63 Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10339 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-19CHROMIUM: disk: part_efi: fix **pgpt_pte == NULLTom Warren
Code was setting **pgpt_pte == NULL, which meant that the pointer to the gpt_pte would be stored at RAM address 00000000. This 'worked' on T20 (SDRAM starts @ 0x00000000), but hung gpt/EFI access on T30 (SDRAM starts @ 0x80000000). NOTE: this is based on an original change from nVidia (see Original- lines below), but was modified to remove the unnecessary use of a global variable. BUG=chromium-os:21540 TEST=Can now run 'mmc rescan 1' and 'mmc part 1' on T30 board (with WIP t30 patches applied). TEST=No can still do mmc commands on Kaen. Change-Id: I0e70bbde3a130b93bf3dd862e1330b41088dd0b0 Original-Change-Id: Idf877d17753b7f4da0180f342276ac28249e1980 Original-Reviewed-on: http://git-master/r/49880 Original-Tested-by: Tom Warren <twarren@nvidia.com> Original-Reviewed-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10271 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-19Remove the workaround for F0000-100000 in x86's setup_arch_unused_memoryGabe Black
This region is now marked properly in the e820 table, so it doesn't need to be explicitly preserved by u-boot any more. BUG=None TEST=Built and booted on Stumpy. Verified that the i915 DRM driver was able to find the vbios tables, or at least didn't complain that it couldn't. Change-Id: I2d5953e00d302e68f076f9bdd77a5efbbb93a64a Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: http://gerrit.chromium.org/gerrit/10334 Reviewed-by: Simon Glass <sjg@chromium.org>
2011-10-19CHROMIUM: cosmetic: Replace __FUNCTION__ with __func__Doug Anderson
This makes checkpatch happy. BUG=None TEST=Compiles; function name prints OK in debug messages. Change-Id: I0158653c5be216ddf0094d0e42d61918484f946b Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-on: http://gerrit.chromium.org/gerrit/10270 Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-07 16:52:30 +0000