diff options
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/chromeos/fdt_decode.c | 26 | ||||
| -rw-r--r-- | lib/chromeos/firmware_storage_spi.c | 10 |
2 files changed, 27 insertions, 9 deletions
diff --git a/lib/chromeos/fdt_decode.c b/lib/chromeos/fdt_decode.c index ace7fa3a87d..bf63621a217 100644 --- a/lib/chromeos/fdt_decode.c +++ b/lib/chromeos/fdt_decode.c @@ -71,25 +71,31 @@ static int decode_fmap_entry(const void *blob, int offset, const char *base, return 0; } -static int decode_block_lba(const void *blob, int offset, const char *path, +static int decode_int_property(const void *blob, int offset, const char *name, uint64_t *out) { int length; uint32_t *property; - offset = relpath_offset(blob, offset, path); - if (offset < 0) - return offset; - - property = (uint32_t *)fdt_getprop(blob, offset, "block-lba", &length); - if (!property) { - VBDEBUG(PREFIX "failed to load LBA '%s/block-lba'\n", path); + property = (uint32_t *)fdt_getprop(blob, offset, name, &length); + if (!property || length < 1) { + VBDEBUG(PREFIX "failed to load int %s\n", name); return -FDT_ERR_MISSING; } *out = fdt32_to_cpu(*property); return 0; } +static int decode_block_lba(const void *blob, int offset, const char *path, + uint64_t *out) +{ + offset = relpath_offset(blob, offset, path); + if (offset < 0) + return offset; + + return decode_int_property(blob, offset, "block-lba", out); +} + int decode_firmware_entry(const char *blob, int fmap_offset, const char *name, struct fmap_firmware_entry *entry) { @@ -115,6 +121,10 @@ int fdt_decode_twostop_fmap(const void *blob, struct twostop_fmap *config) VBDEBUG(PREFIX "chromeos,flashmap node is missing\n"); return fmap_offset; } + if (decode_int_property(blob, fmap_offset, "bios-base", + &config->firmware_base)) { + config->firmware_base = 0; + } err = decode_firmware_entry(blob, fmap_offset, "rw-a", &config->readwrite_a); err |= decode_firmware_entry(blob, fmap_offset, "rw-b", diff --git a/lib/chromeos/firmware_storage_spi.c b/lib/chromeos/firmware_storage_spi.c index 26e01046db3..e1a34c0cbc1 100644 --- a/lib/chromeos/firmware_storage_spi.c +++ b/lib/chromeos/firmware_storage_spi.c @@ -11,6 +11,7 @@ /* Implementation of firmware storage access interface for SPI */ #include <common.h> +#include <libfdt.h> #include <malloc.h> #include <spi_flash.h> #include <chromeos/common.h> @@ -25,6 +26,8 @@ # define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 #endif +DECLARE_GLOBAL_DATA_PTR; + /* * Check the right-exclusive range [offset:offset+*count_ptr), and adjust * value pointed by <count_ptr> to form a valid range when needed. @@ -52,6 +55,8 @@ static int read_spi(firmware_storage_t *file, uint32_t offset, uint32_t count, { struct spi_flash *flash = file->context; + offset += file->firmware_base; + if (border_check(flash, offset, count)) return -1; @@ -108,6 +113,8 @@ static int write_spi(firmware_storage_t *file, uint32_t offset, uint32_t count, uint32_t k, n; int status, ret = -1; + offset += file->firmware_base; + /* We will erase <n> bytes starting from <k> */ k = offset; n = count; @@ -159,7 +166,7 @@ static int close_spi(firmware_storage_t *file) return 0; } -int firmware_storage_open_spi(firmware_storage_t *file) +int firmware_storage_open_spi(firmware_storage_t *file, uint64_t firmware_base) { const unsigned int bus = 0; const unsigned int cs = 0; @@ -172,6 +179,7 @@ int firmware_storage_open_spi(firmware_storage_t *file) return -1; } + file->firmware_base = firmware_base; file->read = read_spi; file->write = write_spi; file->close = close_spi; |