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-rw-r--r--include/configs/amcc-common.h2
-rw-r--r--include/configs/sequoia.h6
-rw-r--r--include/fdt_support.h2
-rw-r--r--include/ppc440.h7
-rw-r--r--include/ppc4xx.h2
5 files changed, 18 insertions, 1 deletions
diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h
index 51128a3b56..8cd97b86da 100644
--- a/include/configs/amcc-common.h
+++ b/include/configs/amcc-common.h
@@ -156,6 +156,8 @@
*/
#define CONFIG_OF_LIBFDT
#define CONFIG_OF_BOARD_SETUP
+/* Update size in "reg" property of NOR FLASH device tree nodes */
+#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE
/*
* Booting and default environment
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 89acacc7f6..9605ce25ba 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -243,6 +243,11 @@
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
+/* I2C bootstrap EEPROM */
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR 0x52
+#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET 0
+#define CONFIG_4xx_CONFIG_BLOCKSIZE 16
+
/* I2C SYSMON (LM75, AD7414 is almost compatible) */
#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */
#define CONFIG_DTT_AD7414 1 /* use AD7414 */
@@ -300,6 +305,7 @@
/*
* Commands additional to the ones defined in amcc-common.h
*/
+#define CONFIG_CMD_CHIP_CONFIG
#define CONFIG_CMD_DTT
#define CONFIG_CMD_FAT
#define CONFIG_CMD_NAND
diff --git a/include/fdt_support.h b/include/fdt_support.h
index 16734c5352..0a9dd0dd84 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -79,5 +79,7 @@ void ft_pci_setup(void *blob, bd_t *bd);
void set_working_fdt_addr(void *addr);
int fdt_resize(void *blob);
+int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size);
+
#endif /* ifdef CONFIG_OF_LIBFDT */
#endif /* ifndef __FDT_SUPPORT_H */
diff --git a/include/ppc440.h b/include/ppc440.h
index fe0db93b51..e54a977dc1 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -1701,9 +1701,14 @@
#define PLLSYS1_NTO1_MASK 0x00000001 /* CPU:PLB N-to-1 ratio */
#endif /* CONFIG_440GX */
-#if defined (CONFIG_440EPX) || defined (CONFIG_440GRX)
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
#define CPR0_ICFG_RLI_MASK 0x80000000
#define CPR0_SPCID_SPCIDV0_MASK 0x03000000
+#define CPR0_SPCID_SPCIDV0_DIV1 0x01000000
+#define CPR0_SPCID_SPCIDV0_DIV2 0x02000000
+#define CPR0_SPCID_SPCIDV0_DIV3 0x03000000
+#define CPR0_SPCID_SPCIDV0_DIV4 0x00000000
#define CPR0_PERD_PERDV0_MASK 0x07000000
#endif
diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index 3bff00a559..5024db447f 100644
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -221,6 +221,8 @@ static inline void set_mcsr(u32 val)
asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
}
+int ppc4xx_pci_sync_clock_config(u32 async);
+
#endif /* __ASSEMBLY__ */
/* for multi-cpu support */