summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/configs/aquila-am69.h60
-rw-r--r--include/dt-bindings/mux/ti-serdes.h26
2 files changed, 85 insertions, 1 deletions
diff --git a/include/configs/aquila-am69.h b/include/configs/aquila-am69.h
new file mode 100644
index 0000000000..5c5a402fec
--- /dev/null
+++ b/include/configs/aquila-am69.h
@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Configuration header file for Aquila AM69 SoM
+ *
+ * Copyright 2024 Toradex - https://www.toradex.com/
+ */
+
+#ifndef __CONFIG_AQUILA_AM69_H
+#define __CONFIG_AQUILA_AM69_H
+
+#define RAMDISK_ADDR_R 0x90300000
+#define SCRIPTADDR 0x90280000
+
+/* DDR Configuration */
+#define CFG_SYS_SDRAM_BASE 0x80000000
+#define CFG_SYS_SDRAM_BASE1 0x880000000
+
+#define MEM_LAYOUT_ENV_SETTINGS \
+ "fdt_addr_r=0x90200000\0" \
+ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
+ "kernel_comp_addr_r=0x80200000\0" \
+ "kernel_comp_size=0x08000000\0" \
+ "ramdisk_addr_r=" __stringify(RAMDISK_ADDR_R) "\0" \
+ "scriptaddr=" __stringify(SCRIPTADDR) "\0"
+
+#define BOOT_TARGETS "mmc1 mmc0 dhcp"
+
+#define EXTRA_ENV_DFUARGS \
+ "dfu_alt_info_ram=" \
+ "tispl.bin ram 0x80080000 0x200000;" \
+ "u-boot.img ram 0x81000000 0x400000;" \
+ "loadaddr ram " __stringify(CONFIG_SYS_LOAD_ADDR) " 0x80000;" \
+ "scriptaddr ram " __stringify(SCRIPTADDR) " 0x80000;" \
+ "ramdisk_addr_r ram " __stringify(RAMDISK_ADDR_R) " 0x8000000\0"
+
+/* Incorporate settings into the U-Boot environment */
+#define CFG_EXTRA_ENV_SETTINGS \
+ EXTRA_ENV_DFUARGS \
+ MEM_LAYOUT_ENV_SETTINGS \
+ "boot_script_dhcp=boot.scr\0" \
+ "boot_targets=" BOOT_TARGETS "\0" \
+ "console=ttyS2\0" \
+ "fdt_board=dev\0" \
+ "update_tiboot3=askenv confirm Did you load tiboot3.bin (y/N)?; " \
+ "if test \"$confirm\" = \"y\"; then " \
+ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
+ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \
+ "${blkcnt}; fi\0" \
+ "update_tispl=askenv confirm Did you load tispl.bin (y/N)?; " \
+ "if test \"$confirm\" = \"y\"; then " \
+ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
+ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x800 " \
+ "${blkcnt}; fi\0" \
+ "update_uboot=askenv confirm Did you load u-boot.img (y/N)?; " \
+ "if test \"$confirm\" = \"y\"; then " \
+ "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
+ "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x1800 " \
+ "${blkcnt}; fi\0"
+
+#endif /* __CONFIG_AQUILA_AM69_H */
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index fbe008619d..cc47a0eeb6 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -179,7 +179,31 @@
#define J784S4_SERDES2_LANE3_IP3_UNUSED 0x2
#define J784S4_SERDES2_LANE3_IP4_UNUSED 0x3
+#define J784S4_SERDES4_LANE0_EDP_LANE0 0x0
+#define J784S4_SERDES4_LANE0_QSGMII_LANE5 0x1
+#define J784S4_SERDES4_LANE0_IP3_UNUSED 0x2
+#define J784S4_SERDES4_LANE0_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE1_EDP_LANE1 0x0
+#define J784S4_SERDES4_LANE1_QSGMII_LANE6 0x1
+#define J784S4_SERDES4_LANE1_IP3_UNUSED 0x2
+#define J784S4_SERDES4_LANE1_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE2_EDP_LANE2 0x0
+#define J784S4_SERDES4_LANE2_QSGMII_LANE7 0x1
+#define J784S4_SERDES4_LANE2_IP3_UNUSED 0x2
+#define J784S4_SERDES4_LANE2_IP4_UNUSED 0x3
+
+#define J784S4_SERDES4_LANE3_EDP_LANE3 0x0
+#define J784S4_SERDES4_LANE3_QSGMII_LANE8 0x1
+#define J784S4_SERDES4_LANE3_USB 0x2
+#define J784S4_SERDES4_LANE3_IP4_UNUSED 0x3
+
/* J722S */
-#define J722S_SERDES0_LANE0_USB 0x0
+#define J722S_SERDES0_LANE0_USB 0x0
+#define J722S_SERDES0_LANE0_QSGMII_LANE2 0x1
+
+#define J722S_SERDES1_LANE0_PCIE0_LANE0 0x0
+#define J722S_SERDES1_LANE0_QSGMII_LANE1 0x1
#endif /* _DT_BINDINGS_MUX_TI_SERDES */