diff options
Diffstat (limited to 'include')
122 files changed, 622 insertions, 1313 deletions
diff --git a/include/asm-blackfin/blackfin_local.h b/include/asm-blackfin/blackfin_local.h index e17d8a2003..8ec7928945 100644 --- a/include/asm-blackfin/blackfin_local.h +++ b/include/asm-blackfin/blackfin_local.h @@ -61,6 +61,9 @@ extern u_long get_sclk(void); # define bfin_revid() (*pCHIPID >> 28) +extern bool bfin_os_log_check(void); +extern void bfin_os_log_dump(void); + extern void blackfin_icache_flush_range(const void *, const void *); extern void blackfin_dcache_flush_range(const void *, const void *); extern void blackfin_icache_dcache_flush_range(const void *, const void *); diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index a8398348b1..fdfc654f29 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -114,9 +114,9 @@ typedef struct ccsr_ddr { uint timing_cfg_0; /* 0x2104 - DDR SDRAM Timing Configuration Register 0 */ uint timing_cfg_1; /* 0x2108 - DDR SDRAM Timing Configuration Register 1 */ uint timing_cfg_2; /* 0x210c - DDR SDRAM Timing Configuration Register 2 */ - uint sdram_cfg_1; /* 0x2110 - DDR SDRAM Control Configuration 1 */ + uint sdram_cfg; /* 0x2110 - DDR SDRAM Control Configuration 1 */ uint sdram_cfg_2; /* 0x2114 - DDR SDRAM Control Configuration 2 */ - uint sdram_mode_1; /* 0x2118 - DDR SDRAM Mode Configuration 1 */ + uint sdram_mode; /* 0x2118 - DDR SDRAM Mode Configuration 1 */ uint sdram_mode_2; /* 0x211c - DDR SDRAM Mode Configuration 2 */ uint sdram_mode_cntl; /* 0x2120 - DDR SDRAM Mode Control */ uint sdram_interval; /* 0x2124 - DDR SDRAM Interval Configuration */ diff --git a/include/common.h b/include/common.h index a6c7c07692..6e689b2337 100644 --- a/include/common.h +++ b/include/common.h @@ -697,6 +697,7 @@ void show_boot_progress(int val); #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) +#define ROUND(a,b) (((a) + (b)) & ~((b) - 1)) #define DIV_ROUND(n,d) (((n) + ((d)/2)) / (d)) #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d)) #define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) diff --git a/include/compiler.h b/include/compiler.h new file mode 100644 index 0000000000..272fd3cf62 --- /dev/null +++ b/include/compiler.h @@ -0,0 +1,125 @@ +/* + * Keep all the ugly #ifdef for system stuff here + */ + +#ifndef __COMPILER_H__ +#define __COMPILER_H__ + +#include <stddef.h> + +#ifdef USE_HOSTCC + +#if defined(__BEOS__) || \ + defined(__NetBSD__) || \ + defined(__FreeBSD__) || \ + defined(__sun__) || \ + defined(__APPLE__) +# include <inttypes.h> +#elif defined(__linux__) || defined(__WIN32__) || defined(__MINGW32__) +# include <stdint.h> +#endif + +#include <errno.h> +#include <stdlib.h> +#include <stdint.h> +#include <stdio.h> +#include <string.h> + +extern int errno; + +#if !defined(__WIN32__) && !defined(__MINGW32__) +# include <sys/mman.h> +#endif + +/* Not all systems (like Windows) has this define, and yes + * we do replace/emulate mmap() on those systems ... + */ +#ifndef MAP_FAILED +# define MAP_FAILED ((void *)-1) +#endif + +#include <fcntl.h> +#ifndef O_BINARY /* should be define'd on __WIN32__ */ +#define O_BINARY 0 +#endif + +#ifdef __linux__ +# include <endian.h> +# include <byteswap.h> +#elif defined(__MACH__) +# include <machine/endian.h> +typedef unsigned long ulong; +typedef unsigned int uint; +#endif + +typedef uint8_t __u8; +typedef uint16_t __u16; +typedef uint32_t __u32; + +#define uswap_16(x) \ + ((((x) & 0xff00) >> 8) | \ + (((x) & 0x00ff) << 8)) +#define uswap_32(x) \ + ((((x) & 0xff000000) >> 24) | \ + (((x) & 0x00ff0000) >> 8) | \ + (((x) & 0x0000ff00) << 8) | \ + (((x) & 0x000000ff) << 24)) +#define _uswap_64(x, sfx) \ + ((((x) & 0xff00000000000000##sfx) >> 56) | \ + (((x) & 0x00ff000000000000##sfx) >> 40) | \ + (((x) & 0x0000ff0000000000##sfx) >> 24) | \ + (((x) & 0x000000ff00000000##sfx) >> 8) | \ + (((x) & 0x00000000ff000000##sfx) << 8) | \ + (((x) & 0x0000000000ff0000##sfx) << 24) | \ + (((x) & 0x000000000000ff00##sfx) << 40) | \ + (((x) & 0x00000000000000ff##sfx) << 56)) +#if defined(__GNUC__) +# define uswap_64(x) _uswap_64(x, ull) +#else +# define uswap_64(x) _uswap_64(x, ) +#endif + +#if __BYTE_ORDER == __LITTLE_ENDIAN +# define cpu_to_le16(x) (x) +# define cpu_to_le32(x) (x) +# define cpu_to_le64(x) (x) +# define le16_to_cpu(x) (x) +# define le32_to_cpu(x) (x) +# define le64_to_cpu(x) (x) +# define cpu_to_be16(x) uswap_16(x) +# define cpu_to_be32(x) uswap_32(x) +# define cpu_to_be64(x) uswap_64(x) +# define be16_to_cpu(x) uswap_16(x) +# define be32_to_cpu(x) uswap_32(x) +# define be64_to_cpu(x) uswap_64(x) +#else +# define cpu_to_le16(x) uswap_16(x) +# define cpu_to_le32(x) uswap_32(x) +# define cpu_to_le64(x) uswap_64(x) +# define le16_to_cpu(x) uswap_16(x) +# define le32_to_cpu(x) uswap_32(x) +# define le64_to_cpu(x) uswap_64(x) +# define cpu_to_be16(x) (x) +# define cpu_to_be32(x) (x) +# define cpu_to_be64(x) (x) +# define be16_to_cpu(x) (x) +# define be32_to_cpu(x) (x) +# define be64_to_cpu(x) (x) +#endif + +#else /* !USE_HOSTCC */ + +#include <linux/string.h> +#include <linux/types.h> +#include <asm/byteorder.h> + +/* Types for `void *' pointers. */ +#if __WORDSIZE == 64 +typedef unsigned long int uintptr_t; +#else +typedef unsigned int uintptr_t; +#endif + +#endif + +#endif diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 2ee4f809d0..694a87b970 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -157,8 +157,10 @@ #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CONFIG_SYS_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ -#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ -#define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CONFIG_SYS_NAND_QUIET 1 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /*----------------------------------------------------------------------- * PCI stuff diff --git a/include/configs/BMW.h b/include/configs/BMW.h index 24ffb00538..98f6396238 100644 --- a/include/configs/BMW.h +++ b/include/configs/BMW.h @@ -81,13 +81,9 @@ #include <config_cmd_default.h> #define CONFIG_CMD_DATE -#define CONFIG_CMD_DOC #define CONFIG_CMD_ELF -/* CONFIG_CMD_DOC required legacy NAND support */ -#define CONFIG_NAND_LEGACY - #if 0 #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 39f41e6a2d..229a5138e5 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -209,16 +209,8 @@ /* For CATcenter there is only NAND on the module */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 #define NAND_NO_RB -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - #define CONFIG_SYS_NAND0_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND0_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CONFIG_SYS_NAND0_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h index ae8494d577..2384925a27 100644 --- a/include/configs/CMS700.h +++ b/include/configs/CMS700.h @@ -165,6 +165,8 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index cf21fd90ee..6d76d9ff8d 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -146,15 +146,6 @@ #undef CONFIG_WATCHDOG /* watchdog disabled */ /*----------------------------------------------------------------------- - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - -/*----------------------------------------------------------------------- * Miscellaneous configuration options */ @@ -179,7 +170,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_NFS diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h index 489378a183..83b010cb66 100644 --- a/include/configs/CPU87.h +++ b/include/configs/CPU87.h @@ -182,7 +182,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C @@ -190,9 +189,6 @@ #define CONFIG_CMD_PCI #endif - -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/G2000.h b/include/configs/G2000.h index bf9fd82753..6819c3e362 100644 --- a/include/configs/G2000.h +++ b/include/configs/G2000.h @@ -196,32 +196,12 @@ *----------------------------------------------------------------------- */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 #define CONFIG_SYS_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */ #define CONFIG_SYS_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */ #define CONFIG_SYS_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */ #define CONFIG_SYS_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */ -#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CE);} while(0) -#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CE);} while(0) -#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_ALE);} while(0) -#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_ALE);} while(0) -#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CONFIG_SYS_NAND_CLE);} while(0) -#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CONFIG_SYS_NAND_CLE);} while(0) -#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CONFIG_SYS_NAND_RDY)) - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) #endif /*----------------------------------------------------------------------- diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index 8f18ab242d..12f879a0e0 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -244,10 +244,6 @@ #define CONFIG_CMD_MII #define CONFIG_CMD_BEDBUG -#if !defined(CONFIG_SC) - #define CONFIG_CMD_DOC -#endif - #ifdef CONFIG_POST #define CONFIG_CMD_DIAG #endif @@ -279,9 +275,6 @@ #define CONFIG_FPGA_VIRTEX2 #define CONFIG_SYS_FPGA_PROG_FEEDBACK - -#define CONFIG_NAND_LEGACY - /* * Verbose help from command monitor. */ @@ -738,16 +731,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /* - * Disk On Chip (millenium) configuration - */ -#if !defined(CONFIG_SC) -#define CONFIG_SYS_MAX_DOC_DEVICE 1 -#undef CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM -#undef CONFIG_SYS_DOC_PASSIVE_PROBE -#endif - -/* * FEC interrupt assignment */ #define FEC_INTERRUPT SIU_LEVEL1 diff --git a/include/configs/HH405.h b/include/configs/HH405.h index 92335239df..1a2266ff7b 100644 --- a/include/configs/HH405.h +++ b/include/configs/HH405.h @@ -219,6 +219,8 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index ea502d42cd..518d94d61a 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -160,6 +160,8 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index 51e012cc46..4c4af054b2 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -265,6 +265,8 @@ #define CONFIG_SYS_NAND0_BASE 0xE1000000 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #endif /* CONFIG_CMD_NAND */ /*----------------------------------------------------------------------- diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index da9b1cfff6..7ac9342251 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -84,12 +84,9 @@ #if !defined(CONFIG_MIP405T) #define CONFIG_CMD_USB - #define CONFIG_CMD_DOC #endif -#define CONFIG_NAND_LEGACY - #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /************************************************************** @@ -384,13 +381,6 @@ #define CONFIG_ISO_PARTITION /* Experimental */ /************************************************************ - * Disk-On-Chip configuration - ************************************************************/ -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM -/************************************************************ * Keyboard support ************************************************************/ #undef CONFIG_ISA_KEYBOARD diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h index c4acc05fe1..69289813a6 100644 --- a/include/configs/MPC832XEMDS.h +++ b/include/configs/MPC832XEMDS.h @@ -315,15 +315,15 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_MMIO_BASE 0x90000000 -#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE -#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_IO_BASE 0x00000000 -#define CONFIG_SYS_PCI_IO_PHYS 0xE0300000 -#define CONFIG_SYS_PCI_IO_SIZE 0x100000 /* 1M */ +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000 +#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE +#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xE0300000 +#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ #define CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 @@ -334,6 +334,8 @@ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_83XX_GENERIC_PCI +#define CONFIG_83XX_PCI_STREAMING #undef CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -500,14 +502,14 @@ #ifdef CONFIG_PCI /* PCI MEM space: cacheable */ -#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI1_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U /* PCI MMIO space: cache-inhibit and guarded */ -#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI_MMIO_PHYS | BATL_PP_10 | \ +#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI1_MMIO_PHYS | BATL_PP_10 | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI1_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #else @@ -536,9 +538,7 @@ /* * Environment Configuration - */ - -#define CONFIG_ENV_OVERWRITE + */ #define CONFIG_ENV_OVERWRITE #if defined(CONFIG_UEC_ETH) #define CONFIG_HAS_ETH0 diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 068df57e0a..037cad586d 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -382,6 +382,7 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_83XX_GENERIC_PCI #ifndef CONFIG_PCI_PNP #define PCI_ENET0_IOADDR 0x00000000 diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h index 60c996841d..028ef8ca93 100644 --- a/include/configs/MPC8360EMDS.h +++ b/include/configs/MPC8360EMDS.h @@ -350,15 +350,15 @@ * General PCI * Addresses are mapped 1-1. */ -#define CONFIG_SYS_PCI_MEM_BASE 0x80000000 -#define CONFIG_SYS_PCI_MEM_PHYS CONFIG_SYS_PCI_MEM_BASE -#define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_MMIO_BASE 0x90000000 -#define CONFIG_SYS_PCI_MMIO_PHYS CONFIG_SYS_PCI_MMIO_BASE -#define CONFIG_SYS_PCI_MMIO_SIZE 0x10000000 /* 256M */ -#define CONFIG_SYS_PCI_IO_BASE 0x00000000 -#define CONFIG_SYS_PCI_IO_PHYS 0xE0300000 -#define CONFIG_SYS_PCI_IO_SIZE 0x100000 /* 1M */ +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 +#define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE +#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000 +#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE +#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_IO_BASE 0x00000000 +#define CONFIG_SYS_PCI1_IO_PHYS 0xE0300000 +#define CONFIG_SYS_PCI1_IO_SIZE 0x100000 /* 1M */ #define CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 @@ -369,6 +369,8 @@ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_83XX_GENERIC_PCI +#define CONFIG_83XX_PCI_STREAMING #undef CONFIG_EEPRO100 #undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ @@ -539,14 +541,14 @@ #ifdef CONFIG_PCI /* PCI MEM space: cacheable */ -#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT6L (CONFIG_SYS_PCI1_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT6U (CONFIG_SYS_PCI1_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U /* PCI MMIO space: cache-inhibit and guarded */ -#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI_MMIO_PHYS | BATL_PP_10 | \ +#define CONFIG_SYS_IBAT7L (CONFIG_SYS_PCI1_MMIO_PHYS | BATL_PP_10 | \ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT7U (CONFIG_SYS_PCI1_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U #else diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 807a534316..91327188ba 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -230,7 +230,6 @@ #endif #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ -#define CONFIG_SYS_MONITOR_LEN (320 * 1024) /* Reserve 320 kB for Mon */ #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ /* diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 7085d287db..0aaab4a4a8 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -45,6 +45,7 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ +#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -218,6 +219,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ #define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */ #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ +#define PIXIS_VBOOT_LBMAP 0xe0 /* VBOOT - CFG_LBMAP */ +#define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */ +#define PIXIS_VBOOT_LBMAP_NOR1 0x01 /* cfg_lbmap - boot from NOR 1 */ +#define PIXIS_VBOOT_LBMAP_NOR2 0x02 /* cfg_lbmap - boot from NOR 2 */ +#define PIXIS_VBOOT_LBMAP_NOR3 0x03 /* cfg_lbmap - boot from NOR 3 */ +#define PIXIS_VBOOT_LBMAP_PJET 0x04 /* cfg_lbmap - boot from projet */ +#define PIXIS_VBOOT_LBMAP_NAND 0x05 /* cfg_lbmap - boot from NAND */ #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */ @@ -563,10 +571,10 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index 525361179b..4af599b1b0 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -418,10 +418,10 @@ /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 813512c045..a8f206f538 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -440,10 +440,10 @@ extern unsigned long get_clock_freq(void); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index 1d8fecf794..2de313931e 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -44,6 +44,7 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit PCI resources */ #define CONFIG_FSL_LAW 1 /* Use common FSL init code */ +#define CONFIG_E1000 1 /* Defind e1000 pci Ethernet card*/ #define CONFIG_TSEC_ENET /* tsec ethernet support */ #define CONFIG_ENV_OVERWRITE @@ -192,6 +193,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */ #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ +#define PIXIS_VBOOT_FMAP 0x80 /* VBOOT - CFG_FLASHMAP */ +#define PIXIS_VBOOT_FBANK 0x40 /* VBOOT - CFG_FLASHBANK */ #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ @@ -458,10 +461,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 7089ac77ed..bebb9e9611 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -500,10 +500,10 @@ extern unsigned long get_clock_freq(void); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index ef95118ffe..94952dc990 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -438,10 +438,10 @@ extern unsigned long get_clock_freq(void); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index 761a370d13..c1a1a6d923 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -452,10 +452,10 @@ /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ac34047371..7b8c6c772b 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -456,10 +456,10 @@ extern unsigned long get_clock_freq(void); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 27044f7bb1..6e8f1ff606 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -471,10 +471,10 @@ extern unsigned long get_clock_freq(void); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index 235be5143d..64f5c4b750 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -237,6 +237,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ #define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */ #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ +#define PIXIS_VBOOT_LBMAP 0xc0 /* VBOOT - CFG_LBMAP */ +#define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */ +#define PIXIS_VBOOT_LBMAP_PJET 0x01 /* cfg_lbmap - boot from projet */ +#define PIXIS_VBOOT_LBMAP_NAND 0x02 /* cfg_lbmap - boot from NAND */ +#define PIXIS_VBOOT_LBMAP_NOR1 0x03 /* cfg_lbmap - boot from NOR 1 */ #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */ @@ -607,10 +612,10 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index 955ac3dfa6..bf2e359fd4 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -224,6 +224,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */ #define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */ #define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */ +#define PIXIS_VBOOT_FMAP 0x80 /* VBOOT - CFG_FLASHMAP */ +#define PIXIS_VBOOT_FBANK 0x40 /* VBOOT - CFG_FLASHBANK */ #define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */ #define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 796938a518..76ca916636 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -120,7 +120,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_NAND #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_MII @@ -497,95 +496,9 @@ #define DSP_BASE 0xF1000000 #define NAND_BASE 0xF1010000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \ - } while(0) - -#if CONFIG_NETPHONE_VERSION == 1 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#elif CONFIG_NETPHONE_VERSION == 2 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP -#define CONFIG_SYS_DIRECT_NAND_TFTP /*****************************************************************************/ diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 724e807398..4f9f9fe0f1 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -134,7 +134,6 @@ #define CONFIG_CMD_IDE #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII -#define CONFIG_CMD_NAND #define CONFIG_CMD_NFS #define CONFIG_CMD_PCMCIA #define CONFIG_CMD_PING @@ -616,105 +615,6 @@ #define ER_BASE 0xF1020000 #define DUMMY_BASE 0xF1FF0000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -/* #define NAND_NO_RB */ - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PD3, CLE = PD4, CE = PD5, F_RY_BY = PC13 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 5)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 5)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 3)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 3)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~(1 << (15 - 4)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= (1 << (15 - 4)); \ - } while(0) - -#ifndef NAND_NO_RB -#define NAND_WAIT_READY(nand) \ - do { \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 13))) == 0) { \ - WATCHDOG_RESET(); \ - } \ - } while (0) -#else -#define NAND_WAIT_READY(nand) udelay(12) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ -#define NAND_CACHE_PAGES 16 /* size of nand cache in 512 bytes pages */ - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition, whole device */ -#undef CONFIG_CMD_MTDPARTS -#define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_SIZE 0x00100000 -#define CONFIG_JFFS2_PART_OFFSET 0x00200000 - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nand0=netta-nand" -#define MTDPARTS_DEFAULT "mtdparts=netta-nand:1m@2m(jffs2)" -*/ - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index a14b2dd897..d060cb7a42 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -121,7 +121,6 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_NAND #define CONFIG_CMD_DHCP #define CONFIG_CMD_PING #define CONFIG_CMD_MII @@ -498,95 +497,9 @@ #define DSP_BASE 0xF1000000 #define NAND_BASE 0xF1010000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PD17, CLE = PE18, CE = PE20, F_RY_BY = PE31 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 20)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 20)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 17)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) &= ~(1 << (31 - 18)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat) |= (1 << (31 - 18)); \ - } while(0) - -#if CONFIG_NETTA2_VERSION == 1 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pedat & (1 << (31 - 31))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#elif CONFIG_NETTA2_VERSION == 2 -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & (1 << (15 - 15))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP -#define CONFIG_SYS_DIRECT_NAND_TFTP /*****************************************************************************/ diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index f97bdcb72d..a18b480127 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -107,7 +107,7 @@ #define CONFIG_CMD_PING #if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 -#define CONFIG_CMD_NAND +/* #define CONFIG_CMD_NAND */ /* disabled */ #endif @@ -393,80 +393,6 @@ #endif -/*****************************************************************************/ - -#define CONFIG_NAND_LEGACY - -#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 - -/* NAND */ -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0040; \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0100; \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0080; \ - } while(0) - -#define NAND_WAIT_READY(nand) \ - do { \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \ - ; \ - } while (0) - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -#endif /*****************************************************************************/ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 676f0134fc..5c2c5cb321 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -282,6 +282,11 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define PIXIS_VWATCH 0x24 /* Watchdog Register */ #define PIXIS_LED 0x25 /* LED Register */ +#define PIXIS_SW(x) 0x20 + (x - 1) * 2 +#define PIXIS_EN(x) 0x21 + (x - 1) * 2 +#define PIXIS_SW7_LBMAP 0xc0 /* SW7 - cfg_lbmap */ +#define PIXIS_SW7_VBANK 0x30 /* SW7 - cfg_vbank */ + /* old pixis referenced names */ #define PIXIS_VCLKH 0x19 /* VELA VCLKH register */ #define PIXIS_VCLKL 0x1A /* VELA VCLKL register */ @@ -412,7 +417,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* I2C bit-banged */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed and slave address */ #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 #define CONFIG_SYS_I2C_SLAVE 0x7F @@ -637,10 +641,10 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy); /* * For booting Linux, the board info and command line data - * have to be in the first 8 MB of memory, since this is + * have to be in the first 16 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ /* * Internal Definitions diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index 5951d007d5..99a8c4a646 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -75,7 +75,6 @@ #define CONFIG_CMD_BSP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_ELF #define CONFIG_CMD_NFS #define CONFIG_CMD_PCI @@ -84,8 +83,6 @@ #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ @@ -251,15 +248,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /*----------------------------------------------------------------------- - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - -/*----------------------------------------------------------------------- RTC m48t59 */ #define CONFIG_RTC_MK48T59 diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index a683a8fbb0..66e6d24817 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -75,7 +75,6 @@ #define CONFIG_CMD_BSP #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_ELF #define CONFIG_CMD_NFS #define CONFIG_CMD_PCI @@ -86,8 +85,6 @@ #define CONFIG_PCI 1 #define CONFIG_PCI_PNP 1 /* PCI plug-and-play */ -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ @@ -253,15 +250,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ /*----------------------------------------------------------------------- - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#undef CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - -/*----------------------------------------------------------------------- RTC m48t59 */ #define CONFIG_RTC_MK48T59 diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index e301599b8a..962b29e95b 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -71,14 +71,10 @@ #define CONFIG_CMD_USB #define CONFIG_CMD_MII #define CONFIG_CMD_SDRAM -#define CONFIG_CMD_DOC #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES #define CONFIG_CMD_BSP - -#define CONFIG_NAND_LEGACY - #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " /************************************************************** diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h index 7f2337bac8..2e41526afe 100644 --- a/include/configs/PLU405.h +++ b/include/configs/PLU405.h @@ -183,6 +183,8 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* * PCI stuff */ diff --git a/include/configs/PM520.h b/include/configs/PM520.h index ff73ef9a29..f9687d2743 100644 --- a/include/configs/PM520.h +++ b/include/configs/PM520.h @@ -86,12 +86,6 @@ #define CONFIG_USB_STORAGE #endif -#if !defined(CONFIG_BOOT_ROM) -/* DoC requires legacy NAND for now */ -#define CONFIG_NAND_LEGACY -#endif - - /* * BOOTP options */ @@ -117,10 +111,6 @@ #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB -#if !defined(CONFIG_BOOT_ROM) -#define CONFIG_CMD_DOC -#endif - #if defined(CONFIG_MPC5200) #define CONFIG_CMD_PCI #endif @@ -186,15 +176,6 @@ #define CONFIG_RTC_PCF8563 #define CONFIG_SYS_I2C_RTC_ADDR 0x51 -/* - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM #define CONFIG_SYS_DOC_BASE 0xE0000000 #define CONFIG_SYS_DOC_SIZE 0x00100000 diff --git a/include/configs/PM826.h b/include/configs/PM826.h index b58f529b96..636bd26a7a 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -169,7 +169,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_NFS @@ -179,19 +178,6 @@ #define CONFIG_CMD_PCI #endif - -#define CONFIG_NAND_LEGACY - -/* - * Disk-On-Chip configuration - */ - -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - /* * Miscellaneous configurable options */ diff --git a/include/configs/PM828.h b/include/configs/PM828.h index 96c86f7e90..9d620af05a 100644 --- a/include/configs/PM828.h +++ b/include/configs/PM828.h @@ -169,7 +169,6 @@ #define CONFIG_CMD_BEDBUG #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_I2C #define CONFIG_CMD_NFS @@ -179,18 +178,6 @@ #define CONFIG_CMD_PCI #endif - -/* - * Disk-On-Chip configuration - */ -#define CONFIG_NAND_LEGACY - -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ - -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - /* * Miscellaneous configurable options */ diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h index 16baf8c9be..6fba0caad2 100644 --- a/include/configs/PPChameleonEVB.h +++ b/include/configs/PPChameleonEVB.h @@ -210,6 +210,9 @@ * NAND-FLASH stuff *----------------------------------------------------------------------- */ + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* * nand device 1 on dave (PPChameleonEVB) needs more time, * so we just introduce additional wait in nand_wait(), @@ -309,32 +312,6 @@ } \ } while(0) -#if 0 -#define SECTORSIZE 512 -#define NAND_NO_RB - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#ifdef NAND_NO_RB -/* constant delay (see also tR in the datasheet) */ -#define NAND_WAIT_READY(nand) do { \ - udelay(12); \ -} while (0) -#else -/* use the R/B pin */ -/* TBD */ -#endif - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -#endif /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index f36244d12c..00ac6cf1f3 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -114,7 +114,6 @@ #define CONFIG_CMD_CDP #define CONFIG_CMD_DHCP #define CONFIG_CMD_DIAG -#define CONFIG_CMD_DOC #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -329,14 +328,6 @@ #endif -/************************************************************ - * Disk-On-Chip configuration - ************************************************************/ -#define CONFIG_SYS_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ -#define CONFIG_SYS_DOC_SHORT_TIMEOUT -#define CONFIG_SYS_DOC_SUPPORT_2000 -#define CONFIG_SYS_DOC_SUPPORT_MILLENNIUM - /*----------------------------------------------------------------------- * *----------------------------------------------------------------------- diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h index cac04b4017..8ee8cbf0b5 100644 --- a/include/configs/SXNI855T.h +++ b/include/configs/SXNI855T.h @@ -163,75 +163,8 @@ #define CONFIG_CMD_EEPROM #define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_NAND #define CONFIG_CMD_DATE - -#define CONFIG_SYS_JFFS2_SORT_FRAGMENTS - -/* - * JFFS2 partitions - * - */ -/* No command line, one static partition */ -#undef CONFIG_CMD_MTDPARTS - -/* -#define CONFIG_JFFS2_DEV "nor0" -#define CONFIG_JFFS2_PART_SIZE 0x00780000 -#define CONFIG_JFFS2_PART_OFFSET 0x00080000 -*/ - -#define CONFIG_JFFS2_DEV "nand0" -#define CONFIG_JFFS2_PART_SIZE 0x00200000 -#define CONFIG_JFFS2_PART_OFFSET 0x00000000 - -/* mtdparts command line support */ -/* Note: fake mtd_id used, no linux mtd map file */ -/* -#define CONFIG_CMD_MTDPARTS -#define MTDIDS_DEFAULT "nor0=sixnet-0,nand0=sixnet-nand" -#define MTDPARTS_DEFAULT "mtdparts=sixnet-0:7680k@512k();sixnet-nand:2m(jffs2-nand)" -*/ - -/* NAND flash support */ -#define CONFIG_NAND_LEGACY -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* DFBUSY is available on Port C, bit 12; 0 if busy */ -#define NAND_WAIT_READY(nand) \ - while (!(((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x0008)); -#define WRITE_NAND_COMMAND(d, adr) WRITE_NAND((d), (adr)) -#define WRITE_NAND_ADDRESS(d, adr) WRITE_NAND((d), (adr)) -#define WRITE_NAND(d, adr) \ - do { (*(volatile uint8_t *)(adr) = (uint8_t)(d)); } while (0) -#define READ_NAND(adr) (*(volatile uint8_t *)(adr)) -#define CLE_LO 0x01 /* 0 selects CLE mode (CLE high) */ -#define ALE_LO 0x02 /* 0 selects ALE mode (ALE high) */ -#define CE_LO 0x04 /* 1 selects chip (CE low) */ -#define nand_setcr(cr, val) do {*(volatile uint8_t*)(cr) = (val);} while (0) -#define NAND_DISABLE_CE(nand) \ - nand_setcr((nand)->IO_ADDR + 1, ALE_LO | CLE_LO) -#define NAND_ENABLE_CE(nand) \ - nand_setcr((nand)->IO_ADDR + 1, CE_LO | ALE_LO | CLE_LO) -#define NAND_CTL_CLRALE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO) -#define NAND_CTL_SETALE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | CLE_LO) -#define NAND_CTL_CLRCLE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | ALE_LO | CLE_LO) -#define NAND_CTL_SETCLE(nandptr) \ - nand_setcr((nandptr) + 1, CE_LO | ALE_LO) - /* * Miscellaneous configurable options */ diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h index 9cac696b98..6c462af53c 100644 --- a/include/configs/TQM8272.h +++ b/include/configs/TQM8272.h @@ -439,6 +439,8 @@ WRITE_NAND(d, addr); \ } while(0) +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #endif /* CONFIG_CMD_NAND */ #define CONFIG_PCI diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index efade69ca2..541a27b49a 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -247,12 +247,16 @@ extern int tqm834x_num_flash_banks; #if defined(CONFIG_PCI) #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_83XX_GENERIC_PCI #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ /* PCI1 host bridge */ -#define CONFIG_SYS_PCI1_MEM_BASE 0xc0000000 +#define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE -#define CONFIG_SYS_PCI1_MEM_SIZE 0x20000000 /* 512M */ +#define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ +#define CONFIG_SYS_PCI1_MMIO_BASE (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) +#define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE +#define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ #define CONFIG_SYS_PCI1_IO_BASE 0xe2000000 #define CONFIG_SYS_PCI1_IO_PHYS CONFIG_SYS_PCI1_IO_BASE #define CONFIG_SYS_PCI1_IO_SIZE 0x1000000 /* 16M */ @@ -418,10 +422,10 @@ extern int tqm834x_num_flash_banks; #ifdef CONFIG_PCI #define CONFIG_SYS_IBAT3L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) #define CONFIG_SYS_IBAT3U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MEM_BASE + 0x10000000 | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MEM_BASE + 0x10000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_10 | BATL_MEMCOHERENCE | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_IBAT4U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP) #define CONFIG_SYS_IBAT5L (CONFIG_SYS_PCI1_IO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE + 0x10000000 | BATU_BL_16M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT5U (CONFIG_SYS_PCI1_IO_BASE | BATU_BL_16M | BATU_VS | BATU_VP) #else #define CONFIG_SYS_IBAT3L (0) #define CONFIG_SYS_IBAT3U (0) diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index 6f13c63f5c..1fbf4bf492 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -351,8 +351,6 @@ /* NAND FLASH */ #ifdef CONFIG_NAND -#undef CONFIG_NAND_LEGACY - #define CONFIG_NAND_FSL_UPM 1 #define CONFIG_MTD_NAND_ECC_JFFS2 1 /* use JFFS2 ECC */ @@ -374,6 +372,8 @@ #define NAND_BIG_DELAY_US 25 /* max tR for Samsung devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #endif /* CONFIG_NAND */ /* diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 7edea6a047..6051480254 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -246,42 +246,4 @@ #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000 -/*----------------------------------------------------------------------- - * NAND flash settings - */ -#if defined(CONFIG_CMD_NAND) - -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_WAIT_READY(nand) NF_WaitRB() - -#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) -#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW) - - -#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d) -#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d) -#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d) -#define WRITE_NAND(d, adr) NF_Write(d) -#define READ_NAND(adr) NF_Read() -/* the following functions are NOP's because S3C24X0 handles this in hardware */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) - -#define CONFIG_MTD_NAND_VERIFY_WRITE 1 -#define CONFIG_MTD_NAND_ECC_JFFS2 1 - -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h index 38a1d0deca..17397e8aab 100644 --- a/include/configs/VOH405.h +++ b/include/configs/VOH405.h @@ -169,6 +169,8 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ #define CONFIG_SYS_NAND_QUIET 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h index 5c281a1a66..dbfa1aae9f 100644 --- a/include/configs/WUH405.h +++ b/include/configs/WUH405.h @@ -157,6 +157,8 @@ #define CONFIG_SYS_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- diff --git a/include/configs/XPEDITE5170.h b/include/configs/XPEDITE5170.h index 2553293306..8be9fa0555 100644 --- a/include/configs/XPEDITE5170.h +++ b/include/configs/XPEDITE5170.h @@ -254,7 +254,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE /* PEX8518 slave I2C interface */ #define CONFIG_SYS_I2C_PEX8518_ADDR 0x70 @@ -580,6 +579,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* * Boot Flags diff --git a/include/configs/XPEDITE5200.h b/include/configs/XPEDITE5200.h index 89ab69272b..deda20843a 100644 --- a/include/configs/XPEDITE5200.h +++ b/include/configs/XPEDITE5200.h @@ -129,6 +129,7 @@ #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xfbf40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ @@ -369,6 +370,7 @@ * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* * Boot Flags diff --git a/include/configs/XPEDITE5370.h b/include/configs/XPEDITE5370.h index 536e063385..acb62ad1dd 100644 --- a/include/configs/XPEDITE5370.h +++ b/include/configs/XPEDITE5370.h @@ -124,6 +124,12 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); */ #define CONFIG_SYS_NAND_BASE 0xef800000 #define CONFIG_SYS_NAND_BASE2 0xef840000 /* Unused at this time */ +#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \ + CONFIG_SYS_NAND_BASE2} +#define CONFIG_SYS_MAX_NAND_DEVICE 2 +#define CONFIG_MTD_NAND_VERIFY_WRITE +#define CONFIG_SYS_NAND_QUIET_TEST /* 2nd NAND flash not always populated */ +#define CONFIG_NAND_FSL_ELBC /* * NOR flash configuration @@ -137,6 +143,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \ {0xf7f40000, 0xc0000} } #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ @@ -374,16 +381,17 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); #define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_FLASH #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MII +#define CONFIG_CMD_NAND #define CONFIG_CMD_NET #define CONFIG_CMD_PCA953X #define CONFIG_CMD_PCA953X_INFO #define CONFIG_CMD_PCI #define CONFIG_CMD_PING +#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SNTP /* @@ -412,6 +420,7 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy); * the maximum mapped by the Linux kernel during initialization. */ #define CONFIG_SYS_BOOTMAPSZ (16 << 20) /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */ /* * Boot Flags diff --git a/include/configs/acadia.h b/include/configs/acadia.h index 9ffd86b1ac..b71010769f 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -265,6 +265,8 @@ #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup *----------------------------------------------------------------------*/ diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index c5134a2140..74677d8754 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -106,6 +106,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* NOR flash - no real flash on this board */ @@ -159,7 +161,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/apollon.h b/include/configs/apollon.h index fa5a7a9e22..575f60e166 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -256,6 +256,8 @@ #define CONFIG_ENV_IS_IN_ONENAND 1 #define CONFIG_ENV_ADDR 0x00020000 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #ifdef CONFIG_SYS_USE_UBI #define CONFIG_CMD_MTDPARTS #define MTDIDS_DEFAULT "onenand0=onenand" diff --git a/include/configs/aria.h b/include/configs/aria.h index e7e238d8f3..4211113d9e 100644 --- a/include/configs/aria.h +++ b/include/configs/aria.h @@ -376,7 +376,6 @@ #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE /* I2C speed and slave address */ #define CONFIG_SYS_I2C_SPEED 100000 diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 219eea3114..27f8fd1a16 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -132,6 +132,9 @@ #define CONFIG_SYS_NAND_DBW_8 1 #endif +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ +#endif + /* Ethernet */ #define CONFIG_MACB 1 #define CONFIG_RMII 1 @@ -201,7 +204,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index 56128c153e..2017b666a7 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -117,38 +117,8 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -#define CONFIG_CMD_NAND - -#define CONFIG_NAND_LEGACY - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ -#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ #include <asm/arch/AT91RM9200.h> /* needed for port definitions */ -#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) -#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) - -#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2)) - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -/* the following are NOP's in our implementation */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 diff --git a/include/configs/at91rm9200ek.h b/include/configs/at91rm9200ek.h index c898c73046..58ec94a848 100644 --- a/include/configs/at91rm9200ek.h +++ b/include/configs/at91rm9200ek.h @@ -311,7 +311,6 @@ struct bd_info_ext { */ #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 1828c63afd..6cee59368c 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -122,6 +122,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* NOR flash - no real flash on this board */ @@ -205,7 +207,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 6d240230db..3d108ab626 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -132,6 +132,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 21) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* NOR flash - no real flash on this board */ @@ -223,7 +225,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index 00f3114fb5..32f3f62c1d 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -266,6 +266,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ @@ -333,7 +335,6 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 572c45bfb0..4b46c31dbd 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -118,6 +118,7 @@ /* NOR flash, if populated */ #ifndef CONFIG_CMD_NAND #define CONFIG_SYS_NO_FLASH 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #else #define CONFIG_SYS_FLASH_CFI 1 #define CONFIG_FLASH_CFI_DRIVER 1 @@ -140,6 +141,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ @@ -209,7 +212,6 @@ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index c4668236c2..916730454f 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -118,6 +118,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD17 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet - not present */ @@ -168,7 +170,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h index c03561cef1..4be2a5cfb8 100644 --- a/include/configs/bf533-stamp.h +++ b/include/configs/bf533-stamp.h @@ -36,7 +36,7 @@ #define CONFIG_CCLK_DIV 1 /* SCLK_DIV controls the system clock divider */ /* Values can range from 1-15 */ -#define CONFIG_SCLK_DIV 5 +#define CONFIG_SCLK_DIV 6 /* note: 1.2 boards can go faster */ /* diff --git a/include/configs/bf537-minotaur.h b/include/configs/bf537-minotaur.h index 23c2d33bc0..463b7d08cc 100644 --- a/include/configs/bf537-minotaur.h +++ b/include/configs/bf537-minotaur.h @@ -87,9 +87,8 @@ #define CONFIG_SYS_AUTOLOAD "no" #define CONFIG_ROOTPATH /romfs -/* Use a fixed MAC address for booting up. Firstboot linux - * must fetch a valid MAC from the production server. */ -#define CONFIG_ETHADDR 02:80:ad:20:31:42 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:42 */ /* diff --git a/include/configs/bf537-srv1.h b/include/configs/bf537-srv1.h index 727b7e70e6..7368629981 100644 --- a/include/configs/bf537-srv1.h +++ b/include/configs/bf537-srv1.h @@ -87,9 +87,8 @@ #define CONFIG_SYS_AUTOLOAD "no" #define CONFIG_ROOTPATH /romfs -/* Use a fixed MAC address for booting up. Firstboot linux - * must fetch a valid MAC from the production server. */ -#define CONFIG_ETHADDR 02:80:ad:20:31:42 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:42 */ /* diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 48c51988af..d22d4113de 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -453,6 +453,7 @@ #define CONFIG_CMD_FAT #define CONFIG_CMD_NAND #define CONFIG_CMD_PCI +#define CONFIG_CMD_SATA #define CONFIG_CMD_SDRAM #define CONFIG_CMD_SNTP #define CONFIG_CMD_USB @@ -518,6 +519,19 @@ #endif /* CONFIG_ARCHES */ #endif /* CONFIG_460GT */ +/* + * SATA driver setup + */ +#ifdef CONFIG_CMD_SATA +#define CONFIG_SATA_DWC +#define CONFIG_LIBATA +#define SATA_BASE_ADDR 0xe20d1000 /* PPC460EX SATA Base Address */ +#define SATA_DMA_REG_ADDR 0xe20d0800 /* PPC460EX SATA Base Address */ +#define CONFIG_SYS_SATA_MAX_DEVICE 1 /* SATA MAX DEVICE */ +/* Convert sectorsize to wordsize */ +#define ATA_SECTOR_WORDS (ATA_SECT_SIZE/2) +#endif + /*----------------------------------------------------------------------- * External Bus Controller (EBC) Setup *----------------------------------------------------------------------*/ diff --git a/include/configs/csb637.h b/include/configs/csb637.h index e1cdc7f66e..7a5769696a 100644 --- a/include/configs/csb637.h +++ b/include/configs/csb637.h @@ -121,38 +121,6 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_PING -#ifdef NAND_SUPPORT_HAS_BEEN_FIXED /* NAND support is broken / unimplemented */ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */ -#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */ - -#include <asm/arch/AT91RM9200.h> /* needed for port definitions */ -#define NAND_DISABLE_CE(nand) do { *AT91C_PIOC_SODR = AT91C_PIO_PC0;} while(0) -#define NAND_ENABLE_CE(nand) do { *AT91C_PIOC_CODR = AT91C_PIO_PC0;} while(0) - -#define NAND_WAIT_READY(nand) while (!(*AT91C_PIOC_PDSR & AT91C_PIO_PC2)) - -#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_CLE) = (__u8)(d); } while(0) -#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr | AT91_SMART_MEDIA_ALE) = (__u8)(d); } while(0) -#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) -#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) -/* the following are NOP's in our implementation */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) - -#endif /* NAND_SUPPORT_HAS_BEEN_FIXED */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h index 9cb9838b5a..79095694ad 100644 --- a/include/configs/davinci_schmoogie.h +++ b/include/configs/davinci_schmoogie.h @@ -93,6 +93,7 @@ #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /*=====================*/ /* Board related stuff */ /*=====================*/ diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h index a47620fca8..531baf1af9 100644 --- a/include/configs/davinci_sffsdr.h +++ b/include/configs/davinci_sffsdr.h @@ -88,6 +88,7 @@ #define CONFIG_SYS_NAND_HW_ECC #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ /* I2C switch definitions for PCA9543 chip */ #define CONFIG_SYS_I2C_PCA9543_ADDR 0x70 #define CONFIG_SYS_I2C_PCA9543_ADDR_LEN 0 /* Single register. */ diff --git a/include/configs/delta.h b/include/configs/delta.h index e7186e8399..95e04f9e4a 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -220,14 +220,14 @@ /* * NAND Flash */ -#undef CONFIG_NAND_LEGACY - #define CONFIG_SYS_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */ #undef CONFIG_SYS_NAND1_BASE #define CONFIG_SYS_NAND_BASE_LIST { CONFIG_SYS_NAND0_BASE } #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* nand timeout values */ #define CONFIG_SYS_NAND_PROG_ERASE_TO 3000 #define CONFIG_SYS_NAND_OTHER_TO 100 @@ -255,13 +255,6 @@ #define CONFIG_MTD_DEBUG #define CONFIG_MTD_DEBUG_VERBOSE 1 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - #define CONFIG_SYS_NO_FLASH 1 #define CONFIG_ENV_IS_IN_NAND 1 diff --git a/include/configs/digsy_mtc.h b/include/configs/digsy_mtc.h index 558010fa75..6ccebfaf8c 100644 --- a/include/configs/digsy_mtc.h +++ b/include/configs/digsy_mtc.h @@ -272,6 +272,7 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_AUTO_COMPLETE 1 +#define CONFIG_CMDLINE_EDITING 1 #define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h index 0fcf692d18..0cc1b3b59c 100644 --- a/include/configs/keymile-common.h +++ b/include/configs/keymile-common.h @@ -45,6 +45,7 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 #define CONFIG_JFFS2_CMDLINE +#define CONFIG_CMD_MTDPARTS #undef CONFIG_WATCHDOG /* disable platform specific watchdog */ @@ -97,7 +98,7 @@ #define CONFIG_SYS_SLOT_ID_MASK (0x3f) /* mask for slot ID bits */ #define CONFIG_I2C_MULTI_BUS 1 -#define CONFIG_SYS_MAX_I2C_BUS 2 +#define CONFIG_SYS_MAX_I2C_BUS 1 #define CONFIG_SYS_I2C_INIT_BOARD 1 #define CONFIG_I2C_MUX 1 @@ -122,6 +123,20 @@ #define CONFIG_BOOTP_GATEWAY #define CONFIG_BOOTP_HOSTNAME +#define CONFIG_ENV_SIZE 0x04000 /* Size of Environment */ + +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */ + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for UBI/UBIFS */ + +/* UBI Support for all Keymile boards */ +#define CONFIG_CMD_UBI +#define CONFIG_RBTREE +#define CONFIG_MTD_PARTITIONS +#define CONFIG_FLASH_CFI_MTD +#define CONFIG_MTD_DEVICE +#define CONFIG_MTD_CONCAT + /* define this to use the keymile's io muxing feature */ /*#define CONFIG_IO_MUXING */ diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 97bac99597..df1b0612ce 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -217,6 +217,8 @@ #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_ADDR + CONFIG_SYS_NAND_CS) #define CONFIG_SYS_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /*----------------------------------------------------------------------- * DDR SDRAM *----------------------------------------------------------------------*/ diff --git a/include/configs/km8xx.h b/include/configs/km8xx.h index c305b89690..b5552d217c 100644 --- a/include/configs/km8xx.h +++ b/include/configs/km8xx.h @@ -121,7 +121,6 @@ #define CONFIG_SYS_FLASH_BASE 0xf0000000 #define CONFIG_SYS_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */ #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */ /* * For booting Linux, the board info and command line data @@ -146,7 +145,6 @@ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OFFSET CONFIG_SYS_MONITOR_LEN -#define CONFIG_ENV_SIZE 0x04000 /* Total Size of Environment Sector */ #define CONFIG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h index 41dbd0d241..869fd4ca1a 100644 --- a/include/configs/kmeter1.h +++ b/include/configs/kmeter1.h @@ -33,7 +33,6 @@ /* include common defines/options for all Keymile boards */ #include "keymile-common.h" -#undef CONFIG_SYS_I2C_INIT_BOARD #define CONFIG_MISC_INIT_R 1 /* * System Clock Setup @@ -158,7 +157,6 @@ #endif #define CONFIG_SYS_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserved for malloc */ /* * Initial RAM Base Address Setup @@ -292,7 +290,6 @@ #define CONFIG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K(one sector) for env */ -#define CONFIG_ENV_SIZE 0x20000 #define CONFIG_ENV_OFFSET (CONFIG_SYS_MONITOR_LEN) /* Address and size of Redundant Environment Sector */ @@ -314,7 +311,6 @@ #define CONFIG_SYS_I2C_SLAVE 0x7F #define CONFIG_SYS_I2C_OFFSET 0x3000 #define CONFIG_I2C_MULTI_BUS 1 -#define CONFIG_SYS_MAX_I2C_BUS 2 #define CONFIG_I2C_MUX 1 /* EEprom support */ @@ -326,7 +322,7 @@ #define CONFIG_SYS_DTT_MAX_TEMP 70 #define CONFIG_SYS_DTT_LOW_TEMP -30 #define CONFIG_SYS_DTT_HYSTERESIS 3 -#define CONFIG_SYS_DTT_BUS_NUM (2) +#define CONFIG_SYS_DTT_BUS_NUM (CONFIG_SYS_MAX_I2C_BUS) #if defined(CONFIG_PCI) #define CONFIG_CMD_PCI @@ -433,7 +429,7 @@ #define CONFIG_PRAM 512 /* protected RAM [KBytes] */ -#define MTDIDS_DEFAULT "nor0=app" +#define MTDIDS_DEFAULT "nor2=app" #define MTDPARTS_DEFAULT \ "mtdparts=app:256k(u-boot),128k(env),128k(envred)," \ "1536k(esw0),8704k(rootfs0),1536k(esw1),2432k(rootfs1),640k(var),768k(cfg)" diff --git a/include/configs/m501sk.h b/include/configs/m501sk.h index 1e7d90ed98..32a8194a2b 100644 --- a/include/configs/m501sk.h +++ b/include/configs/m501sk.h @@ -162,11 +162,6 @@ #define CONFIG_SYS_PROMPT_HUSH_PS2 ">>" #define CONFIG_SYS_MAX_NAND_DEVICE 0 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM 0x20000000 diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h index e00859a021..1ecae005ce 100644 --- a/include/configs/mecp5123.h +++ b/include/configs/mecp5123.h @@ -249,7 +249,6 @@ #define CONFIG_HARD_I2C /* I2C with hardware support */ #undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */ #define CONFIG_I2C_MULTI_BUS -#define CONFIG_I2C_CMD_TREE #define CONFIG_SYS_I2C_SPEED 400000 /* I2C speed */ #define CONFIG_SYS_I2C_SLAVE 0x7F /* slave address */ diff --git a/include/configs/meesc.h b/include/configs/meesc.h index 28c4de0217..825317201d 100644 --- a/include/configs/meesc.h +++ b/include/configs/meesc.h @@ -119,6 +119,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* Ethernet */ diff --git a/include/configs/mgcoge.h b/include/configs/mgcoge.h index cc42101853..ea14948c46 100644 --- a/include/configs/mgcoge.h +++ b/include/configs/mgcoge.h @@ -98,13 +98,11 @@ "addcon=setenv bootargs ${bootargs} " \ "console=ttyCPM0,${baudrate}\0" \ "mtdids=nor0=boot,nor1=app \0" \ - "mtdparts=mtdparts=boot:384k(u-boot),128k(env),128k(envred)," \ - "3456k(free);app:3m(esw0),10m(rootfs0),3m(esw1)," \ - "10m(rootfs1),1m(var),5m(cfg) \0" \ "partition=nor1,5 \0" \ "new_env=prot off FE060000 FE09FFFF; era FE060000 FE09FFFF \0" \ "EEprom_ivm=pca9544a:70:4 \0" \ - "mtdparts=" MK_STR(MTDPARTS_DEFAULT) "\0" \ + "mtdparts=" MK_STR(MTDPARTS_DEFAULT) "\0" \ + "unlock=yes\0" \ "" #define CONFIG_SYS_SDRAM_BASE 0x00000000 @@ -112,13 +110,17 @@ #define CONFIG_SYS_FLASH_SIZE 32 #define CONFIG_SYS_FLASH_CFI #define CONFIG_FLASH_CFI_DRIVER -#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks */ +#define CONFIG_SYS_MAX_FLASH_BANKS 3 /* max num of flash banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */ #define CONFIG_SYS_FLASH_BASE_1 0x50000000 -#define CONFIG_SYS_FLASH_SIZE_1 64 +#define CONFIG_SYS_FLASH_SIZE_1 32 +#define CONFIG_SYS_FLASH_BASE_2 0x52000000 +#define CONFIG_SYS_FLASH_SIZE_2 32 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE_1 } +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, \ + CONFIG_SYS_FLASH_BASE_1, \ + CONFIG_SYS_FLASH_BASE_2 } #define CONFIG_SYS_MONITOR_BASE TEXT_BASE #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) @@ -193,7 +195,6 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ -#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */ @@ -333,9 +334,10 @@ #define CONFIG_SYS_BR5_PRELIM ((CONFIG_SYS_FLASH_BASE_1 & BRx_BA_MSK) |\ BRx_PS_16 | BRx_MS_GPCM_P | BRx_V) -#define CONFIG_SYS_OR5_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE_1) |\ - ORxG_CSNT | ORxG_ACS_DIV2 |\ - ORxG_SCY_5_CLK | ORxG_TRLX ) +#define CONFIG_SYS_OR5_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE_1 + \ + CONFIG_SYS_FLASH_SIZE_2) |\ + ORxG_CSNT | ORxG_ACS_DIV2 |\ + ORxG_SCY_5_CLK | ORxG_TRLX ) #define CONFIG_SYS_RESET_ADDRESS 0xFDFFFFFC /* "bad" address */ diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 5062cdb167..f0b420781e 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -110,6 +110,8 @@ #define CONFIG_SYS_NAND_BASE 0x04000000 + (2 << 23) #define NAND_ALLOW_ERASE_ALL 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #define CONFIG_HARD_I2C #define CONFIG_SYS_I2C_SPEED 100000 #define CONFIG_SYS_I2C_SLAVE 1 diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 1803b1346c..9c1884244e 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -147,42 +147,6 @@ #define CONFIG_BOOTP_HOSTNAME #define CONFIG_BOOTP_BOOTPATH - -/* - * Board NAND Info. - */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/ - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define WRITE_NAND_COMMAND(d, adr) do {*(volatile u16 *)0x6800A07C = d;} while(0) -#define WRITE_NAND_ADDRESS(d, adr) do {*(volatile u16 *)0x6800A080 = d;} while(0) -#define WRITE_NAND(d, adr) do {*(volatile u16 *)0x6800A084 = d;} while(0) -#define READ_NAND(adr) (*(volatile u16 *)0x6800A084) -#define NAND_WAIT_READY(nand) udelay(10) - -#define NAND_NO_RB 1 - -#define CONFIG_SYS_NAND_WP -#define NAND_WP_OFF() do {*(volatile u32 *)(0x6800A050) |= 0x00000010;} while(0) -#define NAND_WP_ON() do {*(volatile u32 *)(0x6800A050) &= ~0x00000010;} while(0) - -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) -#define NAND_DISABLE_CE(nand) -#define NAND_ENABLE_CE(nand) - #define CONFIG_BOOTDELAY 3 #ifdef NFS_BOOT_DEFAULTS diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index c2bd7e67e3..a1a849e292 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -142,6 +142,7 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index e205c01b4b..198c3d1fd2 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -138,6 +138,7 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */ /* NAND devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 89023128cf..3bf798a400 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -128,6 +128,8 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index dbd4dcc030..d7e0ea1c44 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -132,6 +132,8 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 9e000ed1c2..4034ea4291 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -138,6 +138,9 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ /* devices */ + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + #define CONFIG_JFFS2_NAND /* nand device jffs2 lives on */ #define CONFIG_JFFS2_DEV "nand0" diff --git a/include/configs/omap3_zoom2.h b/include/configs/omap3_zoom2.h index c2ad5bf199..701a296b3d 100644 --- a/include/configs/omap3_zoom2.h +++ b/include/configs/omap3_zoom2.h @@ -158,6 +158,8 @@ #define GPMC_NAND_ECC_LP_x16_LAYOUT 1 #define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* Environment information */ #define CONFIG_BOOTDELAY 10 diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h index 1255f21e8b..2612165cb7 100644 --- a/include/configs/pdnb3.h +++ b/include/configs/pdnb3.h @@ -265,7 +265,8 @@ * NAND-FLASH stuff */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x51000000 /* NAND FLASH Base Address */ +#define CONFIG_SYS_NAND_BASE 0x51000000 /* NAND FLASH Base Address */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /* diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h index 4784c40d46..203a14c8d0 100644 --- a/include/configs/pm9261.h +++ b/include/configs/pm9261.h @@ -236,6 +236,8 @@ #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA16 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* NOR flash */ #define CONFIG_SYS_FLASH_CFI 1 @@ -366,7 +368,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h index 94e1eb9d8a..a6ff28c396 100644 --- a/include/configs/pm9263.h +++ b/include/configs/pm9263.h @@ -258,6 +258,8 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PB30 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif #define CONFIG_CMD_JFFS2 1 @@ -395,7 +397,6 @@ #define CONFIG_SYS_LONGHELP 1 #define CONFIG_CMDLINE_EDITING 1 -#define ROUND(A, B) (((A) + (B)) & ~((B) - 1)) /* * Size of malloc() pool */ diff --git a/include/configs/qemu-mips.h b/include/configs/qemu-mips.h index 844446205b..cbacdf98cb 100644 --- a/include/configs/qemu-mips.h +++ b/include/configs/qemu-mips.h @@ -163,6 +163,8 @@ #undef CONFIG_MEMSIZE_IN_BYTES +#define CONFIG_LZMA + /*----------------------------------------------------------------------- * Cache Configuration */ diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h index 3ea854becf..d63c43e932 100644 --- a/include/configs/quad100hd.h +++ b/include/configs/quad100hd.h @@ -225,6 +225,8 @@ #define CONFIG_SYS_NAND_CLE 31 /* our CLE is GPIO31 */ #define CONFIG_SYS_NAND_ALE 30 /* our ALE is GPIO30 */ #define CONFIG_SYS_MAX_NAND_DEVICE 1 + +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h index eab9629c07..f3dc7fe979 100644 --- a/include/configs/sbc2410x.h +++ b/include/configs/sbc2410x.h @@ -201,29 +201,6 @@ #if defined(CONFIG_CMD_NAND) #define CONFIG_NAND_S3C2410 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ -#define SECTORSIZE 512 - -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_WAIT_READY(nand) NF_WaitRB() -#define NAND_DISABLE_CE(nand) NF_SetCE(NFCE_HIGH) -#define NAND_ENABLE_CE(nand) NF_SetCE(NFCE_LOW) -#define WRITE_NAND_COMMAND(d, adr) NF_Cmd(d) -#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d) -#define WRITE_NAND_ADDRESS(d, adr) NF_Addr(d) -#define WRITE_NAND(d, adr) NF_Write(d) -#define READ_NAND(adr) NF_Read() -/* the following functions are NOP's because S3C24X0 handles this in hardware */ -#define NAND_CTL_CLRALE(nandptr) -#define NAND_CTL_SETALE(nandptr) -#define NAND_CTL_CLRCLE(nandptr) -#define NAND_CTL_SETCLE(nandptr) -/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */ #endif /* CONFIG_CMD_NAND */ #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 84a251a06a..20dcd1ca9c 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -329,6 +329,7 @@ #define CONFIG_NET_MULTI #define CONFIG_PCI_PNP /* do pci plug-and-play */ +#define CONFIG_83XX_GENERIC_PCI #undef CONFIG_EEPRO100 #undef CONFIG_TULIP diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 97e1da22bb..7e00ab8c71 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -426,6 +426,7 @@ extern unsigned long offsetOfEnvironment; #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_BASE 0x77D00000 +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ #define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */ diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index 018f576ef2..ddc8e7174a 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -269,6 +269,8 @@ 48, 49, 50, 51, 52, 53, 54, 55, \ 56, 57, 58, 59, 60, 61, 62, 63} +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* Boot configuration (define only one of next 3) */ #define CONFIG_BOOT_NAND /* None of these are currently implemented. Left from the original Samsung diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 5b91b4d7c7..35feed0fe1 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -188,6 +188,8 @@ #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_CMD_NAND +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* LIME GDC */ #define CONFIG_SYS_LIME_BASE 0xc8000000 #define CONFIG_SYS_LIME_SIZE 0x04000000 /* 64 MB */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 147233df1e..d16262b6cf 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -118,7 +118,6 @@ #define CONFIG_CMD_DHCP #define CONFIG_CMD_MII -#define CONFIG_CMD_NAND #define CONFIG_CMD_NFS #define CONFIG_CMD_PING @@ -446,90 +445,9 @@ #define NAND_SIZE 0x00010000 /* 64K */ #define NAND_BASE 0xF1000000 -/****************************************************************/ - -/* NAND */ -#define CONFIG_NAND_LEGACY -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 -#define CONFIG_MTD_NAND_VERIFY_WRITE -#define CONFIG_MTD_NAND_UNSAFE - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#undef NAND_NO_RB - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -/* ALE = PC15, CLE = PB23, CE = PA7, F_RY_BY = PA6 */ -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) |= (1 << (15 - 7)); \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat) &= ~(1 << (15 - 7)); \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) &= ~(1 << (15 - 15)); \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat) |= (1 << (15 - 15)); \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) &= ~(1 << (31 - 23)); \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_pbdat) |= (1 << (31 - 23)); \ - } while(0) - -#ifndef NAND_NO_RB -#define NAND_WAIT_READY(nand) \ - do { \ - int _tries = 0; \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_padat & (1 << (15 - 6))) == 0) \ - if (++_tries > 100000) \ - break; \ - } while (0) -#else -#define NAND_WAIT_READY(nand) udelay(12) -#endif - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - /*****************************************************************************/ #define CONFIG_SYS_DIRECT_FLASH_TFTP -#define CONFIG_SYS_DIRECT_NAND_TFTP /*****************************************************************************/ diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index 3917a1bdd2..425f472a7f 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -147,12 +147,8 @@ #define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DOC #define CONFIG_CMD_DATE - -#define CONFIG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h index 15c37087f6..86b6ea1e18 100644 --- a/include/configs/zylonite.h +++ b/include/configs/zylonite.h @@ -193,7 +193,6 @@ /* * NAND Flash */ -#define CONFIG_NEW_NAND_CODE #define CONFIG_SYS_NAND0_BASE 0x0 #undef CONFIG_SYS_NAND1_BASE @@ -206,6 +205,8 @@ #define CONFIG_SYS_NAND_SENDCMD_RETRY 3 #undef NAND_ALLOW_ERASE_ALL /* Allow erasing bad blocks - don't use */ +#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */ + /* NAND Timing Parameters (in ns) */ #define NAND_TIMING_tCH 10 #define NAND_TIMING_tCS 0 @@ -227,13 +228,6 @@ #define CONFIG_MTD_DEBUG #define CONFIG_MTD_DEBUG_VERBOSE 1 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 - -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - #define CONFIG_SYS_NO_FLASH 1 #define CONFIG_ENV_IS_IN_NAND 1 diff --git a/include/elf.h b/include/elf.h index f6403881bf..29f276d3f0 100644 --- a/include/elf.h +++ b/include/elf.h @@ -33,15 +33,7 @@ #ifndef _ELF_H #define _ELF_H -#if defined(__BEOS__) || \ - defined(__NetBSD__) || \ - defined(__FreeBSD__) || \ - defined(__sun__) || \ - defined(__APPLE__) -#include <inttypes.h> -#elif (defined(__linux__) && defined(USE_HOSTCC)) || defined(__WIN32__) -#include <stdint.h> -#endif +#include "compiler.h" /* * This version doesn't work for 64-bit ABIs - Erik. diff --git a/include/environment.h b/include/environment.h index 507e8326a3..5bed32fd47 100644 --- a/include/environment.h +++ b/include/environment.h @@ -96,11 +96,7 @@ # endif #endif /* CONFIG_ENV_IS_IN_MG_DISK */ -#ifdef USE_HOSTCC -# include <stdint.h> -#else -# include <linux/types.h> -#endif +#include "compiler.h" #ifdef CONFIG_SYS_REDUNDAND_ENVIRONMENT # define ENV_HEADER_SIZE (sizeof(uint32_t) + 1) diff --git a/include/i2c.h b/include/i2c.h index 668e754e2a..b75476980b 100644 --- a/include/i2c.h +++ b/include/i2c.h @@ -47,7 +47,9 @@ #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */ #if defined(CONFIG_I2C_MULTI_BUS) +#if !defined(CONFIG_SYS_MAX_I2C_BUS) #define CONFIG_SYS_MAX_I2C_BUS 2 +#endif #define I2C_GET_BUS() i2c_get_bus_num() #define I2C_SET_BUS(a) i2c_set_bus_num(a) #else diff --git a/include/image.h b/include/image.h index f183757c85..beb3a16cd1 100644 --- a/include/image.h +++ b/include/image.h @@ -33,10 +33,9 @@ #ifndef __IMAGE_H__ #define __IMAGE_H__ -#if USE_HOSTCC -#ifndef __MINGW32__ -#include <endian.h> -#endif +#include "compiler.h" + +#ifdef USE_HOSTCC /* new uImage format support enabled on host */ #define CONFIG_FIT 1 @@ -46,9 +45,7 @@ #else #include <lmb.h> -#include <linux/string.h> #include <asm/u-boot.h> -#include <asm/byteorder.h> #endif /* USE_HOSTCC */ @@ -284,8 +281,8 @@ typedef struct bootm_headers { #define CHUNKSZ_SHA1 (64 * 1024) #endif -#define uimage_to_cpu(x) ntohl(x) -#define cpu_to_uimage(x) htonl(x) +#define uimage_to_cpu(x) be32_to_cpu(x) +#define cpu_to_uimage(x) cpu_to_be32(x) const char *genimg_get_os_name (uint8_t os); const char *genimg_get_arch_name (uint8_t arch); diff --git a/include/libfdt_env.h b/include/libfdt_env.h index 1c67015a4a..bf63583d53 100644 --- a/include/libfdt_env.h +++ b/include/libfdt_env.h @@ -21,56 +21,13 @@ #ifndef _LIBFDT_ENV_H #define _LIBFDT_ENV_H -#ifdef USE_HOSTCC -#include <stdint.h> -#include <string.h> -#ifdef __MINGW32__ -#include <linux/types.h> -#include <linux/byteorder/swab.h> -#else -#include <endian.h> -#include <byteswap.h> -#endif /* __MINGW32__ */ -#else -#include <linux/string.h> -#include <linux/types.h> -#include <asm/byteorder.h> -#endif /* USE_HOSTCC */ +#include "compiler.h" -#include <stddef.h> extern struct fdt_header *working_fdt; /* Pointer to the working fdt */ -#if __BYTE_ORDER == __LITTLE_ENDIAN -#ifdef __MINGW32__ -#define fdt32_to_cpu(x) ___swab32(x) -#define cpu_to_fdt32(x) ___swab32(x) -#define fdt64_to_cpu(x) ___swab64(x) -#define cpu_to_fdt64(x) ___swab64(x) -#else -#define fdt32_to_cpu(x) bswap_32(x) -#define cpu_to_fdt32(x) bswap_32(x) -#define fdt64_to_cpu(x) bswap_64(x) -#define cpu_to_fdt64(x) bswap_64(x) -#endif -#else -#define fdt32_to_cpu(x) (x) -#define cpu_to_fdt32(x) (x) -#define fdt64_to_cpu(x) (x) -#define cpu_to_fdt64(x) (x) -#endif - -#ifndef USE_HOSTCC -/* - * Types for `void *' pointers. - * - * Note: libfdt uses this definition from /usr/include/stdint.h. - * Define it here rather than pulling in all of stdint.h. - */ -#if __WORDSIZE == 64 -typedef unsigned long int uintptr_t; -#else -typedef unsigned int uintptr_t; -#endif -#endif /* not USE_HOSTCC */ +#define fdt32_to_cpu(x) be32_to_cpu(x) +#define cpu_to_fdt32(x) cpu_to_be32(x) +#define fdt64_to_cpu(x) be64_to_cpu(x) +#define cpu_to_fdt64(x) cpu_to_be64(x) #endif /* _LIBFDT_ENV_H */ diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index a4ad5711d6..3e0044b94f 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -50,7 +50,7 @@ extern void nand_wait_ready(struct mtd_info *mtd); * is supported now. If you add a chip with bigger oobsize/page * adjust this accordingly. */ -#define NAND_MAX_OOBSIZE 128 +#define NAND_MAX_OOBSIZE 218 #define NAND_MAX_PAGESIZE 4096 /* diff --git a/include/linux/mtd/nand_ids.h b/include/linux/mtd/nand_ids.h deleted file mode 100644 index e7aa26df04..0000000000 --- a/include/linux/mtd/nand_ids.h +++ /dev/null @@ -1,60 +0,0 @@ -/* - * u-boot/include/linux/mtd/nand_ids.h - * - * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> - * Steven J. Hill <sjhill@cotw.com> - * - * $Id: nand_ids.h,v 1.1 2000/10/13 16:16:26 mdeans Exp $ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Info: - * Contains standard defines and IDs for NAND flash devices - * - * Changelog: - * 01-31-2000 DMW Created - * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers - * so it can be used by other NAND flash device - * drivers. I also changed the copyright since none - * of the original contents of this file are specific - * to DoC devices. David can whack me with a baseball - * bat later if I did something naughty. - * 10-11-2000 SJH Added private NAND flash structure for driver - * 2000-10-13 BE Moved out of 'nand.h' - avoids duplication. - */ - -#ifndef __LINUX_MTD_NAND_IDS_H -#define __LINUX_MTD_NAND_IDS_H - -#ifndef CONFIG_NAND_LEGACY -#error This module is for the legacy NAND support -#endif - -static struct nand_flash_dev nand_flash_ids[] = { - {"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0}, - {"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0}, - {"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0}, - {"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0}, - {"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0}, - {"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0}, - {"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0}, - {"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0}, - {"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0}, - {"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0}, - {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0}, - {"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0}, - {"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0}, - {"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0}, - {"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0}, - {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0}, - {"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0}, - {"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0}, - {"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1}, - {"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1}, - {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0}, - {NULL,} -}; - -#endif /* __LINUX_MTD_NAND_IDS_H */ diff --git a/include/linux/mtd/nand_legacy.h b/include/linux/mtd/nand_legacy.h deleted file mode 100644 index 4334448146..0000000000 --- a/include/linux/mtd/nand_legacy.h +++ /dev/null @@ -1,196 +0,0 @@ -/* - * linux/include/linux/mtd/nand.h - * - * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> - * Steven J. Hill <sjhill@cotw.com> - * Thomas Gleixner <gleixner@autronix.de> - * - * $Id: nand.h,v 1.7 2003/07/24 23:30:46 a0384864 Exp $ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * Info: - * Contains standard defines and IDs for NAND flash devices - * - * Changelog: - * 01-31-2000 DMW Created - * 09-18-2000 SJH Moved structure out of the Disk-On-Chip drivers - * so it can be used by other NAND flash device - * drivers. I also changed the copyright since none - * of the original contents of this file are specific - * to DoC devices. David can whack me with a baseball - * bat later if I did something naughty. - * 10-11-2000 SJH Added private NAND flash structure for driver - * 10-24-2000 SJH Added prototype for 'nand_scan' function - * 10-29-2001 TG changed nand_chip structure to support - * hardwarespecific function for accessing control lines - * 02-21-2002 TG added support for different read/write adress and - * ready/busy line access function - * 02-26-2002 TG added chip_delay to nand_chip structure to optimize - * command delay times for different chips - * 04-28-2002 TG OOB config defines moved from nand.c to avoid duplicate - * defines in jffs2/wbuf.c - */ -#ifndef __LINUX_MTD_NAND_LEGACY_H -#define __LINUX_MTD_NAND_LEGACY_H - -#ifndef CONFIG_NAND_LEGACY -#error This module is for the legacy NAND support -#endif - -/* The maximum number of NAND chips in an array */ -#ifndef CONFIG_SYS_NAND_MAX_CHIPS -#define CONFIG_SYS_NAND_MAX_CHIPS 1 -#endif - -/* - * Standard NAND flash commands - */ -#define NAND_CMD_READ0 0 -#define NAND_CMD_READ1 1 -#define NAND_CMD_PAGEPROG 0x10 -#define NAND_CMD_READOOB 0x50 -#define NAND_CMD_ERASE1 0x60 -#define NAND_CMD_STATUS 0x70 -#define NAND_CMD_SEQIN 0x80 -#define NAND_CMD_READID 0x90 -#define NAND_CMD_ERASE2 0xd0 -#define NAND_CMD_RESET 0xff - -/* - * NAND Private Flash Chip Data - * - * Structure overview: - * - * IO_ADDR - address to access the 8 I/O lines of the flash device - * - * hwcontrol - hardwarespecific function for accesing control-lines - * - * dev_ready - hardwarespecific function for accesing device ready/busy line - * - * chip_lock - spinlock used to protect access to this structure - * - * wq - wait queue to sleep on if a NAND operation is in progress - * - * state - give the current state of the NAND device - * - * page_shift - number of address bits in a page (column address bits) - * - * data_buf - data buffer passed to/from MTD user modules - * - * data_cache - data cache for redundant page access and shadow for - * ECC failure - * - * ecc_code_buf - used only for holding calculated or read ECCs for - * a page read or written when ECC is in use - * - * reserved - padding to make structure fall on word boundary if - * when ECC is in use - */ -struct Nand { - char floor, chip; - unsigned long curadr; - unsigned char curmode; - /* Also some erase/write/pipeline info when we get that far */ -}; - -struct nand_chip { - int page_shift; - u_char *data_buf; - u_char *data_cache; - int cache_page; - u_char ecc_code_buf[6]; - u_char reserved[2]; - char ChipID; /* Type of DiskOnChip */ - struct Nand *chips; - int chipshift; - char* chips_name; - unsigned long erasesize; - unsigned long mfr; /* Flash IDs - only one type of flash per device */ - unsigned long id; - char* name; - int numchips; - char page256; - char pageadrlen; - unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */ - unsigned long totlen; - uint oobblock; /* Size of OOB blocks (e.g. 512) */ - uint oobsize; /* Amount of OOB data per block (e.g. 16) */ - uint eccsize; - int bus16; -}; - -/* - * NAND Flash Manufacturer ID Codes - */ -#define NAND_MFR_TOSHIBA 0x98 -#define NAND_MFR_SAMSUNG 0xec - -/* - * NAND Flash Device ID Structure - * - * Structure overview: - * - * name - Complete name of device - * - * manufacture_id - manufacturer ID code of device. - * - * model_id - model ID code of device. - * - * chipshift - total number of address bits for the device which - * is used to calculate address offsets and the total - * number of bytes the device is capable of. - * - * page256 - denotes if flash device has 256 byte pages or not. - * - * pageadrlen - number of bytes minus one needed to hold the - * complete address into the flash array. Keep in - * mind that when a read or write is done to a - * specific address, the address is input serially - * 8 bits at a time. This structure member is used - * by the read/write routines as a loop index for - * shifting the address out 8 bits at a time. - * - * erasesize - size of an erase block in the flash device. - */ -struct nand_flash_dev { - char * name; - int manufacture_id; - int model_id; - int chipshift; - char page256; - char pageadrlen; - unsigned long erasesize; - int bus16; -}; - -/* -* Constants for oob configuration -*/ -#define NAND_NOOB_ECCPOS0 0 -#define NAND_NOOB_ECCPOS1 1 -#define NAND_NOOB_ECCPOS2 2 -#define NAND_NOOB_ECCPOS3 3 -#define NAND_NOOB_ECCPOS4 6 -#define NAND_NOOB_ECCPOS5 7 -#define NAND_NOOB_BADBPOS -1 -#define NAND_NOOB_ECCVPOS -1 - -#define NAND_JFFS2_OOB_ECCPOS0 0 -#define NAND_JFFS2_OOB_ECCPOS1 1 -#define NAND_JFFS2_OOB_ECCPOS2 2 -#define NAND_JFFS2_OOB_ECCPOS3 3 -#define NAND_JFFS2_OOB_ECCPOS4 6 -#define NAND_JFFS2_OOB_ECCPOS5 7 -#define NAND_JFFS2_OOB_BADBPOS 5 -#define NAND_JFFS2_OOB_ECCVPOS 4 - -#define NAND_JFFS2_OOB8_FSDAPOS 6 -#define NAND_JFFS2_OOB16_FSDAPOS 8 -#define NAND_JFFS2_OOB8_FSDALEN 2 -#define NAND_JFFS2_OOB16_FSDALEN 8 - -unsigned long nand_probe(unsigned long physadr); -#endif /* __LINUX_MTD_NAND_LEGACY_H */ diff --git a/include/lzma/LzmaDecode.h b/include/lzma/LzmaDec.h index 8fdb2c0862..967cdd1018 100644 --- a/include/lzma/LzmaDecode.h +++ b/include/lzma/LzmaDec.h @@ -1,7 +1,7 @@ /* - * Fake include for LzmaDecode.h + * Fake include for LzmaDec.h * - * Copyright (C) 2007-2008 Industrie Dial Face S.p.A. + * Copyright (C) 2007-2009 Industrie Dial Face S.p.A. * Luigi 'Comio' Mantellini (luigi.mantellini@idf-hit.com) * * See file CREDITS for list of people who contributed to this @@ -23,9 +23,9 @@ * MA 02111-1307 USA */ -#ifndef __LZMADECODE_H__FAKE__ -#define __LZMADECODE_H__FAKE__ +#ifndef __LZMADEC_H__FAKE__ +#define __LZMADEC_H__FAKE__ -#include "../../lib_generic/lzma/LzmaDecode.h" +#include "../../lib_generic/lzma/LzmaDec.h" #endif diff --git a/include/lzma/LzmaTools.h b/include/lzma/LzmaTools.h index 7c5eea113c..87943c0332 100644 --- a/include/lzma/LzmaTools.h +++ b/include/lzma/LzmaTools.h @@ -1,7 +1,7 @@ /* * Fake include for LzmaTools.h * - * Copyright (C) 2007-2008 Industrie Dial Face S.p.A. + * Copyright (C) 2007-2009 Industrie Dial Face S.p.A. * Luigi 'Comio' Mantellini (luigi.mantellini@idf-hit.com) * * See file CREDITS for list of people who contributed to this diff --git a/include/lzma/LzmaTypes.h b/include/lzma/LzmaTypes.h index 02daa59174..86160a42b2 100644 --- a/include/lzma/LzmaTypes.h +++ b/include/lzma/LzmaTypes.h @@ -1,7 +1,7 @@ /* - * Fake include for LzmaTypes.h + * Fake include for Types.h * - * Copyright (C) 2007-2008 Industrie Dial Face S.p.A. + * Copyright (C) 2007-2009 Industrie Dial Face S.p.A. * Luigi 'Comio' Mantellini (luigi.mantellini@idf-hit.com) * * See file CREDITS for list of people who contributed to this @@ -23,9 +23,14 @@ * MA 02111-1307 USA */ -#ifndef __LZMATYPES_H__FAKE__ -#define __LZMATYPES_H__FAKE__ +#ifndef __TYPES_H__FAKE__ +#define __TYPES_H__FAKE__ -#include "../../lib_generic/lzma/LzmaTypes.h" +/* + *This avoids the collition with zlib.h Byte definition + */ +#define Byte LZByte + +#include "../../lib_generic/lzma/Types.h" #endif diff --git a/include/malloc.h b/include/malloc.h index 47154b0783..a38464e629 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -216,7 +216,8 @@ */ - +#ifndef __MALLOC_H__ +#define __MALLOC_H__ /* Preliminaries */ @@ -940,3 +941,5 @@ struct mallinfo mALLINFo(); #ifdef __cplusplus }; /* end of extern "C" */ #endif + +#endif /* __MALLOC_H__ */ diff --git a/include/nand.h b/include/nand.h index 23f3ca1db8..2a81597a65 100644 --- a/include/nand.h +++ b/include/nand.h @@ -26,7 +26,6 @@ extern void nand_init(void); -#ifndef CONFIG_NAND_LEGACY #include <linux/mtd/compat.h> #include <linux/mtd/mtd.h> #include <linux/mtd/nand.h> @@ -130,5 +129,4 @@ void board_nand_select_device(struct nand_chip *nand, int chip); __attribute__((noreturn)) void nand_boot(void); -#endif /* !CONFIG_NAND_LEGACY */ #endif diff --git a/include/netdev.h b/include/netdev.h index aed5c4cce3..17fdafba83 100644 --- a/include/netdev.h +++ b/include/netdev.h @@ -73,6 +73,7 @@ int scc_initialize(bd_t *bis); int skge_initialize(bd_t *bis); int tsi108_eth_initialize(bd_t *bis); int uec_initialize(int index); +int uec_standard_init(bd_t *bis); int uli526x_initialize(bd_t *bis); int sh_eth_initialize(bd_t *bis); int dm9000_initialize(bd_t *bis); diff --git a/include/stdio_dev.h b/include/stdio_dev.h index 8b06ccf005..83da4cdff1 100644 --- a/include/stdio_dev.h +++ b/include/stdio_dev.h @@ -91,6 +91,7 @@ extern char *stdio_names[MAX_FILES]; */ int stdio_register (struct stdio_dev * dev); int stdio_init (void); +void stdio_print_current_devices(void); #ifdef CONFIG_SYS_STDIO_DEREGISTER int stdio_deregister(char *devname); #endif diff --git a/include/tsi148.h b/include/tsi148.h new file mode 100644 index 0000000000..8e8e12ba86 --- /dev/null +++ b/include/tsi148.h @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com + * + * base on universe.h by + * + * (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef _tsi148_h +#define _tsi148_h + +#ifndef PCI_DEVICE_ID_TUNDRA_TSI148 +#define PCI_DEVICE_ID_TUNDRA_TSI148 0x0148 +#endif + +typedef struct _TSI148 TSI148; +typedef struct _OUTBOUND OUTBOUND; +typedef struct _INBOUND INBOUND; +typedef struct _TDMA_CMD_PACKET TDMA_CMD_PACKET; + +struct _OUTBOUND { + unsigned int otsau; /* 0x000 Outbound start upper */ + unsigned int otsal; /* 0x004 Outbouud start lower */ + unsigned int oteau; /* 0x008 Outbound end upper */ + unsigned int oteal; /* 0x00c Outbound end lower */ + unsigned int otofu; /* 0x010 Outbound translation upper */ + unsigned int otofl; /* 0x014 Outbound translation lower */ + unsigned int otbs; /* 0x018 Outbound translation 2eSST */ + unsigned int otat; /* 0x01c Outbound translation attr */ +}; + +struct _INBOUND { + unsigned int itsau; /* 0x000 inbound start upper */ + unsigned int itsal; /* 0x004 inbouud start lower */ + unsigned int iteau; /* 0x008 inbound end upper */ + unsigned int iteal; /* 0x00c inbound end lower */ + unsigned int itofu; /* 0x010 inbound translation upper */ + unsigned int itofl; /* 0x014 inbound translation lower */ + unsigned int itat; /* 0x018 inbound translation attr */ + unsigned int spare; /* 0x01c not used */ +}; + +struct _TSI148 { + unsigned int pci_id; /* 0x000 */ + unsigned int pci_csr; /* 0x004 */ + unsigned int pci_class; /* 0x008 */ + unsigned int pci_misc0; /* 0x00c */ + unsigned int pci_mbarl; /* 0x010 */ + unsigned int pci_mbarh; /* 0x014 */ + unsigned int spare0[(0x03c-0x018)/4]; /* 0x018 */ + unsigned int pci_misc1; /* 0x03c */ + unsigned int pci_pcixcap; /* 0x040 */ + unsigned int pci_pcixstat; /* 0x044 */ + unsigned int spare1[(0x100-0x048)/4]; /* 0x048 */ + OUTBOUND outbound[8]; /* 0x100 */ + unsigned int viack[8]; /* 0x204 */ + unsigned int rmwau; /* 0x220 */ + unsigned int rmwal; /* 0x224 */ + unsigned int rmwen; /* 0x228 */ + unsigned int rmwc; /* 0x22c */ + unsigned int rmws; /* 0x230 */ + unsigned int vmctrl; /* 0x234 */ + unsigned int vctrl; /* 0x238 */ + unsigned int vstat; /* 0x23c */ + unsigned int pcsr; /* 0x240 */ + unsigned int spare2[3]; /* 0x244 - 0x24c */ + unsigned int vmefl; /* 0x250 */ + unsigned int spare3[3]; /* 0x254 - 0x25c */ + unsigned int veau; /* 0x260 */ + unsigned int veal; /* 0x264 */ + unsigned int veat; /* 0x268 */ + unsigned int spare4[1]; /* 0x26c */ + unsigned int edpau; /* 0x270 */ + unsigned int edpal; /* 0x274 */ + unsigned int edpxa; /* 0x278 */ + unsigned int edpxs; /* 0x27c */ + unsigned int edpat; /* 0x280 */ + unsigned int spare5[31]; /* 0x284 - 0x2fc */ + INBOUND inbound[8]; /* 0x100 */ + unsigned int gbau; /* 0x400 */ + unsigned int gbal; /* 0x404 */ + unsigned int gcsrat; /* 0x408 */ + unsigned int cbau; /* 0x40c */ + unsigned int cbal; /* 0x410 */ + unsigned int crgat; /* 0x414 */ + unsigned int crou; /* 0x418 */ + unsigned int crol; /* 0x41c */ + unsigned int crat; /* 0x420 */ + unsigned int lmbau; /* 0x424 */ + unsigned int lmbal; /* 0x428 */ + unsigned int lmat; /* 0x42c */ + unsigned int r64bcu; /* 0x430 */ + unsigned int r64bcl; /* 0x434 */ + unsigned int bpgtr; /* 0x438 */ + unsigned int bpctr; /* 0x43c */ + unsigned int vicr; /* 0x440 */ + unsigned int spare6[1]; /* 0x444 */ + unsigned int inten; /* 0x448 */ + unsigned int inteo; /* 0x44c */ + unsigned int ints; /* 0x450 */ + unsigned int intc; /* 0x454 */ + unsigned int intm1; /* 0x458 */ + unsigned int intm2; /* 0x45c */ + unsigned int spare7[40]; /* 0x460 - 0x4fc */ + unsigned int dctl0; /* 0x500 */ + unsigned int dsta0; /* 0x504 */ + unsigned int dcsau0; /* 0x508 */ + unsigned int dcsal0; /* 0x50c */ + unsigned int dcdau0; /* 0x510 */ + unsigned int dcdal0; /* 0x514 */ + unsigned int dclau0; /* 0x518 */ + unsigned int dclal0; /* 0x51c */ + unsigned int dsau0; /* 0x520 */ + unsigned int dsal0; /* 0x524 */ + unsigned int ddau0; /* 0x528 */ + unsigned int ddal0; /* 0x52c */ + unsigned int dsat0; /* 0x530 */ + unsigned int ddat0; /* 0x534 */ + unsigned int dnlau0; /* 0x538 */ + unsigned int dnlal0; /* 0x53c */ + unsigned int dcnt0; /* 0x540 */ + unsigned int ddbs0; /* 0x544 */ + unsigned int r20[14]; /* 0x548 - 0x57c */ + unsigned int dctl1; /* 0x580 */ + unsigned int dsta1; /* 0x584 */ + unsigned int dcsau1; /* 0x588 */ + unsigned int dcsal1; /* 0x58c */ + unsigned int dcdau1; /* 0x590 */ + unsigned int dcdal1; /* 0x594 */ + unsigned int dclau1; /* 0x598 */ + unsigned int dclal1; /* 0x59c */ + unsigned int dsau1; /* 0x5a0 */ + unsigned int dsal1; /* 0x5a4 */ + unsigned int ddau1; /* 0x5a8 */ + unsigned int ddal1; /* 0x5ac */ + unsigned int dsat1; /* 0x5b0 */ + unsigned int ddat1; /* 0x5b4 */ + unsigned int dnlau1; /* 0x5b8 */ + unsigned int dnlal1; /* 0x5bc */ + unsigned int dcnt1; /* 0x5c0 */ + unsigned int ddbs1; /* 0x5c4 */ + unsigned int r21[14]; /* 0x5c8 - 0x5fc */ + unsigned int devi_veni_2; /* 0x600 */ + unsigned int gctrl_ga_revid; /* 0x604 */ + unsigned int semaphore0_1_2_3; /* 0x608 */ + unsigned int semaphore4_5_6_7; /* 0x60c */ + unsigned int mbox0; /* 0x610 */ + unsigned int mbox1; /* 0x614 */ + unsigned int mbox2; /* 0x618 */ + unsigned int mbox3; /* 0x61c */ + unsigned int r22[629]; /* 0x620 - 0xff0 */ + unsigned int csrbcr; /* 0xff4 */ + unsigned int csrbsr; /* 0xff8 */ + unsigned int cbar; /* 0xffc */ +}; + +#define IRQ_VOWN 0x0001 +#define IRQ_VIRQ1 0x0002 +#define IRQ_VIRQ2 0x0004 +#define IRQ_VIRQ3 0x0008 +#define IRQ_VIRQ4 0x0010 +#define IRQ_VIRQ5 0x0020 +#define IRQ_VIRQ6 0x0040 +#define IRQ_VIRQ7 0x0080 +#define IRQ_DMA 0x0100 +#define IRQ_LERR 0x0200 +#define IRQ_VERR 0x0400 +#define IRQ_res 0x0800 +#define IRQ_IACK 0x1000 +#define IRQ_SWINT 0x2000 +#define IRQ_SYSFAIL 0x4000 +#define IRQ_ACFAIL 0x8000 + +struct _TDMA_CMD_PACKET { + unsigned int dctl; /* DMA Control */ + unsigned int dtbc; /* Transfer Byte Count */ + unsigned int dlv; /* PCI Address */ + unsigned int res1; /* Reserved */ + unsigned int dva; /* Vme Address */ + unsigned int res2; /* Reserved */ + unsigned int dcpp; /* Pointer to Numed Cmd Packet with rPN */ + unsigned int res3; /* Reserved */ +}; + +#define VME_AM_A16 0x01 +#define VME_AM_A24 0x02 +#define VME_AM_A32 0x03 +#define VME_AM_Axx 0x03 +#define VME_AM_USR 0x04 +#define VME_AM_SUP 0x08 +#define VME_AM_DATA 0x10 +#define VME_AM_PROG 0x20 +#define VME_AM_Mxx (VME_AM_DATA | VME_AM_PROG) + +#define VME_FLAG_D8 0x01 +#define VME_FLAG_D16 0x02 +#define VME_FLAG_D32 0x03 +#define VME_FLAG_Dxx 0x03 + +#endif diff --git a/include/u-boot/md5.h b/include/u-boot/md5.h index 8b44a7f844..08924cce3c 100644 --- a/include/u-boot/md5.h +++ b/include/u-boot/md5.h @@ -6,7 +6,7 @@ #ifndef _MD5_H #define _MD5_H -#include <linux/types.h> +#include "compiler.h" struct MD5Context { __u32 buf[4]; |