diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/binman_sym.h | 93 | ||||
| -rw-r--r-- | include/configs/am335x_evm.h | 2 | ||||
| -rw-r--r-- | include/configs/draak.h | 47 | ||||
| -rw-r--r-- | include/configs/eagle.h | 29 | ||||
| -rw-r--r-- | include/configs/omap3_logic.h | 2 | ||||
| -rw-r--r-- | include/configs/rcar-gen3-common.h | 4 | ||||
| -rw-r--r-- | include/configs/socfpga_common.h | 2 | ||||
| -rw-r--r-- | include/configs/xilinx_zynqmp.h | 16 | ||||
| -rw-r--r-- | include/configs/zynq-common.h | 7 | ||||
| -rw-r--r-- | include/dt-bindings/clock/r8a77970-cpg-mssr.h | 48 | ||||
| -rw-r--r-- | include/dt-bindings/clock/r8a77995-cpg-mssr.h | 57 | ||||
| -rw-r--r-- | include/dt-bindings/power/r8a77970-sysc.h | 32 | ||||
| -rw-r--r-- | include/dt-bindings/power/r8a77995-sysc.h | 23 | ||||
| -rw-r--r-- | include/efi_loader.h | 10 | ||||
| -rw-r--r-- | include/fpga.h | 1 | ||||
| -rw-r--r-- | include/image.h | 3 | ||||
| -rw-r--r-- | include/power/sandbox_pmic.h | 5 | ||||
| -rw-r--r-- | include/power/tps65910_pmic.h | 130 | ||||
| -rw-r--r-- | include/samsung/exynos5-dt-types.h | 2 | ||||
| -rw-r--r-- | include/spl.h | 11 |
20 files changed, 507 insertions, 17 deletions
diff --git a/include/binman_sym.h b/include/binman_sym.h new file mode 100644 index 0000000000..87d03d5294 --- /dev/null +++ b/include/binman_sym.h @@ -0,0 +1,93 @@ +/* + * Symbol access for symbols set up by binman as part of the build. + * + * This allows C code to access the position of a particular part of the image + * assembled by binman. + * + * Copyright (c) 2017 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __BINMAN_SYM_H +#define __BINMAN_SYM_H + +#define BINMAN_SYM_MISSING (-1UL) + +#ifdef CONFIG_BINMAN + +/** + * binman_symname() - Internal fnuction to get a binman symbol name + * + * @entry_name: Name of the entry to look for (e.g. 'u_boot_spl') + * @_prop_name: Property value to get from that entry (e.g. 'pos') + * @returns name of the symbol for that entry and property + */ +#define binman_symname(_entry_name, _prop_name) \ + _binman_ ## _entry_name ## _prop_ ## _prop_name + +/** + * binman_sym_declare() - Declare a symbol that will be used at run-time + * + * @_type: Type f the symbol (e.g. unsigned long) + * @entry_name: Name of the entry to look for (e.g. 'u_boot_spl') + * @_prop_name: Property value to get from that entry (e.g. 'pos') + */ +#define binman_sym_declare(_type, _entry_name, _prop_name) \ + _type binman_symname(_entry_name, _prop_name) \ + __attribute__((aligned(4), unused, section(".binman_sym"))) + +/** + * binman_sym_extern() - Declare a extern symbol that will be used at run-time + * + * @_type: Type f the symbol (e.g. unsigned long) + * @entry_name: Name of the entry to look for (e.g. 'u_boot_spl') + * @_prop_name: Property value to get from that entry (e.g. 'pos') + */ +#define binman_sym_extern(_type, _entry_name, _prop_name) \ + extern _type binman_symname(_entry_name, _prop_name) \ + __attribute__((aligned(4), unused, section(".binman_sym"))) + +/** + * binman_sym_declare_optional() - Declare an optional symbol + * + * If this symbol cannot be provided by binman, an error will not be generated. + * Instead the image will be assigned the value BINMAN_SYM_MISSING. + * + * @_type: Type f the symbol (e.g. unsigned long) + * @entry_name: Name of the entry to look for (e.g. 'u_boot_spl') + * @_prop_name: Property value to get from that entry (e.g. 'pos') + */ +#define binman_sym_declare_optional(_type, _entry_name, _prop_name) \ + _type binman_symname(_entry_name, _prop_name) \ + __attribute__((aligned(4), weak, unused, \ + section(".binman_sym"))) + +/** + * binman_sym() - Access a previously declared symbol + * + * This is used to get the value of a symbol. E.g.: + * + * ulong address = binman_sym(ulong, u_boot_spl, pos); + * + * @_type: Type f the symbol (e.g. unsigned long) + * @entry_name: Name of the entry to look for (e.g. 'u_boot_spl') + * @_prop_name: Property value to get from that entry (e.g. 'pos') + * @returns value of that property (filled in by binman) + */ +#define binman_sym(_type, _entry_name, _prop_name) \ + (*(_type *)&binman_symname(_entry_name, _prop_name)) + +#else /* !BINMAN */ + +#define binman_sym_declare(_type, _entry_name, _prop_name) + +#define binman_sym_declare_optional(_type, _entry_name, _prop_name) + +#define binman_sym_extern(_type, _entry_name, _prop_name) + +#define binman_sym(_type, _entry_name, _prop_name) BINMAN_SYM_MISSING + +#endif /* BINMAN */ + +#endif diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 5ad0366730..856c546fc1 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -255,7 +255,7 @@ /* USB Device Firmware Update support */ #ifndef CONFIG_SPL_BUILD #define DFUARGS \ - "dfu_alt_info_emmc=rawemmc raw 0 3751936\0" \ + DFU_ALT_INFO_EMMC \ DFU_ALT_INFO_MMC \ DFU_ALT_INFO_RAM \ DFU_ALT_INFO_NAND diff --git a/include/configs/draak.h b/include/configs/draak.h new file mode 100644 index 0000000000..392ba4a6ba --- /dev/null +++ b/include/configs/draak.h @@ -0,0 +1,47 @@ +/* + * include/configs/draak.h + * This file is Draak board configuration. + * + * Copyright (C) 2015 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __DRAAK_H +#define __DRAAK_H + +#undef DEBUG + +#include "rcar-gen3-common.h" + +/* Ethernet RAVB */ +#define CONFIG_NET_MULTI +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* Board Clock */ +/* XTAL_CLK : 33.33MHz */ +#define CONFIG_SYS_CLK_FREQ 33333333u + +/* Generic Timer Definitions (use in assembler source) */ +#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ + +/* Environment in eMMC, at the end of 2nd "boot sector" */ +#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE) +#define CONFIG_SYS_MMC_ENV_DEV 1 +#define CONFIG_SYS_MMC_ENV_PART 2 + +#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_FLASH_CFI_MTD +#define CONFIG_FLASH_SHOW_PROGRESS 45 +#define CONFIG_MTD_DEVICE +#define CONFIG_SYS_FLASH_BANKS_LIST { 0x08000000 } +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 +#define CONFIG_SYS_WRITE_SWAPPED_DATA +#define CONFIG_CMD_CACHE + +#endif /* __DRAAK_H */ diff --git a/include/configs/eagle.h b/include/configs/eagle.h new file mode 100644 index 0000000000..2ef0c7a777 --- /dev/null +++ b/include/configs/eagle.h @@ -0,0 +1,29 @@ +/* + * include/configs/eagle.h + * This file is Eagle board configuration. + * + * Copyright (C) 2015 Renesas Electronics Corporation + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __EAGLE_H +#define __EAGLE_H + +#undef DEBUG + +#include "rcar-gen3-common.h" + +/* Ethernet RAVB */ +#define CONFIG_NET_MULTI +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +/* Board Clock */ +/* XTAL_CLK : 33.33MHz */ +#define CONFIG_SYS_CLK_FREQ 33333333u + +/* Generic Timer Definitions (use in assembler source) */ +#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */ + +#endif /* __EAGLE_H */ diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index 3ecfb58918..b095814cda 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -93,7 +93,6 @@ #define CONFIG_PREBOOT \ "setenv preboot;" \ - "nand unlock;" \ "saveenv;" #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -192,7 +191,6 @@ "tftpboot $loadaddr zImage;" \ "bootz $loadaddr\0" \ "nandbootcommon=echo 'Booting kernel from NAND...';" \ - "nand unlock;" \ "run nandargs;" \ "run common_bootargs;" \ "run dump_bootargs;" \ diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h index 2815e241de..30a98b8ada 100644 --- a/include/configs/rcar-gen3-common.h +++ b/include/configs/rcar-gen3-common.h @@ -44,7 +44,11 @@ #define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400 } /* MEMORY */ +#if defined(CONFIG_R8A77970) +#define CONFIG_SYS_TEXT_BASE 0x58280000 +#else #define CONFIG_SYS_TEXT_BASE 0x50000000 +#endif #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE #define DRAM_RSV_SIZE 0x08000000 diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 8a7debbceb..66e7c4fc8b 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -142,7 +142,6 @@ #ifdef CONFIG_NAND_DENALI #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_ONFI_DETECTION -#define CONFIG_NAND_DENALI_ECC_SIZE 512 #define CONFIG_SYS_NAND_REGS_BASE SOCFPGA_NANDREGS_ADDRESS #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS #endif @@ -294,7 +293,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); /* SPL NAND boot support */ #ifdef CONFIG_SPL_NAND_SUPPORT -#define CONFIG_SYS_NAND_USE_FLASH_BBT #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x40000 #endif diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 57fee6a4c8..9997fd0959 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -126,6 +126,7 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING +#define CONFIG_PANIC_HANG #define CONFIG_SYS_MAXARGS 64 /* Ethernet driver */ @@ -233,6 +234,15 @@ #define CONFIG_SPL_FRAMEWORK +#if defined(CONFIG_SPL_SPI_FLASH_SUPPORT) +# define CONFIG_SPL_SPI_LOAD +# define CONFIG_SYS_SPI_KERNEL_OFFS 0x80000 +# define CONFIG_SYS_SPI_ARGS_OFFS 0xa0000 +# define CONFIG_SYS_SPI_ARGS_SIZE 0xa0000 + +# define CONFIG_SYS_SPI_U_BOOT_OFFS 0x170000 +#endif + /* u-boot is like dtb */ #define CONFIG_SPL_FS_LOAD_ARGS_NAME "u-boot.bin" #define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000 @@ -257,14 +267,14 @@ # define CONFIG_SPL_ENV_SUPPORT # define CONFIG_SPL_HASH_SUPPORT # define CONFIG_ENV_MAX_ENTRIES 10 +#endif -# define CONFIG_SYS_SPL_MALLOC_START 0x20000000 -# define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 +#define CONFIG_SYS_SPL_MALLOC_START 0x20000000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE # error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used" #endif -#endif #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 7247c90307..b10cb3f572 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -344,12 +344,9 @@ /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ #define CONFIG_SPL_MAX_SIZE 0x30000 -/* The highest 64k OCM address */ -#define OCM_HIGH_ADDR 0xffff0000 - /* On the top of OCM space */ -#define CONFIG_SYS_SPL_MALLOC_START OCM_HIGH_ADDR -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000 +#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SPL_STACK_R_ADDR +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x2000000 /* * SPL stack position - and stack goes down diff --git a/include/dt-bindings/clock/r8a77970-cpg-mssr.h b/include/dt-bindings/clock/r8a77970-cpg-mssr.h new file mode 100644 index 0000000000..4146395595 --- /dev/null +++ b/include/dt-bindings/clock/r8a77970-cpg-mssr.h @@ -0,0 +1,48 @@ +/* + * Copyright (C) 2016 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a77970 CPG Core Clocks */ +#define R8A77970_CLK_Z2 0 +#define R8A77970_CLK_ZR 1 +#define R8A77970_CLK_ZTR 2 +#define R8A77970_CLK_ZTRD2 3 +#define R8A77970_CLK_ZT 4 +#define R8A77970_CLK_ZX 5 +#define R8A77970_CLK_S1D1 6 +#define R8A77970_CLK_S1D2 7 +#define R8A77970_CLK_S1D4 8 +#define R8A77970_CLK_S2D1 9 +#define R8A77970_CLK_S2D2 10 +#define R8A77970_CLK_S2D4 11 +#define R8A77970_CLK_LB 12 +#define R8A77970_CLK_CL 13 +#define R8A77970_CLK_ZB3 14 +#define R8A77970_CLK_ZB3D2 15 +#define R8A77970_CLK_DDR 16 +#define R8A77970_CLK_CR 17 +#define R8A77970_CLK_CRD2 18 +#define R8A77970_CLK_SD0H 19 +#define R8A77970_CLK_SD0 20 +#define R8A77970_CLK_RPC 21 +#define R8A77970_CLK_RPCD2 22 +#define R8A77970_CLK_MSO 23 +#define R8A77970_CLK_CANFD 24 +#define R8A77970_CLK_CSI0 25 +#define R8A77970_CLK_FRAY 26 +#define R8A77970_CLK_CP 27 +#define R8A77970_CLK_CPEX 28 +#define R8A77970_CLK_R 29 +#define R8A77970_CLK_OSC 30 + +#endif /* __DT_BINDINGS_CLOCK_R8A77970_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/clock/r8a77995-cpg-mssr.h b/include/dt-bindings/clock/r8a77995-cpg-mssr.h new file mode 100644 index 0000000000..4e8ae3dee5 --- /dev/null +++ b/include/dt-bindings/clock/r8a77995-cpg-mssr.h @@ -0,0 +1,57 @@ +/* + * Copyright (C) 2017 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ +#ifndef __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ +#define __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ + +#include <dt-bindings/clock/renesas-cpg-mssr.h> + +/* r8a77995 CPG Core Clocks */ +#define R8A77995_CLK_Z2 0 +#define R8A77995_CLK_ZG 1 +#define R8A77995_CLK_ZTR 2 +#define R8A77995_CLK_ZT 3 +#define R8A77995_CLK_ZX 4 +#define R8A77995_CLK_S0D1 5 +#define R8A77995_CLK_S1D1 6 +#define R8A77995_CLK_S1D2 7 +#define R8A77995_CLK_S1D4 8 +#define R8A77995_CLK_S2D1 9 +#define R8A77995_CLK_S2D2 10 +#define R8A77995_CLK_S2D4 11 +#define R8A77995_CLK_S3D1 12 +#define R8A77995_CLK_S3D2 13 +#define R8A77995_CLK_S3D4 14 +#define R8A77995_CLK_S1D4C 15 +#define R8A77995_CLK_S3D1C 16 +#define R8A77995_CLK_S3D2C 17 +#define R8A77995_CLK_S3D4C 18 +#define R8A77995_CLK_LB 19 +#define R8A77995_CLK_CL 20 +#define R8A77995_CLK_ZB3 21 +#define R8A77995_CLK_ZB3D2 22 +#define R8A77995_CLK_CR 23 +#define R8A77995_CLK_CRD2 24 +#define R8A77995_CLK_SD0H 25 +#define R8A77995_CLK_SD0 26 +#define R8A77995_CLK_SSP2 27 +#define R8A77995_CLK_SSP1 28 +#define R8A77995_CLK_RPC 29 +#define R8A77995_CLK_RPCD2 30 +#define R8A77995_CLK_ZA2 31 +#define R8A77995_CLK_ZA8 32 +#define R8A77995_CLK_Z2D 33 +#define R8A77995_CLK_CANFD 34 +#define R8A77995_CLK_MSO 35 +#define R8A77995_CLK_R 36 +#define R8A77995_CLK_OSC 37 +#define R8A77995_CLK_LV0 38 +#define R8A77995_CLK_LV1 39 +#define R8A77995_CLK_CP 40 + +#endif /* __DT_BINDINGS_CLOCK_R8A77995_CPG_MSSR_H__ */ diff --git a/include/dt-bindings/power/r8a77970-sysc.h b/include/dt-bindings/power/r8a77970-sysc.h new file mode 100644 index 0000000000..bf54779d16 --- /dev/null +++ b/include/dt-bindings/power/r8a77970-sysc.h @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2017 Cogent Embedded Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __DT_BINDINGS_POWER_R8A77970_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A77970_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A77970_PD_CA53_CPU0 5 +#define R8A77970_PD_CA53_CPU1 6 +#define R8A77970_PD_CR7 13 +#define R8A77970_PD_CA53_SCU 21 +#define R8A77970_PD_A2IR0 23 +#define R8A77970_PD_A3IR 24 +#define R8A77970_PD_A2IR1 27 +#define R8A77970_PD_A2IR2 28 +#define R8A77970_PD_A2IR3 29 +#define R8A77970_PD_A2SC0 30 +#define R8A77970_PD_A2SC1 31 + +/* Always-on power area */ +#define R8A77970_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A77970_SYSC_H__ */ diff --git a/include/dt-bindings/power/r8a77995-sysc.h b/include/dt-bindings/power/r8a77995-sysc.h new file mode 100644 index 0000000000..09d0ed575b --- /dev/null +++ b/include/dt-bindings/power/r8a77995-sysc.h @@ -0,0 +1,23 @@ +/* + * Copyright (C) 2017 Glider bvba + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + */ +#ifndef __DT_BINDINGS_POWER_R8A77995_SYSC_H__ +#define __DT_BINDINGS_POWER_R8A77995_SYSC_H__ + +/* + * These power domain indices match the numbers of the interrupt bits + * representing the power areas in the various Interrupt Registers + * (e.g. SYSCISR, Interrupt Status Register) + */ + +#define R8A77995_PD_CA53_CPU0 5 +#define R8A77995_PD_CA53_SCU 21 + +/* Always-on power area */ +#define R8A77995_PD_ALWAYS_ON 32 + +#endif /* __DT_BINDINGS_POWER_R8A77995_SYSC_H__ */ diff --git a/include/efi_loader.h b/include/efi_loader.h index c0caabddb1..6185055e78 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -190,6 +190,8 @@ void efi_set_bootdev(const char *dev, const char *devnr, const char *path); void efi_add_handle(struct efi_object *obj); /* Create handle */ efi_status_t efi_create_handle(void **handle); +/* Delete handle */ +void efi_delete_handle(struct efi_object *obj); /* Call this to validate a handle and find the EFI object for it */ struct efi_object *efi_search_obj(const void *handle); /* Find a protocol on a handle */ @@ -249,9 +251,11 @@ uint64_t efi_add_memory_map(uint64_t start, uint64_t pages, int memory_type, int efi_memory_init(void); /* Adds new or overrides configuration table entry to the system table */ efi_status_t efi_install_configuration_table(const efi_guid_t *guid, void *table); -void efi_setup_loaded_image(struct efi_loaded_image *info, struct efi_object *obj, - struct efi_device_path *device_path, - struct efi_device_path *file_path); +/* Sets up a loaded image */ +efi_status_t efi_setup_loaded_image( + struct efi_loaded_image *info, struct efi_object *obj, + struct efi_device_path *device_path, + struct efi_device_path *file_path); efi_status_t efi_load_image_from_path(struct efi_device_path *file_path, void **buffer); diff --git a/include/fpga.h b/include/fpga.h index d768fb1417..4d6da790b7 100644 --- a/include/fpga.h +++ b/include/fpga.h @@ -54,6 +54,7 @@ void fpga_init(void); int fpga_add(fpga_type devtype, void *desc); int fpga_count(void); const fpga_desc *const fpga_get_desc(int devnum); +int fpga_is_partial_data(int devnum, size_t img_len); int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype); int fpga_fsload(int devnum, const void *buf, size_t size, diff --git a/include/image.h b/include/image.h index e9c18ce403..a128a623e5 100644 --- a/include/image.h +++ b/include/image.h @@ -887,6 +887,7 @@ int bootz_setup(ulong image, ulong *start, ulong *end); /* image node */ #define FIT_DATA_PROP "data" +#define FIT_DATA_POSITION_PROP "data-position" #define FIT_DATA_OFFSET_PROP "data-offset" #define FIT_DATA_SIZE_PROP "data-size" #define FIT_TIMESTAMP_PROP "timestamp" @@ -968,6 +969,8 @@ int fit_image_get_entry(const void *fit, int noffset, ulong *entry); int fit_image_get_data(const void *fit, int noffset, const void **data, size_t *size); int fit_image_get_data_offset(const void *fit, int noffset, int *data_offset); +int fit_image_get_data_position(const void *fit, int noffset, + int *data_position); int fit_image_get_data_size(const void *fit, int noffset, int *data_size); int fit_image_hash_get_algo(const void *fit, int noffset, char **algo); diff --git a/include/power/sandbox_pmic.h b/include/power/sandbox_pmic.h index 7fdbfb9fc6..c5e6fda2ea 100644 --- a/include/power/sandbox_pmic.h +++ b/include/power/sandbox_pmic.h @@ -13,7 +13,7 @@ #define SANDBOX_BUCK_DRIVER "sandbox_buck" #define SANDBOX_OF_BUCK_PREFIX "buck" -#define SANDBOX_BUCK_COUNT 2 +#define SANDBOX_BUCK_COUNT 3 #define SANDBOX_LDO_COUNT 2 /* * Sandbox PMIC registers: @@ -109,6 +109,9 @@ enum { #define SANDBOX_BUCK1_PLATNAME "SUPPLY_1.2V" #define SANDBOX_BUCK2_DEVNAME "buck2" #define SANDBOX_BUCK2_PLATNAME "SUPPLY_3.3V" +/* BUCK3: for testing fallback regulator prefix matching during bind */ +#define SANDBOX_BUCK3_DEVNAME "no_match_by_nodename" +#define SANDBOX_BUCK3_PLATNAME "buck_SUPPLY_1.5V" /* LDO names */ #define SANDBOX_LDO1_DEVNAME "ldo1" #define SANDBOX_LDO1_PLATNAME "VDD_EMMC_1.8V" diff --git a/include/power/tps65910_pmic.h b/include/power/tps65910_pmic.h new file mode 100644 index 0000000000..e8d9ffaa9f --- /dev/null +++ b/include/power/tps65910_pmic.h @@ -0,0 +1,130 @@ +/* + * Copyright (C) EETS GmbH, 2017, Felix Brack <f.brack@eets.ch> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __TPS65910_PMIC_H_ +#define __TPS65910_PMIC_H_ + +#define TPS65910_I2C_SEL_MASK (0x1 << 4) +#define TPS65910_VDD_SR_MASK (0x1 << 7) +#define TPS65910_GAIN_SEL_MASK (0x3 << 6) +#define TPS65910_VDD_SEL_MASK 0x7f +#define TPS65910_VDD_SEL_MIN 3 +#define TPS65910_VDD_SEL_MAX 75 +#define TPS65910_SEL_MASK (0x3 << 2) +#define TPS65910_SUPPLY_STATE_MASK 0x3 +#define TPS65910_SUPPLY_STATE_OFF 0x0 +#define TPS65910_SUPPLY_STATE_ON 0x1 + +/* i2c registers */ +enum { + TPS65910_REG_RTC_SEC = 0x00, + TPS65910_REG_RTC_MIN, + TPS65910_REG_RTC_HOUR, + TPS65910_REG_RTC_DAY, + TPS65910_REG_RTC_MONTH, + TPS65910_REG_RTC_YEAR, + TPS65910_REG_RTC_WEEK, + TPS65910_REG_RTC_ALARM_SEC = 0x08, + TPS65910_REG_RTC_ALARM_MIN, + TPS65910_REG_RTC_ALARM_HOUR, + TPS65910_REG_RTC_ALARM_DAY, + TPS65910_REG_RTC_ALARM_MONTH, + TPS65910_REG_RTC_ALARM_YEAR, + TPS65910_REG_RTC_CTRL = 0x10, + TPS65910_REG_RTC_STAT, + TPS65910_REG_RTC_INT, + TPS65910_REG_RTC_COMP_LSB, + TPS65910_REG_RTC_COMP_MSB, + TPS65910_REG_RTC_RESISTOR_PRG, + TPS65910_REG_RTC_RESET_STAT, + TPS65910_REG_BACKUP1, + TPS65910_REG_BACKUP2, + TPS65910_REG_BACKUP3, + TPS65910_REG_BACKUP4, + TPS65910_REG_BACKUP5, + TPS65910_REG_PUADEN, + TPS65910_REG_REF, + TPS65910_REG_VRTC, + TPS65910_REG_VIO = 0x20, + TPS65910_REG_VDD1, + TPS65910_REG_VDD1_VAL, + TPS65910_REG_VDD1_VAL_SR, + TPS65910_REG_VDD2, + TPS65910_REG_VDD2_VAL, + TPS65910_REG_VDD2_VAL_SR, + TPS65910_REG_VDD3, + TPS65910_REG_VDIG1 = 0x30, + TPS65910_REG_VDIG2, + TPS65910_REG_VAUX1, + TPS65910_REG_VAUX2, + TPS65910_REG_VAUX33, + TPS65910_REG_VMMC, + TPS65910_REG_VPLL, + TPS65910_REG_VDAC, + TPS65910_REG_THERM, + TPS65910_REG_BATTERY_BACKUP_CHARGE, + TPS65910_REG_DCDC_CTRL = 0x3e, + TPS65910_REG_DEVICE_CTRL, + TPS65910_REG_DEVICE_CTRL2, + TPS65910_REG_SLEEP_KEEP_LDO_ON, + TPS65910_REG_SLEEP_KEEP_RES_ON, + TPS65910_REG_SLEEP_SET_LDO_OFF, + TPS65910_REG_SLEEP_SET_RES_OFF, + TPS65910_REG_EN1_LDO_ASS, + TPS65910_REG_EM1_SMPS_ASS, + TPS65910_REG_EN2_LDO_ASS, + TPS65910_REG_EM2_SMPS_ASS, + TPS65910_REG_INT_STAT = 0x50, + TPS65910_REG_INT_MASK, + TPS65910_REG_INT_STAT2, + TPS65910_REG_INT_MASK2, + TPS65910_REG_GPIO = 0x60, + TPS65910_REG_JTAGREVNUM = 0x80, + TPS65910_NUM_REGS +}; + +/* chip supplies */ +enum { + TPS65910_SUPPLY_VCCIO = 0x00, + TPS65910_SUPPLY_VCC1, + TPS65910_SUPPLY_VCC2, + TPS65910_SUPPLY_VCC3, + TPS65910_SUPPLY_VCC4, + TPS65910_SUPPLY_VCC5, + TPS65910_SUPPLY_VCC6, + TPS65910_SUPPLY_VCC7, + TPS65910_NUM_SUPPLIES +}; + +/* regulator unit numbers */ +enum { + TPS65910_UNIT_VRTC = 0x00, + TPS65910_UNIT_VIO, + TPS65910_UNIT_VDD1, + TPS65910_UNIT_VDD2, + TPS65910_UNIT_VDD3, + TPS65910_UNIT_VDIG1, + TPS65910_UNIT_VDIG2, + TPS65910_UNIT_VPLL, + TPS65910_UNIT_VDAC, + TPS65910_UNIT_VAUX1, + TPS65910_UNIT_VAUX2, + TPS65910_UNIT_VAUX33, + TPS65910_UNIT_VMMC, +}; + +/* platform data */ +struct tps65910_regulator_pdata { + u32 supply; /* regulator supply voltage in uV */ + uint unit; /* unit-address according to DT */ +}; + +/* driver names */ +#define TPS65910_BUCK_DRIVER "tps65910_buck" +#define TPS65910_BOOST_DRIVER "tps65910_boost" +#define TPS65910_LDO_DRIVER "tps65910_ldo" + +#endif /* __TPS65910_PMIC_H_ */ diff --git a/include/samsung/exynos5-dt-types.h b/include/samsung/exynos5-dt-types.h index 479e2e793d..8e11af30d1 100644 --- a/include/samsung/exynos5-dt-types.h +++ b/include/samsung/exynos5-dt-types.h @@ -8,6 +8,7 @@ enum { EXYNOS5_BOARD_ODROID_XU3_REV01, EXYNOS5_BOARD_ODROID_XU3_REV02, EXYNOS5_BOARD_ODROID_XU4_REV01, + EXYNOS5_BOARD_ODROID_HC1_REV01, EXYNOS5_BOARD_ODROID_UNKNOWN, EXYNOS5_BOARD_COUNT, @@ -23,5 +24,6 @@ struct odroid_rev_info { bool board_is_generic(void); bool board_is_odroidxu3(void); bool board_is_odroidxu4(void); +bool board_is_odroidhc1(void); #endif diff --git a/include/spl.h b/include/spl.h index 308ce7b563..c14448b8fc 100644 --- a/include/spl.h +++ b/include/spl.h @@ -7,6 +7,8 @@ #ifndef _SPL_H_ #define _SPL_H_ +#include <binman_sym.h> + /* Platform-specific defines */ #include <linux/compiler.h> #include <asm/spl.h> @@ -51,6 +53,15 @@ struct spl_load_info { void *buf); }; +/* + * We need to know the position of U-Boot in memory so we can jump to it. We + * allow any U-Boot binary to be used (u-boot.bin, u-boot-nodtb.bin, + * u-boot.img), hence the '_any'. These is no checking here that the correct + * image is found. For * example if u-boot.img is used we don't check that + * spl_parse_image_header() can parse a valid header. + */ +binman_sym_extern(ulong, u_boot_any, pos); + /** * spl_load_simple_fit() - Loads a fit image from a device. * @spl_image: Image description to set up |