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-rw-r--r--include/configs/afeb9260.h1
-rw-r--r--include/configs/at91cap9adk.h10
-rw-r--r--include/configs/at91rm9200dk.h2
-rw-r--r--include/configs/at91sam9260ek.h10
-rw-r--r--include/configs/at91sam9261ek.h8
-rw-r--r--include/configs/at91sam9263ek.h9
-rw-r--r--include/configs/at91sam9rlek.h7
-rw-r--r--include/configs/cmc_pu2.h2
-rw-r--r--include/configs/csb637.h2
-rw-r--r--include/configs/kb9202.h2
-rw-r--r--include/configs/mp2usb.h2
-rw-r--r--include/flash.h12
12 files changed, 52 insertions, 15 deletions
diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h
index 755952fe21..f077ad90f4 100644
--- a/include/configs/afeb9260.h
+++ b/include/configs/afeb9260.h
@@ -29,6 +29,7 @@
/* ARM asynchronous clock */
#define AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */
#define AT91_MASTER_CLOCK 89999598 /* peripheral = main / 2 */
+#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h
index 30a7cb41f9..aeb06ac64b 100644
--- a/include/configs/at91cap9adk.h
+++ b/include/configs/at91cap9adk.h
@@ -29,9 +29,11 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91CAP9"
-#define AT91_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x10073e01 /* PLLB settings for USB */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -136,6 +138,8 @@
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index 633a053000..5c239d7bf7 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index be9a8eb51e..fbc470fbe0 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -28,9 +28,12 @@
#define __CONFIG_H
/* ARM asynchronous clock */
-#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_CPU_NAME "AT91SAM9260"
+#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x107c3e18 /* PLLB settings for USB */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -121,6 +124,7 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index add31c95a9..bd668235d3 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -29,9 +29,10 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9261"
-#define AT91_MAIN_CLOCK 198656000 /* from 18.432 MHz crystal */
-#define AT91_MASTER_CLOCK 99328000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -136,6 +137,7 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h
index 555cb7f2ea..a2b09ca9f7 100644
--- a/include/configs/at91sam9263ek.h
+++ b/include/configs/at91sam9263ek.h
@@ -29,9 +29,11 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9263"
-#define AT91_MAIN_CLOCK 199919000 /* from 16.367 MHz crystal */
-#define AT91_MASTER_CLOCK 99959500 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 16367660 /* 16.367 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CFG_AT91_PLLB 0x133a3e8d /* PLLB settings for USB */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
@@ -142,6 +144,7 @@
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9263"
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_USB_STORAGE 1
+#define CONFIG_CMD_FAT 1
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h
index 648d60ef1d..35dac47ba1 100644
--- a/include/configs/at91sam9rlek.h
+++ b/include/configs/at91sam9rlek.h
@@ -29,9 +29,10 @@
/* ARM asynchronous clock */
#define AT91_CPU_NAME "AT91SAM9RL"
-#define AT91_MAIN_CLOCK 200000000 /* from 12.000 MHz crystal */
-#define AT91_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
-#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
+#define AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
+#define AT91_MASTER_CLOCK 100000000 /* peripheral */
+#define AT91_CPU_CLOCK 200000000 /* cpu */
+#define CONFIG_SYS_HZ 1000000 /* 1us resolution */
#define AT91_SLOW_CLOCK 32768 /* slow clock */
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 527921e8fc..cdd308d8b9 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -71,6 +71,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 38fd25cb66..682db447dd 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -72,6 +72,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
* Size of malloc() pool
diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h
index 55cda329ee..1ce8c6974a 100644
--- a/include/configs/kb9202.h
+++ b/include/configs/kb9202.h
@@ -51,6 +51,8 @@
#define CONFIG_INITRD_TAG 1
#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SKIP_RELOCATE_UBOOT /* undef this for direct boot from */
+ /* NOR flash without preloader */
#define CONFIG_SYS_LONGHELP
diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h
index 2ffeae608b..cbbdb0c77e 100644
--- a/include/configs/mp2usb.h
+++ b/include/configs/mp2usb.h
@@ -76,6 +76,8 @@
#define SDRC_MR_VAL2 0x00000003 /* Load Mode Register */
#define SDRC_MR_VAL3 0x00000000 /* Normal Mode */
#define SDRC_TR_VAL 0x000002E0 /* Write refresh rate */
+#else
+#define CONFIG_SKIP_RELOCATE_UBOOT
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
/*
diff --git a/include/flash.h b/include/flash.h
index a6e91b5e69..6e2981c5ae 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -58,6 +58,8 @@ typedef struct {
#endif
} flash_info_t;
+typedef unsigned long flash_sect_t;
+
/*
* Values for the width of the port
*/
@@ -84,6 +86,9 @@ typedef struct {
/* convert between bit value and numeric value */
#define CFI_FLASH_SHIFT_WIDTH 3
+
+/* cfi-mtd device name */
+#define CFI_MTD_DEV_NAME "cfi-mtd"
/* Prototypes */
extern unsigned long flash_init (void);
@@ -92,6 +97,8 @@ extern int flash_erase (flash_info_t *, int, int);
extern int flash_sect_erase (ulong addr_first, ulong addr_last);
extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last);
extern int flash_sect_roundb (ulong *addr);
+extern unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect);
+extern void flash_set_verbose(uint);
/* common/flash.c */
extern void flash_protect (int flag, ulong from, ulong to, flash_info_t *info);
@@ -99,6 +106,11 @@ extern int flash_write (char *, ulong, ulong);
extern flash_info_t *addr2info (ulong);
extern int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt);
+/* drivers/mtd/cfi_mtd.c */
+#ifdef CONFIG_FLASH_CFI_MTD
+extern int cfi_mtd_init(void);
+#endif
+
/* board/?/flash.c */
#if defined(CONFIG_SYS_FLASH_PROTECTION)
extern int flash_real_protect(flash_info_t *info, long sector, int prot);
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-08 17:37:46 +0000