diff options
Diffstat (limited to 'include/configs')
-rw-r--r-- | include/configs/aspeed-common.h | 18 | ||||
-rw-r--r-- | include/configs/xenguest_arm64.h | 52 |
2 files changed, 61 insertions, 9 deletions
diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h index 1295a6cd19..df0f5d2e76 100644 --- a/include/configs/aspeed-common.h +++ b/include/configs/aspeed-common.h @@ -7,22 +7,24 @@ * (C) Copyright 2016 Google, Inc */ -#ifndef __AST_COMMON_CONFIG_H -#define __AST_COMMON_CONFIG_H +#ifndef _ASPEED_COMMON_CONFIG_H +#define _ASPEED_COMMON_CONFIG_H + +#include <asm/arch/platform.h> /* Misc CPU related */ #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_BASE ASPEED_DRAM_BASE #ifdef CONFIG_PRE_CON_BUF_SZ -#define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000 + CONFIG_PRE_CON_BUF_SZ) -#define CONFIG_SYS_INIT_RAM_SIZE (36*1024 - CONFIG_PRE_CON_BUF_SZ) +#define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE + CONFIG_PRE_CON_BUF_SZ) +#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE - CONFIG_PRE_CON_BUF_SZ) #else -#define CONFIG_SYS_INIT_RAM_ADDR (0x1e720000) -#define CONFIG_SYS_INIT_RAM_SIZE (36*1024) +#define CONFIG_SYS_INIT_RAM_ADDR (ASPEED_SRAM_BASE) +#define CONFIG_SYS_INIT_RAM_SIZE (ASPEED_SRAM_SIZE) #endif #define SYS_INIT_RAM_END (CONFIG_SYS_INIT_RAM_ADDR \ @@ -45,8 +47,6 @@ * Miscellaneous configurable options */ -#define CONFIG_BOOTCOMMAND "bootm 20080000 20300000" - #define CONFIG_EXTRA_ENV_SETTINGS \ "verify=yes\0" \ "spi_dma=yes\0" \ diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h new file mode 100644 index 0000000000..db3059a82c --- /dev/null +++ b/include/configs/xenguest_arm64.h @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0+ + * + * (C) Copyright 2020 EPAM Systemc Inc. + */ +#ifndef __XENGUEST_ARM64_H +#define __XENGUEST_ARM64_H + +#ifndef __ASSEMBLY__ +#include <linux/types.h> +#endif + +#define CONFIG_BOARD_EARLY_INIT_F + +#define CONFIG_EXTRA_ENV_SETTINGS + +#undef CONFIG_NR_DRAM_BANKS +#undef CONFIG_SYS_SDRAM_BASE + +#define CONFIG_NR_DRAM_BANKS 1 + +/* + * This can be any arbitrary address as we are using PIE, but + * please note, that CONFIG_SYS_TEXT_BASE must match the below. + */ +#define CONFIG_SYS_LOAD_ADDR 0x40000000 +#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE CONFIG_SYS_LOAD_ADDR + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (32 * 1024 * 1024) + +/* Monitor Command Prompt */ +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 1024 +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +#define CONFIG_OF_SYSTEM_SETUP + +#define CONFIG_CMDLINE_TAG 1 +#define CONFIG_INITRD_TAG 1 + +#define CONFIG_CMD_RUN + +#undef CONFIG_EXTRA_ENV_SETTINGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \ + "pvblockboot=run loadimage;" \ + "booti 0x90000000 - 0x88000000;\0" + +#endif /* __XENGUEST_ARM64_H */ |