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-rw-r--r--include/configs/bf537-stamp.h29
-rw-r--r--include/configs/bfin_adi_common.h17
-rw-r--r--include/configs/cm-bf537u.h150
-rw-r--r--include/configs/eNET.h25
-rw-r--r--include/configs/galaxy5200.h5
-rw-r--r--include/configs/sc520_cdp.h24
-rw-r--r--include/configs/sc520_spunk.h2
7 files changed, 210 insertions, 42 deletions
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index 98300db7b5..74b9ecd0b0 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -178,9 +178,28 @@
/*
* CF-CARD IDE-HDD Support
*/
-/* #define CONFIG_BFIN_TRUE_IDE */ /* Add CF flash card support */
-/* #define CONFIG_BFIN_CF_IDE */ /* Add CF flash card support */
-/* #define CONFIG_BFIN_HDD_IDE */ /* Add IDE Disk Drive (HDD) support */
+
+/*
+ * Add CF flash card support in TRUE-IDE Mode (CF-IDE-NAND Card)
+ * Strange address mapping Blackfin A13 connects to CF_A0
+ */
+
+/* #define CONFIG_BFIN_TRUE_IDE */
+
+/*
+ * Add CF flash card support in Common Memory Mode (CF-IDE-NAND Card)
+ * This should be the preferred mode
+ */
+
+/* #define CONFIG_BFIN_CF_IDE */
+
+/*
+ * Add IDE Disk Drive (HDD) support
+ * See example interface here:
+ * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:ide-blackfin
+ */
+
+/* #define CONFIG_BFIN_HDD_IDE */
#if defined(CONFIG_BFIN_CF_IDE) || \
defined(CONFIG_BFIN_HDD_IDE) || \
@@ -218,7 +237,7 @@
#define CONFIG_SYS_ATA_DATA_OFFSET 0x0020 /* data I/O */
#define CONFIG_SYS_ATA_REG_OFFSET 0x0020 /* normal register accesses */
#define CONFIG_SYS_ATA_ALT_OFFSET 0x001C /* alternate registers */
-#define CONFIG_SYS_ATA_STRIDE 2 /* CF.A0 --> Blackfin.Ax */
+#define CONFIG_SYS_ATA_STRIDE 2 /* CF.A0 --> Blackfin.A13 */
#elif defined(CONFIG_BFIN_CF_IDE)
#define CONFIG_SYS_ATA_BASE_ADDR 0x20211800
@@ -226,7 +245,7 @@
#define CONFIG_SYS_ATA_DATA_OFFSET 0x0000 /* data I/O */
#define CONFIG_SYS_ATA_REG_OFFSET 0x0000 /* normal register accesses */
#define CONFIG_SYS_ATA_ALT_OFFSET 0x000E /* alternate registers */
-#define CONFIG_SYS_ATA_STRIDE 1 /* CF.A0 --> Blackfin.Ax */
+#define CONFIG_SYS_ATA_STRIDE 1 /* CF_A0=0, with /CE1 /CE2 odd/even byte selects */
#elif defined(CONFIG_BFIN_HDD_IDE)
#define CONFIG_SYS_ATA_BASE_ADDR 0x20314000
diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h
index 1ca2e51420..00bfc6e90b 100644
--- a/include/configs/bfin_adi_common.h
+++ b/include/configs/bfin_adi_common.h
@@ -12,6 +12,13 @@
# include <config_cmd_default.h>
# if ADI_CMDS_NETWORK
# define CONFIG_CMD_DHCP
+# define CONFIG_BOOTP_SUBNETMASK
+# define CONFIG_BOOTP_GATEWAY
+# define CONFIG_BOOTP_DNS
+# define CONFIG_BOOTP_NTPSERVER
+# define CONFIG_BOOTP_RANDOM_DELAY
+# define CONFIG_KEEP_SERVERADDR
+# define CONFIG_CMD_DNS
# define CONFIG_CMD_PING
# ifdef CONFIG_BFIN_MAC
# define CONFIG_CMD_MII
@@ -46,6 +53,9 @@
# endif
# ifdef CONFIG_RTC_BFIN
# define CONFIG_CMD_DATE
+# if ADI_CMDS_NETWORK
+# define CONFIG_CMD_SNTP
+# endif
# endif
# ifdef CONFIG_SPI
# define CONFIG_CMD_EEPROM
@@ -77,6 +87,9 @@
# define CONFIG_CMD_SPIBOOTLDR
# endif
#endif
+#ifdef CONFIG_CMD_NAND
+# define CONFIG_SYS_64BIT_VSPRINTF
+#endif
/*
* Console Settings
@@ -160,8 +173,8 @@
"nand write $(loadaddr) 0 0x40000"
# else
# define UBOOT_ENV_UPDATE \
- "protect off 0x20000000 0x2003FFFF;" \
- "erase 0x20000000 0x2003FFFF;" \
+ "protect off 0x20000000 +$(filesize);" \
+ "erase 0x20000000 +$(filesize);" \
"cp.b $(loadaddr) 0x20000000 $(filesize)"
# endif
# define NETWORK_ENV_SETTINGS \
diff --git a/include/configs/cm-bf537u.h b/include/configs/cm-bf537u.h
new file mode 100644
index 0000000000..d1870a8963
--- /dev/null
+++ b/include/configs/cm-bf537u.h
@@ -0,0 +1,150 @@
+/*
+ * U-boot - Configuration file for CM-BF537U board
+ */
+
+#ifndef __CONFIG_CM_BF537U_H__
+#define __CONFIG_CM_BF537U_H__
+
+#include <asm/config-pre.h>
+
+
+/*
+ * Processor Settings
+ */
+#define CONFIG_BFIN_CPU bf537-0.2
+#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
+
+
+/*
+ * Clock Settings
+ * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
+ * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
+ */
+/* CONFIG_CLKIN_HZ is any value in Hz */
+#define CONFIG_CLKIN_HZ 30000000
+/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
+/* 1 = CLKIN / 2 */
+#define CONFIG_CLKIN_HALF 0
+/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
+/* 1 = bypass PLL */
+#define CONFIG_PLL_BYPASS 0
+/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
+/* Values can range from 0-63 (where 0 means 64) */
+#define CONFIG_VCO_MULT 18
+/* CCLK_DIV controls the core clock divider */
+/* Values can be 1, 2, 4, or 8 ONLY */
+#define CONFIG_CCLK_DIV 1
+/* SCLK_DIV controls the system clock divider */
+/* Values can range from 1-15 */
+#define CONFIG_SCLK_DIV 5
+/* Core voltage */
+#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
+
+
+/*
+ * Memory Settings
+ */
+#define CONFIG_MEM_ADD_WDTH 9
+#define CONFIG_MEM_SIZE 32
+
+#define CONFIG_EBIU_SDRRC_VAL 0x3f8
+#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
+
+#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
+#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
+#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
+
+#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
+#define CONFIG_SYS_MALLOC_LEN (128 * 1024)
+
+
+/*
+ * Network Settings
+ */
+#ifndef __ADSPBF534__
+#define ADI_CMDS_NETWORK 1
+#define CONFIG_NET_MULTI
+/* The next 3 lines are for use with SMSC on EXT-BF5xx-USB-ETH2 */
+#define CONFIG_SMC911X 1
+#define CONFIG_SMC911X_BASE 0x24000000
+#define CONFIG_SMC911X_16_BIT
+#endif
+#define CONFIG_HOSTNAME cm-bf537u
+/* Uncomment next line to use fixed MAC address */
+/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
+
+
+/*
+ * Flash Settings
+ */
+#define CONFIG_FLASH_CFI_DRIVER
+#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
+#define CONFIG_SYS_FLASH_BASE 0x20000000
+#define CONFIG_SYS_FLASH_CFI
+#define CONFIG_SYS_FLASH_PROTECTION
+#define CONFIG_SYS_MAX_FLASH_BANKS 1
+#define CONFIG_SYS_MAX_FLASH_SECT 35
+
+
+/*
+ * Env Storage Settings
+ */
+#define CONFIG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_OFFSET 0x4000
+#define CONFIG_ENV_SIZE 0x2000
+#define CONFIG_ENV_SECT_SIZE 0x20000
+#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
+#define ENV_IS_EMBEDDED
+#else
+#define ENV_IS_EMBEDDED_CUSTOM
+#endif
+#ifdef ENV_IS_EMBEDDED
+/* WARNING - the following is hand-optimized to fit within
+ * the sector before the environment sector. If it throws
+ * an error during compilation remove an object here to get
+ * it linked after the configuration sector.
+ */
+# define LDS_BOARD_TEXT \
+ cpu/blackfin/traps.o (.text .text.*); \
+ cpu/blackfin/interrupt.o (.text .text.*); \
+ cpu/blackfin/serial.o (.text .text.*); \
+ common/dlmalloc.o (.text .text.*); \
+ lib_generic/crc32.o (.text .text.*); \
+ . = DEFINED(env_offset) ? env_offset : .; \
+ common/env_embedded.o (.text .text.*);
+#endif
+
+
+/*
+ * I2C Settings
+ */
+#define CONFIG_BFIN_TWI_I2C 1
+#define CONFIG_HARD_I2C 1
+#define CONFIG_SYS_I2C_SPEED 50000
+#define CONFIG_SYS_I2C_SLAVE 0
+
+
+/*
+ * Misc Settings
+ */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_MISC_INIT_R
+#define CONFIG_RTC_BFIN
+#define CONFIG_UART_CONSOLE 0
+
+
+/*
+ * Pull in common ADI header for remaining command/environment setup
+ */
+#include <configs/bfin_adi_common.h>
+
+#undef CONFIG_BOOTCOMMAND
+#define CONFIG_BOOTCOMMAND "run flashboot"
+
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ NAND_ENV_SETTINGS \
+ NETWORK_ENV_SETTINGS \
+ "flashboot=flread 20040000 1000000 280000; bootm 0x1000000\0"
+
+#endif
diff --git a/include/configs/eNET.h b/include/configs/eNET.h
index dde4c83213..243a554178 100644
--- a/include/configs/eNET.h
+++ b/include/configs/eNET.h
@@ -86,6 +86,7 @@
#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
#undef CONFIG_CMD_NFS /* NFS support */
+#define CONFIG_CMD_PCI /* PCI support */
#define CONFIG_CMD_RUN /* run command in env variable */
#define CONFIG_CMD_SAVEENV /* saveenv */
#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
@@ -188,26 +189,24 @@
* Environment configuration
*/
#define CONFIG_ENV_IS_IN_FLASH 1
-#define CONFIG_ENV_OFFSET 0x20000 /* Offset of Environment Sector */
-#define CONFIG_ENV_SIZE 0x08000 /* Total Size of Environment Sector */
#define CONFIG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment Sector */
-#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE_1 + \
- CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
+#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
+#define CONFIG_ENV_ADDR CONFIG_SYS_FLASH_BASE_1
+/* Redundant Copy */
+#define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE_1 + \
CONFIG_ENV_SECT_SIZE)
-#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
+#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SECT_SIZE
/*-----------------------------------------------------------------------
* PCI configuration
*/
-#undef CONFIG_PCI /* include pci support */
-#undef CONFIG_PCI_PNP /* pci plug-and-play */
-#undef CONFIG_PCI_SCAN_SHOW
-#undef CONFIG_SYS_FIRST_PCI_IRQ
-#undef CONFIG_SYS_SECOND_PCI_IRQ
-#undef CONFIG_SYS_THIRD_PCI_IRQ
-#undef CONFIG_SYS_FORTH_PCI_IRQ
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_PNP /* pci plug-and-play */
+#define CONFIG_SYS_FIRST_PCI_IRQ 10
+#define CONFIG_SYS_SECOND_PCI_IRQ 9
+#define CONFIG_SYS_THIRD_PCI_IRQ 11
+#define CONFIG_SYS_FORTH_PCI_IRQ 15
/*-----------------------------------------------------------------------
* Hardware watchdog configuration
diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h
index 8d530d86aa..a5b5a03a9a 100644
--- a/include/configs/galaxy5200.h
+++ b/include/configs/galaxy5200.h
@@ -211,6 +211,11 @@
#define CONFIG_SYS_CS1_SIZE 0x90000
#define CONFIG_SYS_CS1_CFG 0x0002d900
+/* Chip Select configuration for Epson S1D13513 */
+#define CONFIG_SYS_CS3_START 0x10000000
+#define CONFIG_SYS_CS3_SIZE 0x400000
+#define CONFIG_SYS_CS3_CFG 0xffff3d10
+
/*
* Ethernet configuration
*/
diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h
index 3e2bb02a46..214a9af356 100644
--- a/include/configs/sc520_cdp.h
+++ b/include/configs/sc520_cdp.h
@@ -30,7 +30,6 @@
#define CONFIG_SKIP_RELOCATE_UBOOT
-#define GRUSS_TESTING
/*
* High Level Configuration Options
* (easy to change)
@@ -85,11 +84,7 @@
#include <config_cmd_default.h>
#define CONFIG_CMD_PCI
-#ifndef GRUSS_TESTING
#define CONFIG_CMD_SATA
-#else
-#undef CONFIG_CMD_SATA
-#endif
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_NET
#define CONFIG_CMD_EEPROM
@@ -181,17 +176,10 @@
/************************************************************
*SATA/Native Stuff
************************************************************/
-#ifndef GRUSS_TESTING
#define CONFIG_SYS_SATA_MAXBUS 2 /*Max Sata buses supported */
#define CONFIG_SYS_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
#define CONFIG_SYS_SATA_MAX_DEVICE (CONFIG_SYS_SATA_MAXBUS* CONFIG_SYS_SATA_DEVS_PER_BUS)
#define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */
-#else
-#undef CONFIG_SYS_SATA_MAXBUS
-#undef CONFIG_SYS_SATA_DEVS_PER_BUS
-#undef CONFIG_SYS_SATA_MAX_DEVICE
-#undef CONFIG_ATA_PIIX
-#endif
/************************************************************
@@ -204,11 +192,9 @@
/************************************************************
* Video/Keyboard support
************************************************************/
-#ifndef GRUSS_TESTING
#define CONFIG_VIDEO /* To enable video controller support */
-#else
-#undef CONFIG_VIDEO
-#endif
+#define PCI_VIDEO_VENDOR_ID 0 /*Use the appropriate vendor ID*/
+#define PCI_VIDEO_DEVICE_ID 0 /*Use the appropriate Device ID*/
#define CONFIG_I8042_KBD
#define CONFIG_SYS_ISA_IO 0
@@ -221,7 +207,6 @@
/*
* PCI stuff
*/
-#ifndef GRUSS_TESTING
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP /* pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW
@@ -230,11 +215,6 @@
#define CONFIG_SYS_SECOND_PCI_IRQ 9
#define CONFIG_SYS_THIRD_PCI_IRQ 11
#define CONFIG_SYS_FORTH_PCI_IRQ 15
-#else
-#undef CONFIG_PCI
-#undef CONFIG_PCI_PNP
-#undef CONFIG_PCI_SCAN_SHOW
-#endif
#endif /* __CONFIG_H */
diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h
index d42ef84216..f3fc9602ad 100644
--- a/include/configs/sc520_spunk.h
+++ b/include/configs/sc520_spunk.h
@@ -37,6 +37,7 @@
#define CONFIG_X86 1 /* This is a X86 CPU */
#define CONFIG_SYS_SC520 1 /* Include support for AMD SC520 */
+#define CONFIG_SYS_SC520_SSI
#define CONFIG_SYS_SDRAM_PRECHARGE_DELAY 6 /* 6T */
#define CONFIG_SYS_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */
@@ -218,6 +219,7 @@
#define CONFIG_SYS_PCMCIA_CIS_WIN_SIZE 0x00100000
#define CONFIG_SYS_PCMCIA_IO_WIN 0xe000
#define CONFIG_SYS_PCMCIA_IO_WIN_SIZE 16
+#define CONFIG_PCMCIA_SLOT_A /* TODO: Check this */
/************************************************************
* DISK Partition support
generated by cgit v1.2.3 (git 2.0.4) at 2024-07-15 05:24:08 +0000