diff options
Diffstat (limited to 'include/configs')
203 files changed, 748 insertions, 791 deletions
diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index e8c9cdd73d..87c88e7432 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -17,7 +17,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/BSC9131RDB.h b/include/configs/BSC9131RDB.h index c01071e60d..394aa7fb7d 100644 --- a/include/configs/BSC9131RDB.h +++ b/include/configs/BSC9131RDB.h @@ -24,7 +24,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xFFFFE000 #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h index 68100f1d52..87d5c20e66 100644 --- a/include/configs/BSC9132QDS.h +++ b/include/configs/BSC9132QDS.h @@ -32,7 +32,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xFFFFE000 #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 9b83a50fdf..b4a51a9528 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -33,7 +33,6 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_NAND_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xff800000 #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 4be40d0d02..c5730a79c9 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -16,7 +16,6 @@ #ifdef CONFIG_SDCARD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xD0001000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (512 << 10) @@ -39,7 +38,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xD0001000 #define CONFIG_SPL_PAD_TO 0x18000 #define CONFIG_SPL_MAX_SIZE (96 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (512 << 10) @@ -62,7 +60,6 @@ #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xFFFFE000 #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SPL_RELOC_TEXT_BASE 0x00100000 #define CONFIG_SPL_RELOC_STACK 0x00100000 @@ -88,7 +85,6 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_NAND_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xff800000 #define CONFIG_SPL_MAX_SIZE 8192 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xD0000000 diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index bdbf119c32..84325846fd 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -13,7 +13,6 @@ #ifdef CONFIG_SDCARD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) @@ -32,7 +31,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) @@ -67,7 +65,6 @@ #elif defined(CONFIG_SPL_BUILD) #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xff800000 #define CONFIG_SPL_MAX_SIZE 4096 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h index ef94097e09..58c1c803f7 100644 --- a/include/configs/T102xQDS.h +++ b/include/configs/T102xQDS.h @@ -29,7 +29,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xqds/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index 551ba6d935..cce65f531e 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -32,7 +32,6 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t102xrdb/t1024_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index a7e0f8f508..470f60acbe 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -21,7 +21,6 @@ #endif #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #ifdef CONFIG_SPL_BUILD diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 0d53ad50df..8d909deaf2 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -36,7 +36,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index a78dd810c6..fc0007d1ac 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -30,7 +30,6 @@ #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xrdb/t2080_pbi.cfg #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index 9e70412298..ff2ba7b9d5 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -21,7 +21,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 71258c805d..a818f0cf57 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -21,7 +21,6 @@ #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc #else #define CONFIG_SPL_FLUSH_IMAGE -#define CONFIG_SPL_TEXT_BASE 0xFFFD8000 #define CONFIG_SPL_PAD_TO 0x40000 #define CONFIG_SPL_MAX_SIZE 0x28000 #define RESET_VECTOR_OFFSET 0x27FFC diff --git a/include/configs/advantech_dms-ba16.h b/include/configs/advantech_dms-ba16.h index 57edeee941..22d1e41bc8 100644 --- a/include/configs/advantech_dms-ba16.h +++ b/include/configs/advantech_dms-ba16.h @@ -21,8 +21,6 @@ #define CONFIG_LOADCMD "fatload" #define CONFIG_RFSPART "2" -#define CONFIG_SUPPORT_EMMC_BOOT - #include "mx6_common.h" #include <linux/sizes.h> diff --git a/include/configs/alt.h b/include/configs/alt.h index 3a515eef00..eb7eb551ae 100644 --- a/include/configs/alt.h +++ b/include/configs/alt.h @@ -43,7 +43,6 @@ "usb_pgood_delay=2000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h index 0834ff5021..7721907d8f 100644 --- a/include/configs/am335x_evm.h +++ b/include/configs/am335x_evm.h @@ -240,7 +240,6 @@ * add mass storage support and for gadget we add both RNDIS ethernet * and DFU. */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL #define CONFIG_AM335X_USB1 diff --git a/include/configs/am3517_crane.h b/include/configs/am3517_crane.h index 3ce3814cbe..2c510265cc 100644 --- a/include/configs/am3517_crane.h +++ b/include/configs/am3517_crane.h @@ -218,7 +218,6 @@ GENERATED_GBL_DATA_SIZE) /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/am3517_evm.h b/include/configs/am3517_evm.h index 300f56541e..9475e9975d 100644 --- a/include/configs/am3517_evm.h +++ b/include/configs/am3517_evm.h @@ -189,8 +189,6 @@ #define CONFIG_ENV_ADDR 0x260000 /* Defines for SPL */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index 37d058ebbc..ef85cd2994 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -35,7 +35,6 @@ #define CONFIG_POWER_TPS62362 /* SPL defines. */ -#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/am57xx_evm.h b/include/configs/am57xx_evm.h index c14b010550..2c651aab17 100644 --- a/include/configs/am57xx_evm.h +++ b/include/configs/am57xx_evm.h @@ -63,8 +63,6 @@ #define CONFIG_NET_RETRY_COUNT 10 #define PHY_ANEG_TIMEOUT 8000 /* PHY needs longer aneg time at 1G */ -#define CONFIG_SUPPORT_EMMC_BOOT - /* USB xHCI HOST */ #define CONFIG_USB_XHCI_OMAP diff --git a/include/configs/am65x_evm.h b/include/configs/am65x_evm.h index 9ce5b6e824..b043bf886b 100644 --- a/include/configs/am65x_evm.h +++ b/include/configs/am65x_evm.h @@ -19,11 +19,6 @@ #define CONFIG_SYS_SDRAM_BASE1 0x880000000 /* SPL Loader Configuration */ -#ifdef CONFIG_TARGET_AM654_A53_EVM -#define CONFIG_SPL_TEXT_BASE 0x80080000 -#else -#define CONFIG_SPL_TEXT_BASE 0x41c00000 -#endif #ifdef CONFIG_SYS_K3_SPL_ATF #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "tispl.bin" diff --git a/include/configs/apalis-tk1.h b/include/configs/apalis-tk1.h index 1d296ba51a..9c8c8979f0 100644 --- a/include/configs/apalis-tk1.h +++ b/include/configs/apalis-tk1.h @@ -18,9 +18,6 @@ #define CONFIG_TEGRA_ENABLE_UARTA #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE -/* SD/MMC support */ -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - /* Environment in eMMC, before config block at the end of 1st "boot sector" */ #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \ CONFIG_TDX_CFG_BLOCK_OFFSET) diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 96169f55f0..9d9e16e5d9 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -46,8 +46,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - /* * SATA Configs */ @@ -138,12 +136,12 @@ #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x20000000\0" \ - "fdt_addr_r=0x12000000\0" \ + "fdt_addr_r=0x12100000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x11000000\0" \ "pxefile_addr_r=0x17100000\0" \ - "ramdisk_addr_r=0x12100000\0" \ + "ramdisk_addr_r=0x12200000\0" \ "scriptaddr=0x17000000\0" #define NFS_BOOTCMD \ diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 1cee2fa292..b7a7ec5ee0 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -27,7 +27,6 @@ */ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_SIZE 2048 -#define CONFIG_SPL_TEXT_BASE 0xA0000000 /* NAND boot config */ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 06b02ce90a..dd321c4748 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -14,9 +14,6 @@ #include "exynos5250-common.h" #include <configs/exynos5-common.h> -/* SD/MMC configuration */ -#define CONFIG_SUPPORT_EMMC_BOOT - /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/at91sam9m10g45ek.h b/include/configs/at91sam9m10g45ek.h index 0958d63c94..044c428a71 100644 --- a/include/configs/at91sam9m10g45ek.h +++ b/include/configs/at91sam9m10g45ek.h @@ -96,7 +96,6 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x010000 #define CONFIG_SPL_STACK 0x310000 diff --git a/include/configs/at91sam9n12ek.h b/include/configs/at91sam9n12ek.h index d83546d8e6..e9b97b6e97 100644 --- a/include/configs/at91sam9n12ek.h +++ b/include/configs/at91sam9n12ek.h @@ -133,7 +133,6 @@ #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024) /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 diff --git a/include/configs/at91sam9x5ek.h b/include/configs/at91sam9x5ek.h index 1abca55112..9353de76f2 100644 --- a/include/configs/at91sam9x5ek.h +++ b/include/configs/at91sam9x5ek.h @@ -106,7 +106,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 diff --git a/include/configs/baltos.h b/include/configs/baltos.h index ccbdc0a335..98ec0d626e 100644 --- a/include/configs/baltos.h +++ b/include/configs/baltos.h @@ -251,7 +251,6 @@ * add mass storage support and for gadget we add both RNDIS ethernet * and DFU. */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_HOST #define CONFIG_AM335X_USB1 diff --git a/include/configs/bav335x.h b/include/configs/bav335x.h index fb9c2a6d04..3d4d08aa70 100644 --- a/include/configs/bav335x.h +++ b/include/configs/bav335x.h @@ -387,7 +387,6 @@ DEFAULT_LINUX_BOOT_ENV \ * add mass storage support and for gadget we add both RNDIS ethernet * and DFU. */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL #define CONFIG_AM335X_USB1 diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h index 5834e1e2a2..2de6f21861 100644 --- a/include/configs/broadcom_bcm963158.h +++ b/include/configs/broadcom_bcm963158.h @@ -30,6 +30,13 @@ #define CONFIG_SKIP_LOWLEVEL_INIT +#ifdef CONFIG_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT +#endif /* CONFIG_NAND */ + /* * bcm963158 */ diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h index 6126a8879e..355f3ef5be 100644 --- a/include/configs/broadcom_bcm968380gerg.h +++ b/include/configs/broadcom_bcm968380gerg.h @@ -7,3 +7,10 @@ #include <configs/bmips_bcm6838.h> #define CONFIG_ENV_SIZE (8 * 1024) + +#ifdef CONFIG_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT +#endif /* CONFIG_NAND */ diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h index 1c0945e140..52b4f55f7c 100644 --- a/include/configs/broadcom_bcm968580xref.h +++ b/include/configs/broadcom_bcm968580xref.h @@ -29,6 +29,13 @@ #define CONFIG_SKIP_LOWLEVEL_INIT +#ifdef CONFIG_NAND +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define CONFIG_SYS_NAND_SELF_INIT +#define CONFIG_SYS_NAND_ONFI_DETECTION +#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT +#endif /* CONFIG_NAND */ + /* * 968580xref */ diff --git a/include/configs/brppt1.h b/include/configs/brppt1.h index ae9b75bb87..51af93a32f 100644 --- a/include/configs/brppt1.h +++ b/include/configs/brppt1.h @@ -31,11 +31,6 @@ /*#define CONFIG_MACH_TYPE 3589*/ #define CONFIG_MACH_TYPE 0xFFFFFFFF /* TODO: check with kernel*/ -/* MMC/SD IP block */ -#if defined(CONFIG_EMMC_BOOT) - #define CONFIG_SUPPORT_EMMC_BOOT -#endif /* CONFIG_EMMC_BOOT */ - /* * When we have NAND flash we expect to be making use of mtdparts, * both for ease of use in U-Boot and for passing information on to @@ -182,9 +177,6 @@ NANDTGTS \ #define CONFIG_NAND_OMAP_GPMC_WSCFG 1 #endif /* CONFIG_NAND */ -/* USB configuration */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT - #if defined(CONFIG_SPI) /* SPI Flash */ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 diff --git a/include/configs/brxre1.h b/include/configs/brxre1.h index 601b30dffd..7309e7d483 100644 --- a/include/configs/brxre1.h +++ b/include/configs/brxre1.h @@ -68,9 +68,6 @@ BUR_COMMON_ENV \ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG -/* USB configuration */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT - /* Environment */ #define CONFIG_SYS_MMC_ENV_DEV 1 #define CONFIG_SYS_MMC_ENV_PART 2 diff --git a/include/configs/bur_am335x_common.h b/include/configs/bur_am335x_common.h index 1bbfa16660..42e3e568be 100644 --- a/include/configs/bur_am335x_common.h +++ b/include/configs/bur_am335x_common.h @@ -41,7 +41,6 @@ * Y-MODEM to load u-boot.img, when booted over UART. We must also include * the scratch space that U-Boot uses in SRAM. */ -#define CONFIG_SPL_TEXT_BASE 0x402F0400 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h index 4372280d2b..db990fcb2b 100644 --- a/include/configs/chiliboard.h +++ b/include/configs/chiliboard.h @@ -148,7 +148,6 @@ /* USB configuration */ #define CONFIG_ARCH_MISC_INIT -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB1 #define CONFIG_AM335X_USB1_MODE MUSB_HOST diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index ee546d8f89..f26e463fe5 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -18,11 +18,6 @@ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x003f8000 -#define CONFIG_SPL_TEXT_BASE 0xfffd0000 - -#define BOOT_DEVICE_SPI 10 - #define CONFIG_SPL_BOARD_LOAD_IMAGE -#define BOOT_DEVICE_BOARD 11 #endif /* __CONFIG_H */ diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h index ccb2fe8caa..2f7dd69fb8 100644 --- a/include/configs/chromebook_samus.h +++ b/include/configs/chromebook_samus.h @@ -23,4 +23,6 @@ #define CONFIG_ENV_SECT_SIZE 0x1000 #define CONFIG_ENV_OFFSET 0x003f8000 +#define CONFIG_TPL_TEXT_BASE 0xfffd8000 + #endif /* __CONFIG_H */ diff --git a/include/configs/ci20.h b/include/configs/ci20.h index 9a3621329d..21a86323c2 100644 --- a/include/configs/ci20.h +++ b/include/configs/ci20.h @@ -59,7 +59,6 @@ /* SPL */ #define CONFIG_SPL_STACK 0xf4008000 /* only max. 2KB spare! */ -#define CONFIG_SPL_TEXT_BASE 0xf4000a00 #define CONFIG_SPL_MAX_SIZE ((14 * 1024) - 0xa00) #define CONFIG_SPL_BSS_START_ADDR 0xf4004000 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 26d1a97891..4c93fc6cbe 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -153,7 +153,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */ -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #endif /* USB Configs */ diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 9f8d3cc9e5..4198ff0511 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -26,10 +26,6 @@ */ #define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE -#ifdef CONFIG_CMD_MMC -#define CONFIG_SUPPORT_EMMC_BOOT -#endif - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI @@ -73,7 +69,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) diff --git a/include/configs/cm_t35.h b/include/configs/cm_t35.h index 8722841384..fd693cf251 100644 --- a/include/configs/cm_t35.h +++ b/include/configs/cm_t35.h @@ -232,7 +232,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/cm_t43.h b/include/configs/cm_t43.h index e4e37e5bbb..bd409896bc 100644 --- a/include/configs/cm_t43.h +++ b/include/configs/cm_t43.h @@ -119,7 +119,6 @@ "fi;" /* SPL defines. */ -#define CONFIG_SPL_TEXT_BASE 0x40300350 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + (128 << 20)) #define CONFIG_SYS_SPI_U_BOOT_OFFS (256 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) diff --git a/include/configs/cm_t54.h b/include/configs/cm_t54.h index cda1b5528f..2387f864e3 100644 --- a/include/configs/cm_t54.h +++ b/include/configs/cm_t54.h @@ -41,7 +41,6 @@ /* Enhance our eMMC support / experience. */ #define CONFIG_HSMMC2_8BIT -#define CONFIG_SUPPORT_EMMC_BOOT /* SATA Boot related defines */ #define CONFIG_SPL_SATA_BOOT_DEVICE 0 diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 7cf550cf9e..fc39e807b6 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0+ */ /* - * Copyright 2018 Toradex AG + * Copyright 2018-2019 Toradex AG * * Configuration settings for the Colibri iMX6ULL module. * @@ -19,10 +19,6 @@ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) /* Network */ -#define CONFIG_FEC_XCV_TYPE RMII -#define CONFIG_ETHPRIME "FEC" -#define CONFIG_FEC_MXC_PHYADDR 0 - #define CONFIG_IP_DEFRAG #define CONFIG_TFTP_BLOCKSIZE 16352 #define CONFIG_TFTP_TSIZE @@ -30,7 +26,7 @@ /* ENET1 */ #define IMX_FEC_BASE ENET2_BASE_ADDR -/* MMC Config*/ +/* MMC Config */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 1 @@ -48,12 +44,12 @@ #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ - "fdt_addr_r=0x82000000\0" \ + "fdt_addr_r=0x82100000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x81000000\0" \ "pxefile_addr_r=0x87100000\0" \ - "ramdisk_addr_r=0x82100000\0" \ + "ramdisk_addr_r=0x82200000\0" \ "scriptaddr=0x87000000\0" #define NFS_BOOTCMD \ @@ -182,4 +178,4 @@ #define CONFIG_VIDEO_BMP_LOGO #endif -#endif +#endif /* __COLIBRI_IMX6ULL_CONFIG_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 803c9be064..b540b3e074 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -44,8 +44,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - /* Network */ #define CONFIG_FEC_MXC #define IMX_FEC_BASE ENET_BASE_ADDR @@ -115,25 +113,31 @@ "imx6dl-colibri-cam-eval-v3.dtb fat 0 1" #define EMMC_BOOTCMD \ - "emmcargs=ip=off root=/dev/mmcblk0p2 rw,noatime rootfstype=ext4 " \ + "set_emmcargs=setenv emmcargs ip=off root=PARTUUID=${uuid} "\ + "rw,noatime rootfstype=ext4 " \ "rootwait\0" \ - "emmcboot=run setup; " \ + "emmcboot=run setup; run emmcfinduuid; run set_emmcargs; " \ "setenv bootargs ${defargs} ${emmcargs} ${setupargs} " \ "${vidargs}; echo Booting from internal eMMC chip...; " \ - "run emmcdtbload; load mmc 0:1 ${kernel_addr_r} " \ - "${boot_file} && run fdt_fixup && " \ + "run emmcdtbload; load mmc ${emmcdev}:${emmcbootpart} " \ + "${kernel_addr_r} ${boot_file} && run fdt_fixup && " \ "bootz ${kernel_addr_r} ${dtbparam}\0" \ - "emmcdtbload=setenv dtbparam; load mmc 0:1 ${fdt_addr_r} " \ - "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" + "emmcbootpart=1\0" \ + "emmcdev=0\0" \ + "emmcdtbload=setenv dtbparam; load mmc ${emmcdev}:${emmcbootpart} " \ + "${fdt_addr_r} ${fdt_file} && " \ + "setenv dtbparam \" - ${fdt_addr_r}\" && true\0" \ + "emmcfinduuid=part uuid mmc ${mmcdev}:${emmcrootpart} uuid\0" \ + "emmcrootpart=2\0" #define MEM_LAYOUT_ENV_SETTINGS \ "bootm_size=0x10000000\0" \ - "fdt_addr_r=0x12000000\0" \ + "fdt_addr_r=0x12100000\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \ "kernel_addr_r=0x11000000\0" \ "pxefile_addr_r=0x17100000\0" \ - "ramdisk_addr_r=0x12100000\0" \ + "ramdisk_addr_r=0x12200000\0" \ "scriptaddr=0x17000000\0" #define NFS_BOOTCMD \ @@ -147,27 +151,40 @@ "&& setenv dtbparam \" - ${fdt_addr_r}\" && true\0" #define SD_BOOTCMD \ - "sdargs=ip=off root=/dev/mmcblk1p2 rw,noatime rootfstype=ext4 " \ - "rootwait\0" \ - "sdboot=run setup; " \ + "set_sdargs=setenv sdargs ip=off root=PARTUUID=${uuid} rw,noatime " \ + "rootfstype=ext4 rootwait\0" \ + "sdboot=run setup; run sdfinduuid; run set_sdargs; " \ "setenv bootargs ${defargs} ${sdargs} ${setupargs} " \ "${vidargs}; echo Booting from SD card; " \ - "run sddtbload; load mmc 1:1 ${kernel_addr_r} " \ - "${boot_file} && run fdt_fixup && " \ + "run sddtbload; load mmc ${sddev}:${sdbootpart} "\ + "${kernel_addr_r} ${boot_file} && run fdt_fixup && " \ "bootz ${kernel_addr_r} ${dtbparam}\0" \ - "sddtbload=setenv dtbparam; load mmc 1:1 ${fdt_addr_r} " \ - "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" + "sdbootpart=1\0" \ + "sddev=1\0" \ + "sddtbload=setenv dtbparam; load mmc ${sddev}:${sdbootpart} " \ + "${fdt_addr_r} ${fdt_file} && setenv dtbparam \" - " \ + "${fdt_addr_r}\" && true\0" \ + "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \ + "sdrootpart=2\0" #define USB_BOOTCMD \ - "usbargs=ip=off root=/dev/sda2 rw,noatime rootfstype=ext4 " \ - "rootwait\0" \ - "usbboot=run setup; setenv bootargs ${defargs} ${setupargs} " \ + "set_usbargs=setenv usbargs ip=off root=PARTUUID=${uuid} rw,noatime " \ + "rootfstype=ext4 rootwait\0" \ + "usbboot=run setup; usb start; run usbfinduuid; run set_usbargs; " \ + "setenv bootargs ${defargs} ${setupargs} " \ "${usbargs} ${vidargs}; echo Booting from USB stick...; " \ - "usb start && run usbdtbload; load usb 0:1 ${kernel_addr_r} " \ + "run usbdtbload; " \ + "load usb ${usbdev}:${usbbootpart} ${kernel_addr_r} " \ "${boot_file} && run fdt_fixup && " \ "bootz ${kernel_addr_r} ${dtbparam}\0" \ - "usbdtbload=setenv dtbparam; load usb 0:1 ${fdt_addr_r} " \ - "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && true\0" + "usbbootpart=1\0" \ + "usbdev=0\0" \ + "usbdtbload=setenv dtbparam; load usb ${usbdev}:${usbbootpart} " \ + "${fdt_addr_r} " \ + "${fdt_file} && setenv dtbparam \" - ${fdt_addr_r}\" && " \ + "true\0" \ + "usbfinduuid=part uuid usb ${usbdev}:${usbrootpart} uuid\0" \ + "usbrootpart=2\0" #define FDT_FILE "imx6dl-colibri-eval-v3.dtb" #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -186,6 +203,7 @@ MEM_LAYOUT_ENV_SETTINGS \ NFS_BOOTCMD \ SD_BOOTCMD \ + USB_BOOTCMD \ "setethupdate=if env exists ethaddr; then; else setenv ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \ "flash_eth.img && source ${loadaddr}\0" \ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index 5a4b9801cb..7dfc92c085 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -35,8 +35,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 1 #elif CONFIG_TARGET_COLIBRI_IMX7_EMMC #define CONFIG_SYS_FSL_USDHC_NUM 2 - -#define CONFIG_SUPPORT_EMMC_BOOT #endif #undef CONFIG_BOOTM_PLAN9 diff --git a/include/configs/controlcenterdc.h b/include/configs/controlcenterdc.h index 91308377c2..3affdb0f68 100644 --- a/include/configs/controlcenterdc.h +++ b/include/configs/controlcenterdc.h @@ -76,10 +76,8 @@ #define CONFIG_SPL_SIZE (160 << 10) #if defined(CONFIG_SECURED_MODE_IMAGE) -#define CONFIG_SPL_TEXT_BASE 0x40002614 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x2614) #else -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x30) #endif diff --git a/include/configs/corvus.h b/include/configs/corvus.h index 749a67d4b0..f1b0374abe 100644 --- a/include/configs/corvus.h +++ b/include/configs/corvus.h @@ -72,6 +72,7 @@ #define CONFIG_SYS_NAND_MASK_CLE (1 << 22) #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8 +#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT #endif /* Ethernet */ @@ -102,7 +103,6 @@ SZ_4M, 0x1000) /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE (12 * SZ_1K) #define CONFIG_SPL_STACK (SZ_16K) diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index 94848f5128..ccdac0abec 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -267,13 +267,20 @@ #define CONFIG_ENV_SIZE (16 << 10) #endif +/* USB Configs */ +#define CONFIG_SYS_USB_OHCI_CPU_INIT +#define CONFIG_USB_OHCI_NEW +#define CONFIG_USB_STORAGE +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000 +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "da850evm" + #ifndef CONFIG_DIRECT_NOR_BOOT /* defines for SPL */ #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 #define CONFIG_SPL_PAD_TO 32768 #endif diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h new file mode 100644 index 0000000000..fb1b899d71 --- /dev/null +++ b/include/configs/dart_6ul.h @@ -0,0 +1,131 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Board configuration file for Variscite DART-6UL Evaluation Kit + * Copyright (C) 2019 Parthiban Nallathambi <parthitce@gmail.com> + */ +#ifndef __DART_6UL_H +#define __DART_6UL_H + +#include <linux/sizes.h> +#include "mx6_common.h" + +/* SPL options */ +#include "imx6_spl.h" + +/* NAND pin conflicts with usdhc2 */ +#ifdef CONFIG_CMD_NAND +#define CONFIG_SYS_FSL_USDHC_NUM 1 +#else +#define CONFIG_SYS_FSL_USDHC_NUM 2 +#endif + +#ifdef CONFIG_CMD_NET +#define CONFIG_FEC_ENET_DEV 0 + +#if (CONFIG_FEC_ENET_DEV == 0) +#define IMX_FEC_BASE ENET_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x1 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "eth0" +#elif (CONFIG_FEC_ENET_DEV == 1) +#define IMX_FEC_BASE ENET2_BASE_ADDR +#define CONFIG_FEC_MXC_PHYADDR 0x3 +#define CONFIG_FEC_XCV_TYPE RMII +#define CONFIG_ETHPRIME "eth1" +#endif +#endif + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) + +/* Environment settings */ +#define CONFIG_ENV_SIZE SZ_8K +#define CONFIG_ENV_OFFSET (14 * SZ_64K) +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_OFFSET_REDUND \ + (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) + +/* Environment in SD */ +#define CONFIG_SYS_MMC_ENV_DEV 0 +#define CONFIG_SYS_MMC_ENV_PART 0 +#define MMC_ROOTFS_DEV 0 +#define MMC_ROOTFS_PART 2 + +/* Console configs */ +#define CONFIG_MXC_UART_BASE UART1_BASE + +/* MMC Configs */ +#define CONFIG_FSL_USDHC + +#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CONFIG_SUPPORT_EMMC_BOOT + +/* I2C configs */ +#ifdef CONFIG_CMD_I2C +#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ +#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ +#define CONFIG_SYS_I2C_SPEED 100000 +#endif + +/* Miscellaneous configurable options */ +#define CONFIG_SYS_MEMTEST_START 0x80000000 +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x8000000) + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR +#define CONFIG_SYS_HZ 1000 + +/* Physical Memory Map */ +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define PHYS_SDRAM_SIZE SZ_512M + +#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM +#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CONFIG_SYS_INIT_SP_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) + +/* USB Configs */ +#define CONFIG_EHCI_HCD_INIT_AFTER_RESET +#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) +#define CONFIG_MXC_USB_FLAGS 0 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 + +#define CONFIG_IMX_THERMAL + +#define ENV_MMC \ + "mmcdev=" __stringify(MMC_ROOTFS_DEV) "\0" \ + "mmcpart=" __stringify(MMC_ROOTFS_PART) "\0" \ + "fitpart=1\0" \ + "bootdelay=3\0" \ + "silent=1\0" \ + "optargs=rw rootwait\0" \ + "mmcautodetect=yes\0" \ + "mmcrootfstype=ext4\0" \ + "mmcfit_name=fitImage\0" \ + "mmcloadfit=fatload mmc ${mmcdev}:${fitpart} ${fit_addr} " \ + "${mmcfit_name}\0" \ + "mmcargs=setenv bootargs " \ + "root=/dev/mmcblk${mmcdev}p${mmcpart} ${optargs} " \ + "console=${console} rootfstype=${mmcrootfstype}\0" \ + "mmc_mmc_fit=run mmcloadfit;run mmcargs addcon; bootm ${fit_addr}\0" \ + +/* Default environment */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "fdt_high=0xffffffff\0" \ + "console=ttymxc0,115200n8\0" \ + "addcon=setenv bootargs ${bootargs} console=${console},${baudrate}\0" \ + "fit_addr=0x82000000\0" \ + ENV_MMC + +#define CONFIG_BOOTCOMMAND "run mmc_mmc_fit" + +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(MMC, mmc, 1) \ + func(DHCP, dhcp, na) + +#include <config_distro_bootcmd.h> +#endif /* __DART_6UL_H */ diff --git a/include/configs/db-88f6281-bp.h b/include/configs/db-88f6281-bp.h new file mode 100644 index 0000000000..680de8f294 --- /dev/null +++ b/include/configs/db-88f6281-bp.h @@ -0,0 +1,99 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _CONFIG_DB_88F6281_BP_H +#define _CONFIG_DB_88F6281_BP_H + +/* + * High Level Configuration Options (easy to change) + */ +#define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ +#define CONFIG_KW88F6281 1 /* SOC Name */ +#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ +#define CONFIG_SYS_TCLK 166666667 +#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage.cfg +#define CONFIG_BUILD_TARGET "u-boot.kwb" + +/* additions for new ARM relocation support */ +#define CONFIG_SYS_SDRAM_BASE 0x00000000 + +#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */ +#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */ +#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */ +#define CONFIG_KIRKWOOD_GPIO 1 + +/* + * NS16550 Configuration + */ +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK +#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE + +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +/* + * Serial Port configuration + * The following definitions let you select what serial you want to use + * for your console driver. + */ + +#define CONFIG_CONS_INDEX 1 /* Console on UART0 */ + +/* + * Environment variables configurations + */ +#define CONFIG_ENV_SPI_BUS 0 +#define CONFIG_ENV_SPI_CS 0 +#define CONFIG_ENV_SPI_MAX_HZ 20000000 /* 20Mhz */ +#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE +#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256K */ +#define CONFIG_ENV_SIZE 0x01000 +#define CONFIG_ENV_OFFSET 0xC0000 + +/* + * U-Boot bootcode configuration + */ + +#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for monitor */ +#define CONFIG_SYS_MALLOC_LEN (4 << 20) /* Reserve 4.0 MB for malloc */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 8 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ +#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Mem map for Linux*/ + +/* size in bytes reserved for initial data */ + +#include <asm/arch/config.h> +/* There is no PHY directly connected so don't ask it for link status */ +#undef CONFIG_SYS_FAULT_ECHO_LINK_DOWN + +/* + * Other required minimal configurations + */ +#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */ +#define CONFIG_SYS_MEMTEST_START 0x00400000 /* 4M */ +#define CONFIG_SYS_MEMTEST_END 0x007fffff /* (_8M - 1) */ +#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */ + +/* + * SDIO/MMC Card Configuration + */ +#ifdef CONFIG_CMD_MMC +#define CONFIG_MVEBU_MMC +#define CONFIG_SYS_MMC_BASE KW_SDIO_BASE +#endif /* CONFIG_CMD_MMC */ + +/* + * SATA Driver configuration + */ +#ifdef CONFIG_MVSATA_IDE +#define CONFIG_SYS_ATA_IDE0_OFFSET MV_SATA_PORT0_OFFSET +#endif /*CONFIG_MVSATA_IDE*/ + +#define CONFIG_SYS_LOAD_ADDR 0x1000000 /* default location for tftp and bootm */ + +#define CONFIG_SYS_DCACHE_OFF + +#endif /* _CONFIG_DB_88F6281_BP_H */ diff --git a/include/configs/db-88f6720.h b/include/configs/db-88f6720.h index 63194d58a2..a1780fa3da 100644 --- a/include/configs/db-88f6720.h +++ b/include/configs/db-88f6720.h @@ -60,7 +60,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40004030 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) diff --git a/include/configs/db-88f6820-amc.h b/include/configs/db-88f6820-amc.h index 2fdc845029..5b59a92cb9 100644 --- a/include/configs/db-88f6820-amc.h +++ b/include/configs/db-88f6820-amc.h @@ -55,7 +55,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) diff --git a/include/configs/db-88f6820-gp.h b/include/configs/db-88f6820-gp.h index ec2405bbb4..c98679e109 100644 --- a/include/configs/db-88f6820-gp.h +++ b/include/configs/db-88f6820-gp.h @@ -71,7 +71,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 1f9d24b19b..6ed58ce91b 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -70,7 +70,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40004030 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h index 2f8c655b2c..ae9e4d4a2c 100644 --- a/include/configs/devkit3250.h +++ b/include/configs/devkit3250.h @@ -157,7 +157,6 @@ * SPL specific defines */ /* SPL will be executed at offset 0 */ -#define CONFIG_SPL_TEXT_BASE 0x00000000 /* SPL will use SRAM as stack */ #define CONFIG_SPL_STACK 0x0000FFF8 diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h index 1b175be387..2eb658dc61 100644 --- a/include/configs/devkit8000.h +++ b/include/configs/devkit8000.h @@ -154,9 +154,6 @@ /* Defines for SPL */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ - /* NAND boot config */ #define CONFIG_SYS_NAND_5_ADDR_CYCLE #define CONFIG_SYS_NAND_PAGE_COUNT 64 diff --git a/include/configs/display5.h b/include/configs/display5.h index 8ab47abfa8..8829cbad91 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -83,7 +83,6 @@ #define CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SUPPORT_EMMC_BOOT /* allow to overwrite serial and ethaddr */ #define CONFIG_ENV_OVERWRITE diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index f6be6595fe..aec70ee718 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -96,8 +96,6 @@ /* SPI SPL */ #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 -#define CONFIG_SUPPORT_EMMC_BOOT - /* USB xHCI HOST */ #define CONFIG_USB_XHCI_OMAP diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index cf021083ae..7155ebac5c 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -31,13 +31,6 @@ * it has to be done after each HCD reset */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET -/* Support all possible USB ethernet dongles */ - -/* Extra Commands */ -/* Enable that for switching of boot partitions */ -/* Disabled by default as some sub-commands can brick eMMC */ -/*#define CONFIG_SUPPORT_EMMC_BOOT */ - /* BOOTP options */ #define CONFIG_BOOTP_BOOTFILESIZE diff --git a/include/configs/ds414.h b/include/configs/ds414.h index 192c055c5c..7269c42a5f 100644 --- a/include/configs/ds414.h +++ b/include/configs/ds414.h @@ -78,7 +78,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40004030 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h deleted file mode 100644 index be03bf1627..0000000000 --- a/include/configs/ecovec.h +++ /dev/null @@ -1,133 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Renesas Solutions ECOVEC board - * - * Copyright (C) 2009 - 2011 Renesas Solutions Corp. - * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com> - * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> - */ - -#ifndef __ECOVEC_H -#define __ECOVEC_H - -/* - * Address Interface BusWidth - *----------------------------------------- - * 0x0000_0000 U-Boot 16bit - * 0x0004_0000 Linux romImage 16bit - * 0x0014_0000 MTD for Linux 16bit - * 0x0400_0000 Internal I/O 16/32bit - * 0x0800_0000 DRAM 32bit - * 0x1800_0000 MFI 16bit - */ - -#define CONFIG_CPU_SH7724 1 - -#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 - -#define CONFIG_DISPLAY_BOARDINFO -#undef CONFIG_SHOW_BOOT_PROGRESS - -/* I2C */ -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_SH -#define CONFIG_SYS_I2C_SLAVE 0x7F -#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2 -#define CONFIG_SYS_I2C_SH_BASE0 0xA4470000 -#define CONFIG_SYS_I2C_SH_SPEED0 100000 -#define CONFIG_SYS_I2C_SH_BASE1 0xA4750000 -#define CONFIG_SYS_I2C_SH_SPEED1 100000 -#define CONFIG_SH_I2C_DATA_HIGH 4 -#define CONFIG_SH_I2C_DATA_LOW 5 -#define CONFIG_SH_I2C_CLOCK 41666666 - -/* Ether */ -#define CONFIG_SH_ETHER_USE_PORT (0) -#define CONFIG_SH_ETHER_PHY_ADDR (0x1f) -#define CONFIG_PHY_SMSC 1 -#define CONFIG_BITBANGMII -#define CONFIG_BITBANGMII_MULTI -#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII - -/* USB / R8A66597 */ -#define CONFIG_USB_R8A66597_HCD -#define CONFIG_R8A66597_BASE_ADDR 0xA4D80000 -#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ -#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ -#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ -#define CONFIG_SUPERH_ON_CHIP_R8A66597 - -/* undef to save memory */ -/* Monitor Command Prompt */ -/* Buffer size for Console output */ -#define CONFIG_SYS_PBSIZE 256 -/* List of legal baudrate settings for this board */ -#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } - -/* SCIF */ -#define CONFIG_SCIF 1 -#define CONFIG_CONS_SCIF0 1 - -/* Suppress display of console information at boot */ - -/* SDRAM */ -#define CONFIG_SYS_SDRAM_BASE (0x88000000) -#define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) - -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024) -/* Enable alternate, more extensive, memory test */ -/* Scratch address used by the alternate memory test */ -#undef CONFIG_SYS_MEMTEST_SCRATCH - -/* Enable temporary baudrate change while serial download */ -#undef CONFIG_SYS_LOADS_BAUD_CHANGE - -/* FLASH */ -#undef CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_BASE (0xA0000000) -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -/* if you use all NOR Flash , you change dip-switch. Please see Manual. */ -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } - -/* Timeout for Flash erase operations (in ms) */ -#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) -/* Timeout for Flash write operations (in ms) */ -#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) -/* Timeout for Flash set sector lock bit operations (in ms) */ -#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) -/* Timeout for Flash clear lock bit operations (in ms) */ -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) - -/* - * Use hardware flash sectors protection instead - * of U-Boot software protection - */ -#undef CONFIG_SYS_DIRECT_FLASH_TFTP - -/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) -/* Monitor size */ -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) -/* Size of DRAM reserved for malloc() use */ -#define CONFIG_SYS_MALLOC_LEN (256 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) - -/* ENV setting */ -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_ENV_SECT_SIZE (128 * 1024) -#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) -/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ -#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) - -/* Board Clock */ -#define CONFIG_SYS_CLK_FREQ 41666666 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ - -#endif /* __ECOVEC_H */ diff --git a/include/configs/edison.h b/include/configs/edison.h index a6155ba5a8..218b50a1d9 100644 --- a/include/configs/edison.h +++ b/include/configs/edison.h @@ -34,7 +34,6 @@ #define CONFIG_ENV_SIZE (64 * 1024) #define CONFIG_ENV_OFFSET (3 * 1024 * 1024) #define CONFIG_ENV_OFFSET_REDUND (6 * 1024 * 1024) -#define CONFIG_SUPPORT_EMMC_BOOT /* RTC */ #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 645fc3ffb8..a608c0f0a5 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -15,7 +15,6 @@ * SPL */ -#define CONFIG_SPL_TEXT_BASE 0xffff0000 #define CONFIG_SPL_MAX_SIZE 0x0000fff0 #define CONFIG_SPL_STACK 0x00020000 #define CONFIG_SPL_BSS_START_ADDR 0x00020000 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 858bed012c..8bc7a3ad2e 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -76,7 +76,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */ #define CONFIG_ENV_OFFSET (6 * 64 * 1024) -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) /* MarSBoard */ #define CONFIG_FDTFILE "imx6q-marsboard.dtb" diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index db1fc934bb..397bbf6d9d 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -44,7 +44,6 @@ /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 -#define CONFIG_SUPPORT_EMMC_BOOT /* specific .lds file */ diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index c3473f7ef8..65da3815fb 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -17,8 +17,6 @@ #define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024) -#define CONFIG_SPL_TEXT_BASE 0x02023400 - #define CONFIG_IRAM_STACK 0x02050000 #define CONFIG_SYS_INIT_SP_ADDR CONFIG_IRAM_STACK diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 3738c78d25..2d362f3961 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -17,11 +17,6 @@ #define CONFIG_VAR_SIZE_SPL -#ifdef CONFIG_VAR_SIZE_SPL -#define CONFIG_SPL_TEXT_BASE 0x02024410 -#else -#define CONFIG_SPL_TEXT_BASE 0x02024400 -#endif #define CONFIG_IRAM_TOP 0x02074000 #define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024) diff --git a/include/configs/gardena-smart-gateway-at91sam.h b/include/configs/gardena-smart-gateway-at91sam.h index e9a06e6d00..02bf4d195f 100644 --- a/include/configs/gardena-smart-gateway-at91sam.h +++ b/include/configs/gardena-smart-gateway-at91sam.h @@ -50,7 +50,6 @@ #define CONFIG_ENV_SIZE (64 << 10) /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x7000 #define CONFIG_SPL_STACK 0x308000 diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index 196f114c60..0481ed06a9 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -19,9 +19,6 @@ #define CONFIG_MXC_UART_BASE UART3_BASE #define CONSOLE_DEV "ttymxc2" -#define CONFIG_SUPPORT_EMMC_BOOT - - #include "mx6_common.h" #include <linux/sizes.h> diff --git a/include/configs/gose.h b/include/configs/gose.h index 8f0e378488..0de0a362e3 100644 --- a/include/configs/gose.h +++ b/include/configs/gose.h @@ -38,7 +38,6 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h new file mode 100644 index 0000000000..01704d84c2 --- /dev/null +++ b/include/configs/grpeach.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration settings for the Renesas GRPEACH board + * + * Copyright (C) 2017-2019 Renesas Electronics + */ + +#ifndef __GRPEACH_H +#define __GRPEACH_H + +/* Board Clock , P1 clock frequency (XTAL=13.33MHz) */ +#define CONFIG_SYS_CLK_FREQ 66666666 + +/* Serial Console */ +#define CONFIG_BAUDRATE 115200 + +/* Miscellaneous */ +#define CONFIG_SYS_PBSIZE 256 +#define CONFIG_SYS_ARM_CACHE_WRITETHROUGH +#define CONFIG_CMDLINE_TAG +#define CONFIG_ARCH_CPU_INIT + +/* Internal RAM Size (RZ/A1=3M, RZ/A1M=5M, RZ/A1H=10M) */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE (10 * 1024 * 1024) +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 1024 * 1024) +#define CONFIG_SYS_LOAD_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) + +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_SECT_SIZE (64 * 1024) +#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) +#define CONFIG_ENV_OFFSET 0xc0000 + +/* Malloc */ +#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) + +/* Kernel Boot */ +#define CONFIG_BOOTARGS "ignore_loglevel" + +/* Network interface */ +#define CONFIG_SH_ETHER_USE_PORT 0 +#define CONFIG_SH_ETHER_PHY_ADDR 0 +#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII +#define CONFIG_SH_ETHER_CACHE_WRITEBACK +#define CONFIG_SH_ETHER_CACHE_INVALIDATE +#define CONFIG_SH_ETHER_ALIGNE_SIZE 64 +#define CONFIG_BITBANGMII +#define CONFIG_BITBANGMII_MULTI + +#endif /* __GRPEACH_H */ diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 93608e5aec..02ceb4c8fc 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -81,9 +81,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -/* eMMC Configs */ -#define CONFIG_SUPPORT_EMMC_BOOT - /* * SATA Configs */ diff --git a/include/configs/helios4.h b/include/configs/helios4.h index b2badab15e..e03d8409ad 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -87,7 +87,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index ad45b106b0..dbf566522f 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -46,11 +46,11 @@ "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ "mmcargs=setenv bootargs console=${console},${baudrate}" \ - " root=PARTUUID=${uuid} rootwait rw\0 ${mtdparts}\0" \ + " root=PARTUUID=${uuid} rootwait rw ${mtdparts} ${optargs}\0" \ "nandargs=setenv bootargs console=${console},${baudrate}" \ - " ubi.mtd=fs root=${nandroot} ${mtdparts}\0" \ + " ubi.mtd=fs root=${nandroot} ${mtdparts} ${optargs}\0" \ "ramargs=setenv bootargs console=${console},${baudrate}" \ - " root=/dev/ram rw ${mtdparts}\0" \ + " root=/dev/ram rw ${mtdparts} ${optargs}\0" \ "loadbootscript=" \ "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ "bootscript=echo Running bootscript from mmc ...;" \ diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 3d9a7dc902..212dee7f28 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -20,7 +20,6 @@ * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 * or 64KB */ -#define CONFIG_SPL_TEXT_BASE 0x00908000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_STACK 0x0091FFB8 /* diff --git a/include/configs/imx6dl-mamoj.h b/include/configs/imx6dl-mamoj.h index 030dbedce8..7605e145c2 100644 --- a/include/configs/imx6dl-mamoj.h +++ b/include/configs/imx6dl-mamoj.h @@ -51,7 +51,6 @@ /* MMC */ #define CONFIG_SYS_MMC_ENV_DEV 2 -#define CONFIG_SUPPORT_EMMC_BOOT /* Ethernet */ #define CONFIG_FEC_MXC_PHYADDR 1 diff --git a/include/configs/imx7_spl.h b/include/configs/imx7_spl.h index aca32dbabd..7ef7017f51 100644 --- a/include/configs/imx7_spl.h +++ b/include/configs/imx7_spl.h @@ -21,7 +21,6 @@ * and some padding thus 'our' max size is really 0x00946BB8 - 0x00911000. * 64KB is more then enough for the SPL. */ -#define CONFIG_SPL_TEXT_BASE 0x00911000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_STACK 0x00946BB8 /* diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 6094d1bf18..7759bbf264 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -13,7 +13,6 @@ #define CONFIG_CSF_SIZE 0x2000 /* 8K region */ #endif -#define CONFIG_SPL_TEXT_BASE 0x7E1000 #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR @@ -225,7 +224,6 @@ #define CONFIG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_MXC_GPIO diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h new file mode 100644 index 0000000000..02c5d1c054 --- /dev/null +++ b/include/configs/imx8qm_mek.h @@ -0,0 +1,176 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2018 NXP + */ + +#ifndef __IMX8QM_MEK_H +#define __IMX8QM_MEK_H + +#include <linux/sizes.h> +#include <asm/arch/imx-regs.h> + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SPL_TEXT_BASE 0x0 +#define CONFIG_SPL_MAX_SIZE (124 * 1024) +#define CONFIG_SYS_MONITOR_LEN (1024 * 1024) +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x800 +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 0 + +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds" +#define CONFIG_SPL_STACK 0x013E000 +#define CONFIG_SPL_BSS_START_ADDR 0x00128000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */ +#define CONFIG_SYS_SPL_MALLOC_START 0x00120000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x3000 /* 12 KB */ +#define CONFIG_SERIAL_LPUART_BASE 0x5a060000 +#define CONFIG_SYS_ICACHE_OFF +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_MALLOC_F_ADDR 0x00120000 + +#define CONFIG_SPL_RAW_IMAGE_ARM_TRUSTED_FIRMWARE + +#define CONFIG_SPL_ABORT_ON_RAW_IMAGE + +#define CONFIG_OF_EMBED +#endif + +#define CONFIG_REMAKE_ELF + +#define CONFIG_BOARD_EARLY_INIT_F + +/* Flat Device Tree Definitions */ +#define CONFIG_OF_BOARD_SETUP + +#undef CONFIG_CMD_EXPORTENV +#undef CONFIG_CMD_IMPORTENV +#undef CONFIG_CMD_IMLS + +#undef CONFIG_CMD_CRC32 +#undef CONFIG_BOOTM_NETBSD + +#define CONFIG_FSL_ESDHC +#define CONFIG_FSL_USDHC +#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define USDHC1_BASE_ADDR 0x5B010000 +#define USDHC2_BASE_ADDR 0x5B020000 +#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ + +#define CONFIG_ENV_OVERWRITE + +#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG + +/* Initial environment variables */ +#define CONFIG_EXTRA_ENV_SETTINGS \ + "script=boot.scr\0" \ + "image=Image\0" \ + "panel=NULL\0" \ + "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \ + "fdt_addr=0x83000000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "boot_fdt=try\0" \ + "fdt_file=fsl-imx8qxp-mek.dtb\0" \ + "initrd_addr=0x83800000\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ + "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \ + "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \ + "mmcautodetect=yes\0" \ + "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \ + "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ + "bootscript=echo Running bootscript from mmc ...; " \ + "source\0" \ + "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ + "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ + "mmcboot=echo Booting from mmc ...; " \ + "run mmcargs; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if run loadfdt; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "echo wait for boot; " \ + "fi;\0" \ + "netargs=setenv bootargs console=${console} " \ + "root=/dev/nfs " \ + "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ + "netboot=echo Booting from net ...; " \ + "run netargs; " \ + "if test ${ip_dyn} = yes; then " \ + "setenv get_cmd dhcp; " \ + "else " \ + "setenv get_cmd tftp; " \ + "fi; " \ + "${get_cmd} ${loadaddr} ${image}; " \ + "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ + "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ + "booti ${loadaddr} - ${fdt_addr}; " \ + "else " \ + "echo WARN: Cannot load the DT; " \ + "fi; " \ + "else " \ + "booti; " \ + "fi;\0" + +#define CONFIG_BOOTCOMMAND \ + "mmc dev ${mmcdev}; if mmc rescan; then " \ + "if run loadbootscript; then " \ + "run bootscript; " \ + "else " \ + "if run loadimage; then " \ + "run mmcboot; " \ + "else run netboot; " \ + "fi; " \ + "fi; " \ + "else booti ${loadaddr} - ${fdt_addr}; fi" + +/* Link Definitions */ +#define CONFIG_LOADADDR 0x80280000 + +#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR + +#define CONFIG_SYS_INIT_SP_ADDR 0x80200000 + +/* Default environment is in SD */ +#define CONFIG_ENV_SIZE 0x1000 +#define CONFIG_ENV_OFFSET (64 * SZ_64K) +#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */ + +#define CONFIG_SYS_MMC_IMG_LOAD_PART 1 + +/* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */ +#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */ +#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */ +#define CONFIG_SYS_FSL_USDHC_NUM 2 + +/* Size of malloc() pool */ +#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024) + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define PHYS_SDRAM_1 0x80000000 +#define PHYS_SDRAM_2 0x880000000 +#define PHYS_SDRAM_1_SIZE 0x80000000 /* 2 GB */ +#define PHYS_SDRAM_2_SIZE 0x100000000 /* 4 GB */ + +/* Serial */ +#define CONFIG_BAUDRATE 115200 + +/* Monitor Command Prompt */ +#define CONFIG_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#define CONFIG_SYS_CBSIZE 2048 +#define CONFIG_SYS_MAXARGS 64 +#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) + +/* Generic Timer Definitions */ +#define COUNTER_FREQUENCY 8000000 /* 8MHz */ + +/* Networking */ +#define CONFIG_FEC_XCV_TYPE RGMII +#define FEC_QUIRK_ENET_MAC + +#endif /* __IMX8QM_MEK_H */ diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h index 312e30dc6c..40163c8d50 100644 --- a/include/configs/imx8qxp_mek.h +++ b/include/configs/imx8qxp_mek.h @@ -10,7 +10,6 @@ #include <asm/arch/imx-regs.h> #ifdef CONFIG_SPL_BUILD -#define CONFIG_SPL_TEXT_BASE 0x0 #define CONFIG_SPL_MAX_SIZE (124 * 1024) #define CONFIG_SYS_MONITOR_LEN (1024 * 1024) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR @@ -54,7 +53,6 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_ENV_OVERWRITE @@ -65,11 +63,11 @@ "script=boot.scr\0" \ "image=Image\0" \ "panel=NULL\0" \ - "console=ttyLP0,${baudrate} earlycon=lpuart32,0x5a060000,${baudrate}\0" \ + "console=ttyLP0,${baudrate} earlycon\0" \ "fdt_addr=0x83000000\0" \ "fdt_high=0xffffffffffffffff\0" \ "boot_fdt=try\0" \ - "fdt_file=fsl-imx8qxp-mek.dtb\0" \ + "fdt_file=imx8qxp-mek.dtb\0" \ "initrd_addr=0x83800000\0" \ "initrd_high=0xffffffffffffffff\0" \ "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \ @@ -159,7 +157,6 @@ #define CONFIG_BAUDRATE 115200 /* Monitor Command Prompt */ -#define CONFIG_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " #define CONFIG_SYS_CBSIZE 2048 #define CONFIG_SYS_MAXARGS 64 diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index df9a8a0881..e4e8e2ad7a 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -212,7 +212,6 @@ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_SIZE 0x20000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 diff --git a/include/configs/kc1.h b/include/configs/kc1.h index 9b1149b190..59814b5514 100644 --- a/include/configs/kc1.h +++ b/include/configs/kc1.h @@ -70,7 +70,6 @@ * SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h index 33c8bd4149..c42139dc3a 100644 --- a/include/configs/koelsch.h +++ b/include/configs/koelsch.h @@ -38,7 +38,6 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h index 3ea75fa120..a252e9003d 100644 --- a/include/configs/kp_imx53.h +++ b/include/configs/kp_imx53.h @@ -15,14 +15,7 @@ /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M) -/* MMC Configs */ -#define CONFIG_FSL_ESDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_ESDHC_NUM 1 - /* USB Configs */ -#define CONFIG_USB_EHCI_MX5 -#define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 @@ -57,7 +50,7 @@ "setexpr blkc ${blkc} + 1; " \ "mmc write ${loadaddr} 0x2 ${blkc}" \ "; fi\0" \ - "upwic=setenv wic_file kp-image-kp${boardsoc}${boardtype}.wic; "\ + "upwic=setenv wic_file kp-image-kp${boardsoc}.wic; "\ "if tftp ${loadaddr} ${wic_file}; then " \ "setexpr blkc ${filesize} / 0x200; " \ "setexpr blkc ${blkc} + 1; " \ diff --git a/include/configs/lager.h b/include/configs/lager.h index 89c5d01d3c..5acd5a2118 100644 --- a/include/configs/lager.h +++ b/include/configs/lager.h @@ -39,7 +39,6 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/libretech-ac.h b/include/configs/libretech-ac.h new file mode 100644 index 0000000000..419dc61587 --- /dev/null +++ b/include/configs/libretech-ac.h @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for LibreTech AC + * + * Copyright (C) 2017 Baylibre, SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define CONFIG_ENV_OFFSET (-0x10000) + +#define BOOT_TARGET_DEVICES(func) \ + func(ROMUSB, romusb, na) \ + func(MMC, mmc, 0) \ + BOOT_TARGET_DEVICES_USB(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#include <configs/meson64.h> + +#endif /* __CONFIG_H */ diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index a97ccb50b2..975f32474c 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -24,7 +24,6 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT #endif #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h index 4af3988886..ee570bc1a9 100644 --- a/include/configs/ls1021aiot.h +++ b/include/configs/ls1021aiot.h @@ -69,7 +69,6 @@ #define CONFIG_SPL_MMC_SUPPORT #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0xe8 -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index d75ac4e57e..3cbbd73920 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -51,7 +51,6 @@ unsigned long get_board_ddr_clk(void); board/freescale/ls1021aqds/ls102xa_rcw_sd_ifc.cfg #endif -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 @@ -67,7 +66,6 @@ unsigned long get_board_ddr_clk(void); #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_FSL_PBL_RCW board/freescale/ls1021aqds/ls102xa_rcw_nand.cfg -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index da55bf2f43..7fe7bab8e4 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -74,7 +74,6 @@ #define CONFIG_U_BOOT_HDR_SIZE (16 << 10) #endif /* ifdef CONFIG_SECURE_BOOT */ -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SPL_PAD_TO 0x1c000 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 2e9d476483..dc688f3af5 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -64,7 +64,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x17000 #define CONFIG_SPL_STACK 0x1001e000 #define CONFIG_SPL_PAD_TO 0x1d000 @@ -92,7 +91,6 @@ /* NAND SPL */ #ifdef CONFIG_NAND_BOOT #define CONFIG_SPL_PBL_PAD -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1a000 #define CONFIG_SPL_STACK 0x1001d000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 24ff2d1547..ea6209ad2e 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -63,7 +63,6 @@ /* SD boot SPL */ #ifdef CONFIG_SD_BOOT -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1f000 /* 124 KiB */ #define CONFIG_SPL_STACK 0x10020000 #define CONFIG_SPL_PAD_TO 0x21000 /* 132 KiB */ @@ -89,7 +88,6 @@ #if defined(CONFIG_QSPI_BOOT) && defined(CONFIG_SPL) #define CONFIG_SPL_TARGET "spl/u-boot-spl.pbl" -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x1f000 #define CONFIG_SPL_STACK 0x10020000 #define CONFIG_SPL_PAD_TO 0x20000 @@ -114,7 +112,6 @@ #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_DRIVERS_MISC_SUPPORT -#define CONFIG_SPL_TEXT_BASE 0x10000000 #define CONFIG_SPL_MAX_SIZE 0x17000 /* 90 KiB */ #define CONFIG_SPL_STACK 0x1001f000 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 50c18f1542..e8e1dc2d92 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -228,7 +228,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0x1800a000 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00100000 #define CONFIG_SYS_SPL_MALLOC_START 0x80200000 diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 454c9e94b6..c7d8a3b6eb 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -208,7 +208,6 @@ unsigned long long get_qixis_addr(void); #define CONFIG_SPL_MAX_SIZE 0x16000 #define CONFIG_SPL_STACK (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0) #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0x1800a000 #ifdef CONFIG_NAND_BOOT #define CONFIG_SYS_NAND_U_BOOT_DST 0x80400000 diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index 84d061339e..fc0b1f480c 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -118,7 +118,6 @@ * USB */ #ifdef CONFIG_CMD_USB -#define CONFIG_USB_EHCI_MX5 #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 @@ -175,7 +174,6 @@ * NAND SPL */ #define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" -#define CONFIG_SPL_TEXT_BASE 0x70008000 #define CONFIG_SPL_PAD_TO 0x8000 #define CONFIG_SPL_STACK 0x70004000 diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index fada0ca78d..a017d92cc9 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -58,7 +58,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40004030 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) diff --git a/include/configs/mcx.h b/include/configs/mcx.h index 5f7423b717..411c27c4a8 100644 --- a/include/configs/mcx.h +++ b/include/configs/mcx.h @@ -246,7 +246,6 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK diff --git a/include/configs/mt7623.h b/include/configs/mt7623.h index e449364ad4..5f67893f31 100644 --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h @@ -42,7 +42,6 @@ /* MMC */ #define MMC_SUPPORTS_TUNING -#define CONFIG_SUPPORT_EMMC_BOOT /* DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x80000000 diff --git a/include/configs/mt7629.h b/include/configs/mt7629.h index 9910d8c89a..6e9b868aa4 100644 --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h @@ -33,7 +33,6 @@ /* Defines for SPL */ #define CONFIG_SPL_STACK 0x106000 -#define CONFIG_SPL_TEXT_BASE 0x201000 #define CONFIG_SPL_MAX_SIZE SZ_64K #define CONFIG_SPL_MAX_FOOTPRINT SZ_64K #define CONFIG_SPL_PAD_TO 0x10000 diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h index 993d131e96..04e3b8ff28 100644 --- a/include/configs/mx31pdk.h +++ b/include/configs/mx31pdk.h @@ -25,8 +25,6 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_SIZE 2048 -#define CONFIG_SPL_TEXT_BASE 0x87dc0000 - #ifndef CONFIG_SPL_BUILD #define CONFIG_SKIP_LOWLEVEL_INIT #endif diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index 9bf9773c69..f5fd01de22 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -61,7 +61,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1F /* USB Configs */ -#define CONFIG_USB_EHCI_MX5 #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI #define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index 1e3ea88b77..9bf5d9169b 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -41,7 +41,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1F /* USB Configs */ -#define CONFIG_USB_EHCI_MX5 #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 2d18f05423..4f179081a8 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -38,7 +38,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1F /* USB Configs */ -#define CONFIG_USB_EHCI_MX5 #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h index f002324fdd..2d6715cba2 100644 --- a/include/configs/mx53ppd.h +++ b/include/configs/mx53ppd.h @@ -37,7 +37,6 @@ #define CONFIG_FEC_MXC_PHYADDR 0x1F /* USB Configs */ -#define CONFIG_USB_EHCI_MX5 #define CONFIG_USB_HOST_ETHER #define CONFIG_USB_ETHER_ASIX #define CONFIG_USB_ETHER_MCS7830 diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 555942a2c2..ec1537541a 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -16,8 +16,6 @@ #define CONFIG_MXC_UART_BASE UART1_BASE #define CONSOLE_DEV "ttymxc0" -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - #include "mx6sabre_common.h" /* Falcon Mode */ diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h index 39d29de744..77856a8f3a 100644 --- a/include/configs/mx7dsabresd.h +++ b/include/configs/mx7dsabresd.h @@ -38,7 +38,6 @@ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #ifdef CONFIG_IMX_BOOTAUX diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index b8dcaa1036..5bd6392973 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -28,7 +28,6 @@ #define IOMUXC_BASE_ADDR IOMUXC1_RBASE #define CONFIG_FSL_USDHC -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SYS_FSL_USDHC_NUM 1 diff --git a/include/configs/mxs.h b/include/configs/mxs.h index 217167a21e..cc5d4c85fe 100644 --- a/include/configs/mxs.h +++ b/include/configs/mxs.h @@ -80,7 +80,6 @@ * As for the SPL, we must avoid the first 4 KiB as well, but we load the * IVT and CST to 0x8000, so we don't need to waste the subsequent 4 KiB. */ -#define CONFIG_SPL_TEXT_BASE 0x00001000 /* U-Boot general configuration */ #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 7698a90c4e..f0c8c990fa 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -17,8 +17,6 @@ * We are only ever GP parts and will utilize all of the "downloaded image" * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 07bcbc6f4e..5b9d8a57e3 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -22,8 +22,6 @@ * We are only ever GP parts and will utilize all of the "downloaded image" * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_CMDLINE_TAG #define CONFIG_SETUP_MEMORY_TAGS diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h index 521e1675e0..23d12c6a4e 100644 --- a/include/configs/omap3_igep00x0.h +++ b/include/configs/omap3_igep00x0.h @@ -15,8 +15,6 @@ * We are only ever GP parts and will utilize all of the "downloaded image" * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_REVISION_TAG 1 diff --git a/include/configs/omap3_logic.h b/include/configs/omap3_logic.h index fe557f91ca..e318a9f896 100644 --- a/include/configs/omap3_logic.h +++ b/include/configs/omap3_logic.h @@ -19,8 +19,6 @@ * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB) in * order to allow for BCH8 to fit in. */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS @@ -67,7 +65,7 @@ "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ "mmcdev=0\0" \ - "mmcroot=/dev/mmcblk0p2 rw\0" \ + "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \ "mmcrootfstype=ext4 rootwait\0" \ "nandroot=ubi0:rootfs rw ubi.mtd=fs noinitrd\0" \ "nandrootfstype=ubifs rootwait\0" \ @@ -106,7 +104,8 @@ "ramargs=setenv bootargs "\ "root=/dev/ram rw ramdisk_size=${ramdisksize}\0" \ "mmcargs=setenv bootargs "\ - "root=${mmcroot} rootfstype=${mmcrootfstype}\0" \ + "root=PARTUUID=${uuid} " \ + "rootfstype=${mmcrootfstype} rw\0" \ "nandargs=setenv bootargs "\ "root=${nandroot} " \ "rootfstype=${nandrootfstype}\0" \ @@ -120,6 +119,7 @@ "loadfdt=mmc rescan; " \ "load mmc ${mmcdev} ${fdtaddr} ${fdtimage}\0" \ "mmcbootcommon=echo Booting with DT from mmc${mmcdev} ...; " \ + "run finduuid; "\ "run mmcargs; " \ "run common_bootargs; " \ "run dump_bootargs; " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 35f3af4ae9..ea941dbb81 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -11,8 +11,6 @@ * We are only ever GP parts and will utilize all of the "downloaded image" * area in SRAM which starts at 0x40200000 and ends at 0x4020FFFF (64KB). */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x40200000 /* call misc_init_r */ diff --git a/include/configs/omap5_uevm.h b/include/configs/omap5_uevm.h index 66bd288040..0d8f945349 100644 --- a/include/configs/omap5_uevm.h +++ b/include/configs/omap5_uevm.h @@ -39,7 +39,6 @@ /* Enhance our eMMC support / experience. */ #define CONFIG_HSMMC2_8BIT -#define CONFIG_SUPPORT_EMMC_BOOT /* Required support for the TCA642X GPIO we have on the uEVM */ #define CONFIG_TCA642X diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 6680c3e503..da615e5063 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -270,7 +270,6 @@ CONFIG_SYS_MALLOC_LEN) #define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN #define CONFIG_SPL_STACK 0x8001ff00 -#define CONFIG_SPL_TEXT_BASE 0x80000000 #define CONFIG_SPL_MAX_FOOTPRINT 32768 #define CONFIG_SPL_PAD_TO 32768 #endif diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 17611bc568..62d8862cc7 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -41,8 +41,7 @@ * it has to be rounded to sector size */ #define CONFIG_ENV_SIZE 0x20000 /* 128k */ -#define CONFIG_ENV_ADDR 0x60000 -#define CONFIG_ENV_OFFSET 0x60000 /* env starts here */ +#define CONFIG_ENV_OFFSET 0x80000 /* env starts here */ /* * Environment is right behind U-Boot in flash. Make sure U-Boot * doesn't grow into the environment area. diff --git a/include/configs/opos6uldev.h b/include/configs/opos6uldev.h index 70cf4665df..e0c76ff43d 100644 --- a/include/configs/opos6uldev.h +++ b/include/configs/opos6uldev.h @@ -33,9 +33,6 @@ #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) -/* MMC */ -#define CONFIG_SUPPORT_EMMC_BOOT - /* USB */ #ifdef CONFIG_USB_EHCI_MX6 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/origen.h b/include/configs/origen.h index 1acc42f964..1075084ba3 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -44,7 +44,6 @@ /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 -#define CONFIG_SPL_TEXT_BASE 0x02021410 #define CONFIG_EXTRA_ENV_SETTINGS \ "loadaddr=0x40007000\0" \ diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 8fa91fb81d..8c870b00e8 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -137,7 +137,6 @@ #ifdef CONFIG_SDCARD #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) @@ -156,7 +155,6 @@ #define CONFIG_SPL_SPI_FLASH_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xf8f81000 #define CONFIG_SPL_PAD_TO 0x20000 #define CONFIG_SPL_MAX_SIZE (128 * 1024) #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) @@ -188,7 +186,6 @@ #define CONFIG_SPL_INIT_MINIMAL #define CONFIG_SPL_FLUSH_IMAGE #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" -#define CONFIG_SPL_TEXT_BASE 0xff800000 #define CONFIG_SPL_MAX_SIZE 4096 #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 4ceab519cb..12d8d67f0f 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -21,8 +21,6 @@ * * Tweak the SPL text base address to avoid this. */ -#undef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE 0x00909000 /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) diff --git a/include/configs/pengwyn.h b/include/configs/pengwyn.h index 48f1f7bacc..a535d0c2f2 100644 --- a/include/configs/pengwyn.h +++ b/include/configs/pengwyn.h @@ -157,7 +157,6 @@ * board schematic and physical port wired to each. Then for host we * add mass storage support. */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL #define CONFIG_AM335X_USB1 diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index 050f69801b..cd051bf263 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -41,7 +41,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT /* USB Configs */ #define CONFIG_EHCI_HCD_INIT_AFTER_RESET diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 0f6d6b7894..365a5984e4 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -46,7 +46,7 @@ #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ "spl raw 0x2 0x400;" \ - "u-boot raw 0x8a 0x400;" \ + "u-boot raw 0x8a 0x1000;" \ "/boot/zImage ext4 0 1;" \ "/boot/imx7d-pico-hobbit.dtb ext4 0 1;" \ "/boot/imx7d-pico-pi.dtb ext4 0 1;" \ @@ -58,7 +58,6 @@ "bootmenu_1=Boot using PICO-Pi baseboard=" \ "setenv fdtfile imx7d-pico-pi.dtb\0" \ -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/picosam9g45.h b/include/configs/picosam9g45.h index c2882e6daf..ad41d16149 100644 --- a/include/configs/picosam9g45.h +++ b/include/configs/picosam9g45.h @@ -104,7 +104,6 @@ #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x010000 #define CONFIG_SPL_STACK 0x310000 diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h index e34873cea7..ae87f9be79 100644 --- a/include/configs/pm9g45.h +++ b/include/configs/pm9g45.h @@ -87,7 +87,6 @@ 128 * 1024, 0x1000) /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x010000 #define CONFIG_SPL_STACK 0x310000 diff --git a/include/configs/porter.h b/include/configs/porter.h index 9950f80afd..1db28869cd 100644 --- a/include/configs/porter.h +++ b/include/configs/porter.h @@ -43,7 +43,6 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index 4b9ddd6f25..64e7a60b8a 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -33,13 +33,6 @@ #define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 #define CONFIG_ATAPI -/* SPI is not supported */ - -#define CONFIG_SPL_TEXT_BASE 0xfffd0000 - -#define BOOT_DEVICE_SPI 10 - #define CONFIG_SPL_BOARD_LOAD_IMAGE -#define BOOT_DEVICE_BOARD 11 #endif /* __CONFIG_H */ diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h index 50c6b560d0..f5d09d18e5 100644 --- a/include/configs/rk3036_common.h +++ b/include/configs/rk3036_common.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_RK3036_COMMON_H #define __CONFIG_RK3036_COMMON_H -#include <asm/arch/hardware.h> +#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" #define CONFIG_SYS_MALLOC_LEN (32 << 20) @@ -19,7 +19,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10081fff -#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (4 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK30" diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index 208ca5ab74..1d41702846 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -8,7 +8,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 -#include <asm/arch/hardware.h> +#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY @@ -26,7 +26,6 @@ #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (0x8000 - 0x800) #define CONFIG_ROCKCHIP_CHIP_TAG "RK31" -#define CONFIG_SPL_TEXT_BASE 0x10080800 /* spl size 32kb sram - 2kb bootrom */ #define CONFIG_SPL_MAX_SIZE (0x8000 - 0x800) #define CONFIG_ROCKCHIP_SERIAL 1 diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h index e72aa8d2d3..3a96748f6b 100644 --- a/include/configs/rk322x_common.h +++ b/include/configs/rk322x_common.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_RK322X_COMMON_H #define __CONFIG_RK322X_COMMON_H -#include <asm/arch/hardware.h> +#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" #define CONFIG_SKIP_LOWLEVEL_INIT @@ -20,7 +20,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x60100000 #define CONFIG_SYS_LOAD_ADDR 0x60800800 #define CONFIG_SPL_STACK 0x10088000 -#define CONFIG_SPL_TEXT_BASE 0x10081000 #define CONFIG_ROCKCHIP_MAX_INIT_SIZE (28 << 10) #define CONFIG_ROCKCHIP_CHIP_TAG "RK32" diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h index 72a54bc0ab..7c79ed6138 100644 --- a/include/configs/rk3288_common.h +++ b/include/configs/rk3288_common.h @@ -6,7 +6,7 @@ #ifndef __CONFIG_RK3288_COMMON_H #define __CONFIG_RK3288_COMMON_H -#include <asm/arch/hardware.h> +#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY @@ -23,11 +23,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00100000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff718000 -#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BOOTROM_SUPPORT) -# define CONFIG_SPL_TEXT_BASE 0x0 -#else -# define CONFIG_SPL_TEXT_BASE 0xff704000 -#endif /* RAW SD card / eMMC locations. */ #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 88c1af0974..bb2e96ba05 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -10,7 +10,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 64 -#include <asm/arch/hardware.h> +#include <asm/arch-rockchip/hardware.h> #include <linux/sizes.h> #define CONFIG_SYS_SDRAM_BASE 0 @@ -27,7 +27,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00280000 -#define CONFIG_SPL_TEXT_BASE 0x00000000 #define CONFIG_SPL_MAX_SIZE 0x40000 #define CONFIG_SPL_BSS_START_ADDR 0x400000 #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 diff --git a/include/configs/rk3399_common.h b/include/configs/rk3399_common.h index b412012582..e7ae2c4640 100644 --- a/include/configs/rk3399_common.h +++ b/include/configs/rk3399_common.h @@ -19,7 +19,6 @@ #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 #define CONFIG_SYS_LOAD_ADDR 0x00800800 #define CONFIG_SPL_STACK 0xff8effff -#define CONFIG_SPL_TEXT_BASE 0xff8c2000 #define CONFIG_SPL_MAX_SIZE 0x30000 - 0x2000 /* BSS setup */ #define CONFIG_SPL_BSS_START_ADDR 0xff8e0000 diff --git a/include/configs/rv1108_common.h b/include/configs/rv1108_common.h index 952ea9fdca..6f61f01538 100644 --- a/include/configs/rv1108_common.h +++ b/include/configs/rv1108_common.h @@ -5,7 +5,7 @@ #ifndef __CONFIG_RV1108_COMMON_H #define __CONFIG_RV1108_COMMON_H -#include <asm/arch/hardware.h> +#include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" #define CONFIG_SYS_MALLOC_LEN (32 << 20) diff --git a/include/configs/sama5d27_som1_ek.h b/include/configs/sama5d27_som1_ek.h index ae51aea2e8..5f6979cd77 100644 --- a/include/configs/sama5d27_som1_ek.h +++ b/include/configs/sama5d27_som1_ek.h @@ -56,7 +56,6 @@ #endif /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x200000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h new file mode 100644 index 0000000000..5c54a9c061 --- /dev/null +++ b/include/configs/sama5d2_icp.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration file for the SAMA5D2 ICP Board. + * + * Copyright (C) 2018 Microchip Corporation + * Eugen Hristev <eugen.hristev@microchip.com> + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include "at91-sama5_common.h" + +#undef CONFIG_SYS_AT91_MAIN_CLOCK +#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ + +#define CONFIG_MISC_INIT_R + +/* SDRAM */ +#define CONFIG_SYS_SDRAM_BASE 0x20000000 +#define CONFIG_SYS_SDRAM_SIZE 0x20000000 + +#ifdef CONFIG_SPL_BUILD +#define CONFIG_SYS_INIT_SP_ADDR 0x218000 +#else +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE) +#endif + +#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ + +/* NAND flash */ +#undef CONFIG_CMD_NAND + +/* SPI flash */ +#define CONFIG_SF_DEFAULT_SPEED 66000000 + +#undef CONFIG_BOOTCOMMAND +#ifdef CONFIG_SD_BOOT +/* u-boot env in sd/mmc card */ +#define FAT_ENV_INTERFACE "mmc" +#define FAT_ENV_DEVICE_AND_PART "0" +#define FAT_ENV_FILE "uboot.env" +#define CONFIG_ENV_SIZE 0x4000 +/* bootstrap + u-boot + env in sd card */ +#define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 at91-sama5d2_icp.dtb; " \ + "fatload mmc 0:1 0x22000000 zImage; " \ + "bootz 0x22000000 - 0x21000000" +#undef CONFIG_BOOTARGS +#define CONFIG_BOOTARGS \ + "console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait" +#endif + +/* SPL */ +#define CONFIG_SPL_MAX_SIZE 0x10000 +#define CONFIG_SPL_BSS_START_ADDR 0x20000000 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 +#define CONFIG_SYS_SPL_MALLOC_START 0x20080000 +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 + +#define CONFIG_SYS_MONITOR_LEN (512 << 10) + +#ifdef CONFIG_SD_BOOT +#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 +#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" +#endif + +#endif diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h index a3df404ca0..e522740e0c 100644 --- a/include/configs/sama5d2_xplained.h +++ b/include/configs/sama5d2_xplained.h @@ -47,7 +47,6 @@ #endif /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x200000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/sama5d3_xplained.h b/include/configs/sama5d3_xplained.h index 8a9a19d38e..696933da73 100644 --- a/include/configs/sama5d3_xplained.h +++ b/include/configs/sama5d3_xplained.h @@ -58,7 +58,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h index 3870671850..db840e927e 100644 --- a/include/configs/sama5d3xek.h +++ b/include/configs/sama5d3xek.h @@ -72,7 +72,6 @@ #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/sama5d4_xplained.h b/include/configs/sama5d4_xplained.h index d8b61a696c..5e6f59f756 100644 --- a/include/configs/sama5d4_xplained.h +++ b/include/configs/sama5d4_xplained.h @@ -36,7 +36,6 @@ #endif /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x200000 #define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/sama5d4ek.h b/include/configs/sama5d4ek.h index 8bfda3ff7a..c1f22f7016 100644 --- a/include/configs/sama5d4ek.h +++ b/include/configs/sama5d4ek.h @@ -36,7 +36,6 @@ #endif /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x200000 #define CONFIG_SPL_MAX_SIZE 0x18000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index e36a5fec0e..bf03baefe8 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -8,11 +8,11 @@ #ifdef FTRACE #define CONFIG_TRACE +#define CONFIG_CMD_TRACE #define CONFIG_TRACE_BUFFER_SIZE (16 << 20) -#define CONFIG_TRACE_EARLY_SIZE (8 << 20) +#define CONFIG_TRACE_EARLY_SIZE (16 << 20) #define CONFIG_TRACE_EARLY #define CONFIG_TRACE_EARLY_ADDR 0x00100000 - #endif #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h deleted file mode 100644 index f27f665fb6..0000000000 --- a/include/configs/sh7785lcr.h +++ /dev/null @@ -1,128 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Configuation settings for the Renesas Technology R0P7785LC0011RL board - * - * Copyright (C) 2008 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> - */ - -#ifndef __SH7785LCR_H -#define __SH7785LCR_H - -#define CONFIG_CPU_SH7785 1 - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "bootdevice=0:1\0" \ - "usbload=usb reset;usbboot;usb stop;bootm\0" - -#define CONFIG_DISPLAY_BOARDINFO -#undef CONFIG_SHOW_BOOT_PROGRESS - -/* MEMORY */ -#if defined(CONFIG_SH_32BIT) -/* 0x40000000 - 0x47FFFFFF does not use */ -#define CONFIG_SH_SDRAM_OFFSET (0x8000000) -#define SH7785LCR_SDRAM_PHYS_BASE (0x40000000 + CONFIG_SH_SDRAM_OFFSET) -#define SH7785LCR_SDRAM_BASE (0x80000000 + CONFIG_SH_SDRAM_OFFSET) -#define SH7785LCR_SDRAM_SIZE (384 * 1024 * 1024) -#define SH7785LCR_FLASH_BASE_1 (0xa0000000) -#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) -#define SH7785LCR_USB_BASE (0xa6000000) -#else -#define SH7785LCR_SDRAM_BASE (0x08000000) -#define SH7785LCR_SDRAM_SIZE (128 * 1024 * 1024) -#define SH7785LCR_FLASH_BASE_1 (0xa0000000) -#define SH7785LCR_FLASH_BANK_SIZE (64 * 1024 * 1024) -#define SH7785LCR_USB_BASE (0xb4000000) -#endif - -#define CONFIG_SYS_PBSIZE 256 -#define CONFIG_SYS_BAUDRATE_TABLE { 115200 } - -/* SCIF */ -#define CONFIG_CONS_SCIF1 1 -#define CONFIG_SCIF_EXT_CLOCK 1 - -#define CONFIG_SYS_MEMTEST_START (SH7785LCR_SDRAM_BASE) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ - (SH7785LCR_SDRAM_SIZE) - \ - 4 * 1024 * 1024) -#undef CONFIG_SYS_MEMTEST_SCRATCH -#undef CONFIG_SYS_LOADS_BAUD_CHANGE - -#define CONFIG_SYS_SDRAM_BASE (SH7785LCR_SDRAM_BASE) -#define CONFIG_SYS_SDRAM_SIZE (SH7785LCR_SDRAM_SIZE) -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) - -#define CONFIG_SYS_MONITOR_BASE (SH7785LCR_FLASH_BASE_1) -#define CONFIG_SYS_MONITOR_LEN (512 * 1024) -#define CONFIG_SYS_MALLOC_LEN (512 * 1024) -#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) - -/* FLASH */ -#undef CONFIG_SYS_FLASH_QUIET_TEST -#define CONFIG_SYS_FLASH_EMPTY_INFO -#define CONFIG_SYS_FLASH_BASE (SH7785LCR_FLASH_BASE_1) -#define CONFIG_SYS_MAX_FLASH_SECT 512 - -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE + \ - (0 * SH7785LCR_FLASH_BANK_SIZE) } - -#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) -#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) -#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) -#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) - -#undef CONFIG_SYS_DIRECT_FLASH_TFTP - -/* R8A66597 */ -#define CONFIG_USB_R8A66597_HCD -#define CONFIG_R8A66597_BASE_ADDR SH7785LCR_USB_BASE -#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ -#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ -#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ - -/* PCI Controller */ -#define CONFIG_SH4_PCI -#define CONFIG_SH7780_PCI -#if defined(CONFIG_SH_32BIT) -#define CONFIG_SH7780_PCI_LSR 0x1ff00001 -#define CONFIG_SH7780_PCI_LAR 0x5f000000 -#define CONFIG_SH7780_PCI_BAR 0x5f000000 -#else -#define CONFIG_SH7780_PCI_LSR 0x07f00001 -#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE -#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE -#endif -#define CONFIG_PCI_SCAN_SHOW 1 - -#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */ -#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */ - -#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */ -#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS -#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */ - -#if defined(CONFIG_SH_32BIT) -#define CONFIG_PCI_SYS_PHYS SH7785LCR_SDRAM_PHYS_BASE -#else -#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE -#endif -#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE -#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE - -/* ENV setting */ -#define CONFIG_ENV_OVERWRITE 1 -#define CONFIG_ENV_SECT_SIZE (256 * 1024) -#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) -#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) -#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) -#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) - -/* Board Clock */ -/* The SCIF used external clock. system clock only used timer. */ -#define CONFIG_SYS_CLK_FREQ 50000000 -#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ - -#endif /* __SH7785LCR_H */ diff --git a/include/configs/siemens-am33x-common.h b/include/configs/siemens-am33x-common.h index f44a4280f4..12819553b0 100644 --- a/include/configs/siemens-am33x-common.h +++ b/include/configs/siemens-am33x-common.h @@ -86,7 +86,6 @@ #define CONFIG_SYS_I2C /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x402F0400 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) @@ -150,8 +149,6 @@ /* * USB configuration */ -#define CONFIG_USB_MUSB_DISABLE_BULK_COMBINE_SPLIT - #define CONFIG_AM335X_USB0 #define CONFIG_AM335X_USB0_MODE MUSB_PERIPHERAL #define CONFIG_AM335X_USB1 diff --git a/include/configs/silk.h b/include/configs/silk.h index 112806c342..c42b57ab2a 100644 --- a/include/configs/silk.h +++ b/include/configs/silk.h @@ -43,7 +43,6 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h index f95b29480d..0d0c6bdc69 100644 --- a/include/configs/smartweb.h +++ b/include/configs/smartweb.h @@ -174,7 +174,6 @@ #endif /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x0 #define CONFIG_SPL_MAX_SIZE (SZ_4K) #define CONFIG_SPL_BSS_START_ADDR CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 6da713728f..68af0ef450 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -37,8 +37,6 @@ #define CONFIG_SKIP_LOWLEVEL_INIT #define COPY_BL2_FNPTR_ADDR 0x00002488 -#define CONFIG_SPL_TEXT_BASE 0x02021410 - #define CONFIG_BOOTCOMMAND "fatload mmc 0 40007000 uImage; bootm 40007000" /* Miscellaneous configurable options */ diff --git a/include/configs/sniper.h b/include/configs/sniper.h index aa78684b02..540ea77ce0 100644 --- a/include/configs/sniper.h +++ b/include/configs/sniper.h @@ -64,7 +64,6 @@ * SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40200000 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_BSS_START_ADDR 0x80000000 diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 0f116fbf2d..92630c5e6e 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -19,12 +19,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 -/* Ethernet on SoC (EMAC) */ - -/* - * U-Boot environment configurations - */ - /* * Serial / UART configurations */ diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 24fcdd8b5a..af6137aeb1 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 09c9b7ca9e..d1034ac280 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -10,8 +10,6 @@ */ #define CONFIG_CLOCKS -#define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024) - #define CONFIG_TIMESTAMP /* Print image info with timestamp */ /* @@ -26,7 +24,13 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */ +/* SPL memory allocation configuration, this is for FAT implementation */ +#ifndef CONFIG_SYS_SPL_MALLOC_SIZE +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000 +#endif +#define CONFIG_SYS_INIT_RAM_SIZE (0x40000 - CONFIG_SYS_SPL_MALLOC_SIZE) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE) #endif /* @@ -38,12 +42,23 @@ #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE))) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_BOOTCOUNT_ADDR +#define CONFIG_SPL_STACK CONFIG_SYS_BOOTCOUNT_ADDR #else -#define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SPL_STACK \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #endif +/* + * U-Boot stack setup: if SPL post-reloc uses DDR stack, use it in pre-reloc + * phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage + * in U-Boot pre-reloc is higher than in SPL. + */ +#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR +#else +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK +#endif + #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* @@ -55,10 +70,6 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#ifndef CONFIG_SYS_HOSTNAME -#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD -#endif - /* * Cache */ @@ -66,19 +77,6 @@ #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS /* - * EPCS/EPCQx1 Serial Flash Controller - */ -#ifdef CONFIG_ALTERA_SPI -/* - * The base address is configurable in QSys, each board must specify the - * base address based on it's particular FPGA configuration. Please note - * that the address here is incremented by 0x400 from the Base address - * selected in QSys, since the SPI registers are at offset +0x400. - * #define CONFIG_SYS_SPI_BASE 0xff240400 - */ -#endif - -/* * Ethernet on SoC (EMAC) */ #ifdef CONFIG_CMD_NET @@ -133,32 +131,6 @@ #endif /* - * I2C support - */ -#ifndef CONFIG_DM_I2C -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS -#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS -#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS -#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS -/* Using standard mode which the speed up to 100Kb/s */ -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SPEED1 100000 -#define CONFIG_SYS_I2C_SPEED2 100000 -#define CONFIG_SYS_I2C_SPEED3 100000 -/* Address of device when used as slave */ -#define CONFIG_SYS_I2C_SLAVE 0x02 -#define CONFIG_SYS_I2C_SLAVE1 0x02 -#define CONFIG_SYS_I2C_SLAVE2 0x02 -#define CONFIG_SYS_I2C_SLAVE3 0x02 -#ifndef __ASSEMBLY__ -/* Clock supplied to I2C controller in unit of MHz */ -unsigned int cm_get_l4_sp_clk_hz(void); -#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000) -#endif -#endif /* CONFIG_DM_I2C */ - -/* * QSPI support */ /* Enable multiple SPI NOR flash manufacturers */ @@ -172,15 +144,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif /* - * Designware SPI support - */ - -/* - * Serial Driver - */ -#define CONFIG_SYS_NS16550_SERIAL - -/* * USB */ @@ -216,29 +179,15 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif /* - * mtd partitioning for serial NOR flash - * - * device nor0 <ff705000.spi.0>, # parts = 6 - * #: name size offset mask_flags - * 0: u-boot 0x00100000 0x00000000 0 - * 1: env1 0x00040000 0x00100000 0 - * 2: env2 0x00040000 0x00140000 0 - * 3: UBI 0x03e80000 0x00180000 0 - * 4: boot 0x00e80000 0x00180000 0 - * 5: rootfs 0x01000000 0x01000000 0 - * - */ - -/* * SPL * * SRAM Memory layout for gen 5: * * 0xFFFF_0000 ...... Start of SRAM * 0xFFFF_xxxx ...... Top of stack (grows down) - * 0xFFFF_yyyy ...... Malloc area - * 0xFFFF_zzzz ...... Global Data - * 0xFFFF_FF00 ...... End of SRAM + * 0xFFFF_yyyy ...... Global Data + * 0xFFFF_zzzz ...... Malloc area + * 0xFFFF_FFFF ...... End of SRAM * * SRAM Memory layout for Arria 10: * 0xFFE0_0000 ...... Start of SRAM (bottom) @@ -248,20 +197,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * 0xFFE3_FFFF ...... End of SRAM (top) */ #ifndef CONFIG_SPL_TEXT_BASE -#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #endif -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#endif -#endif - /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -292,15 +230,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #endif -/* - * Stack setup - */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif - /* Extra Environment */ #ifndef CONFIG_SPL_BUILD @@ -338,6 +267,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void); "scriptaddr=0x02100000\0" \ "pxefile_addr_r=0x02200000\0" \ "ramdisk_addr_r=0x02300000\0" \ + "socfpga_legacy_reset_compat=1\0" \ BOOTENV #endif diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 18da8496ef..028db2a09e 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index d3224d5bd3..21108e3447 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h index 2fcabff8af..d85f98fbd4 100644 --- a/include/configs/socfpga_de10_nano.h +++ b/include/configs/socfpga_de10_nano.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h index f37099c58f..9919d292dc 100644 --- a/include/configs/socfpga_de1_soc.h +++ b/include/configs/socfpga_de1_soc.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index c233c208a5..c4da5947f3 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -19,8 +19,6 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_ARP_TIMEOUT 500UL - -/* PHY */ #endif /* The rest of the configuration is shared */ diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 3a7f354914..972999949a 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index f0d9347891..7faea150a9 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index b6a98611c0..3a8ccc3021 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -19,8 +19,6 @@ /* The PHY is autodetected, so no MII PHY address is needed here */ #define PHY_ANEG_TIMEOUT 8000 -/* Environment */ - /* Enable SPI NOR flash reset, needed for SPI booting */ #define CONFIG_SPI_N25Q256A_RESET @@ -36,15 +34,6 @@ #define CONFIG_ENV_OFFSET 0x000e0000 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) -/* - * The QSPI NOR flash layout on SR1500: - * - * 0000.0000 - 0003.ffff: SPL (4 times) - * 0004.0000 - 000d.ffff: U-Boot - * 000e.0000 - 000e.ffff: env1 - * 000f.0000 - 000f.ffff: env2 - */ - /* The rest of the configuration is shared */ #include <configs/socfpga_common.h> diff --git a/include/configs/socfpga_stratix10_socdk.h b/include/configs/socfpga_stratix10_socdk.h index 31c267f55d..8d2971c6e2 100644 --- a/include/configs/socfpga_stratix10_socdk.h +++ b/include/configs/socfpga_stratix10_socdk.h @@ -130,11 +130,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE - 0x200000 /* - * SDRAM controller - */ -#define CONFIG_ALTERA_SDRAM - -/* * Serial / UART configurations */ #define CONFIG_SYS_NS16550_CLK 100000000 @@ -197,7 +192,6 @@ unsigned int cm_get_l4_sys_free_clk_hz(void); * */ #define CONFIG_SPL_TARGET "spl/u-boot-spl.hex" -#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 5517ed722d..29a92b9146 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -16,27 +16,9 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* I2C EEPROM */ -#ifdef CONFIG_CMD_EEPROM -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_BUS 0 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70 -#endif - -/* - * Status LEDs: - * 0 ... Top Green - * 1 ... Top Red - * 2 ... Bottom Green - * 3 ... Bottom Red - */ - /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_BOOTP_SEND_HOSTNAME -/* PHY */ #endif /* Extra Environment */ diff --git a/include/configs/stm32f746-disco.h b/include/configs/stm32f746-disco.h index dae402f91b..a24127d1a7 100644 --- a/include/configs/stm32f746-disco.h +++ b/include/configs/stm32f746-disco.h @@ -43,14 +43,20 @@ #define CONFIG_SYS_MALLOC_LEN (1 * 1024 * 1024) -#define CONFIG_BOOTCOMMAND \ - "run bootcmd_romfs" - -#define CONFIG_EXTRA_ENV_SETTINGS \ - "bootargs_romfs=uclinux.physaddr=0x08180000 root=/dev/mtdblock0\0" \ - "bootcmd_romfs=setenv bootargs ${bootargs} ${bootargs_romfs};" \ - "bootm 0x08044000 - 0x08042000\0" - +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) + +#include <config_distro_bootcmd.h> +#define CONFIG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0xC0008000\0" \ + "fdtfile=stm32f746-disco.dtb\0" \ + "fdt_addr_r=0xC0500000\0" \ + "scriptaddr=0xC0008000\0" \ + "pxefile_addr_r=0xC0008000\0" \ + "fdt_high=0xffffffffffffffff\0" \ + "initrd_high=0xffffffffffffffff\0" \ + "ramdisk_addr_r=0xD0900000\0" \ + BOOTENV /* * Command line configuration. @@ -61,7 +67,6 @@ /* For SPL */ #ifdef CONFIG_SUPPORT_SPL #define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_FLASH_BASE #define CONFIG_SYS_MONITOR_LEN (512 * 1024) #define CONFIG_SYS_SPL_LEN 0x00008000 #define CONFIG_SYS_UBOOT_START 0x080083FD diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp1.h index 737dfd6a5c..fd6c97a0c6 100644 --- a/include/configs/stm32mp1.h +++ b/include/configs/stm32mp1.h @@ -59,7 +59,6 @@ /* SPL support */ #ifdef CONFIG_SPL /* BOOTROM load address */ -#define CONFIG_SPL_TEXT_BASE 0x2FFC2500 /* SPL use DDR */ #define CONFIG_SPL_BSS_START_ADDR 0xC0200000 #define CONFIG_SPL_BSS_MAX_SIZE 0x00100000 @@ -78,7 +77,6 @@ /*MMC SD*/ #define CONFIG_SYS_MMC_MAX_DEVICE 3 -#define CONFIG_SUPPORT_EMMC_BOOT /*****************************************************************************/ #ifdef CONFIG_DISTRO_DEFAULTS diff --git a/include/configs/stout.h b/include/configs/stout.h index 93d980569c..4a465e01bd 100644 --- a/include/configs/stout.h +++ b/include/configs/stout.h @@ -47,7 +47,6 @@ "bootm_size=0x10000000\0" /* SPL support */ -#define CONFIG_SPL_TEXT_BASE 0xe6300000 #define CONFIG_SPL_STACK 0xe6340000 #define CONFIG_SPL_MAX_SIZE 0x4000 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000 diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 79afba2aba..fceb812448 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -178,7 +178,6 @@ * autoconf.mk. */ #if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000 -#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ #ifdef CONFIG_ARM64 /* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */ @@ -187,12 +186,10 @@ #define LOW_LEVEL_SRAM_STACK 0x00018000 #endif /* !CONFIG_ARM64 */ #elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000 -#define CONFIG_SPL_TEXT_BASE 0x20060 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */ /* end of SRAM A2 on H6 for now */ #define LOW_LEVEL_SRAM_STACK 0x00118000 #else -#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */ #define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */ #define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */ #endif diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h index dd71d89840..e7bab7203e 100644 --- a/include/configs/tam3517-common.h +++ b/include/configs/tam3517-common.h @@ -142,7 +142,6 @@ #define CONFIG_SPL_NAND_DRIVERS #define CONFIG_SPL_NAND_ECC -#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h index 1384a35c0c..a95cbed33a 100644 --- a/include/configs/tao3530.h +++ b/include/configs/tao3530.h @@ -219,7 +219,6 @@ #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 -#define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/taurus.h b/include/configs/taurus.h index 3582eb2edf..45a4a800c5 100644 --- a/include/configs/taurus.h +++ b/include/configs/taurus.h @@ -41,6 +41,7 @@ #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ #define CONFIG_SETUP_MEMORY_TAGS #define CONFIG_INITRD_TAG + #define CONFIG_SKIP_LOWLEVEL_INIT_ONLY /* general purpose I/O */ @@ -48,12 +49,9 @@ #define CONFIG_AT91_GPIO #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ -/* serial console */ -#define CONFIG_ATMEL_USART #define CONFIG_USART_BASE ATMEL_BASE_DBGU #define CONFIG_USART_ID ATMEL_ID_SYS - /* * SDRAM: 1 bank, min 32, max 128 MB * Initialized before u-boot gets started. @@ -106,7 +104,6 @@ /* SPI EEPROM */ #define TAURUS_SPI_MASK (1 << 4) -#define TAURUS_SPI_CS_PIN AT91_PIN_PA3 #if defined(CONFIG_SPL_BUILD) /* SPL related */ @@ -120,8 +117,57 @@ #define CONFIG_ENV_OFFSET 0x100000 #define CONFIG_ENV_OFFSET_REDUND 0x180000 #define CONFIG_ENV_SIZE (SZ_128K) /* 1 sector = 128 kB */ -#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm" +#ifndef CONFIG_SPL_BUILD +#if defined(CONFIG_BOARD_AXM) +#define CONFIG_EXTRA_ENV_SETTINGS \ + "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \ + "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \ + "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \ + "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \ + "boot_retries=0\0" \ + "ethact=macb0\0" \ + "flash_nfs=run nand_kernel;run nfsargs;run addip;" \ + "upgrade_available;bootm ${kernel_ram};reset\0" \ + "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \ + "bootm ${kernel_ram};reset\0" \ + "flash_self_test=run nand_kernel;run setbootargs addtest;" \ + "upgrade_available;bootm ${kernel_ram};reset\0" \ + "hostname=systemone\0" \ + "kernel_Off=0x00200000\0" \ + "kernel_Off_fallback=0x03800000\0" \ + "kernel_ram=0x21500000\0" \ + "kernel_size=0x00400000\0" \ + "kernel_size_fallback=0x00400000\0" \ + "loads_echo=1\0" \ + "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \ + "${kernel_size}\0" \ + "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \ + "run nfsargs;run addip;upgrade_available;" \ + "bootm ${kernel_ram};reset\0" \ + "netdev=eth0\0" \ + "nfsargs=run root_path;setenv bootargs ${bootargs} root=/dev/nfs " \ + "rw nfsroot=${serverip}:${rootpath} " \ + "at91sam9_wdt.wdt_timeout=16\0" \ + "partitionset_active=A\0" \ + "preboot=echo;echo Type 'run flash_self' to use kernel and root " \ + "filesystem on memory;echo Type 'run flash_nfs' to use " \ + "kernel from memory and root filesystem over NFS;echo Type " \ + "'run net_nfs' to get Kernel over TFTP and mount root " \ + "filesystem over NFS;echo\0" \ + "project_dir=systemone\0" \ + "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0" \ + "rootfs=/dev/mtdblock5\0" \ + "rootfs_fallback=/dev/mtdblock7\0" \ + "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops " \ + "root=${rootfs} rootfstype=jffs2 panic=7 " \ + "at91sam9_wdt.wdt_timeout=16\0" \ + "stderr=serial\0" \ + "stdin=serial\0" \ + "stdout=serial\0" \ + "upgrade_available=0\0" +#endif +#endif /* #ifndef CONFIG_SPL_BUILD */ /* * Size of malloc() pool */ @@ -129,7 +175,6 @@ ROUND(3 * CONFIG_ENV_SIZE + SZ_4M, 0x1000) /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x0 #define CONFIG_SPL_MAX_SIZE (31 * SZ_512) #define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K) #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \ diff --git a/include/configs/tegra114-common.h b/include/configs/tegra114-common.h index 1aa4412645..d3a7045697 100644 --- a/include/configs/tegra114-common.h +++ b/include/configs/tegra114-common.h @@ -54,7 +54,6 @@ "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 #define CONFIG_SPL_STACK 0x800ffffc diff --git a/include/configs/tegra124-common.h b/include/configs/tegra124-common.h index 3530684164..522993b958 100644 --- a/include/configs/tegra124-common.h +++ b/include/configs/tegra124-common.h @@ -56,7 +56,6 @@ "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 #define CONFIG_SPL_STACK 0x800ffffc diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h index e58477e289..1e31d82574 100644 --- a/include/configs/tegra20-common.h +++ b/include/configs/tegra20-common.h @@ -55,7 +55,6 @@ "ramdisk_addr_r=0x03100000\0" /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x00108000 #define CONFIG_SYS_SPL_MALLOC_START 0x00090000 #define CONFIG_SPL_STACK 0x000ffffc diff --git a/include/configs/tegra30-common.h b/include/configs/tegra30-common.h index 2d8948d9d9..54bc6756ab 100644 --- a/include/configs/tegra30-common.h +++ b/include/configs/tegra30-common.h @@ -51,7 +51,6 @@ "ramdisk_addr_r=0x83100000\0" /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x80108000 #define CONFIG_SYS_SPL_MALLOC_START 0x80090000 #define CONFIG_SPL_STACK 0x800ffffc diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index cd92835112..6d41d18493 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -95,7 +95,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40004030 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h index 05ba83b1f5..512386ee22 100644 --- a/include/configs/ti814x_evm.h +++ b/include/configs/ti814x_evm.h @@ -122,7 +122,6 @@ #define CONFIG_ENV_OVERWRITE /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h index e622f4a00b..fc5608b3fd 100644 --- a/include/configs/ti816x_evm.h +++ b/include/configs/ti816x_evm.h @@ -90,7 +90,6 @@ /* SPL */ /* Defines for SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40400000 #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/ti_am335x_common.h b/include/configs/ti_am335x_common.h index 68f64655a7..0b9930e884 100644 --- a/include/configs/ti_am335x_common.h +++ b/include/configs/ti_am335x_common.h @@ -40,7 +40,6 @@ * supports X-MODEM loading via UART, and we leverage this and then use * Y-MODEM to load u-boot.img, when booted over UART. */ -#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index eeca085f9f..6c867671cf 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -32,7 +32,6 @@ #endif /* SPL SPI Loader Configuration */ -#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR #define CONFIG_SPL_PAD_TO 65536 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8) #define CONFIG_SPL_BSS_START_ADDR (CONFIG_ISW_ENTRY_ADDR + \ diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h index c668284b3e..5d9c8efe58 100644 --- a/include/configs/ti_omap3_common.h +++ b/include/configs/ti_omap3_common.h @@ -55,7 +55,6 @@ #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x40200800 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (64 << 20)) diff --git a/include/configs/ti_omap4_common.h b/include/configs/ti_omap4_common.h index 5d21c572f8..fc59aba1fa 100644 --- a/include/configs/ti_omap4_common.h +++ b/include/configs/ti_omap4_common.h @@ -124,7 +124,6 @@ * SPL is overlapped with public stack and breaking non HS devices to boot. * So moving TEXT_BASE down to non-HS limit. */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ (128 << 20)) diff --git a/include/configs/ti_omap5_common.h b/include/configs/ti_omap5_common.h index 7c08e47d3d..de0a6af2fd 100644 --- a/include/configs/ti_omap5_common.h +++ b/include/configs/ti_omap5_common.h @@ -83,7 +83,6 @@ * RAM from address 0x40301350 (0x40300000+0x1000(reserved)+0x350(cert)). */ #define TI_OMAP5_SECURE_BOOT_RESV_SRAM_SZ 0x1000 -#define CONFIG_SPL_TEXT_BASE CONFIG_ISW_ENTRY_ADDR /* If no specific start address is specified then the secure EMIF * region will be placed at the end of the DDR space. In order to prevent * the main u-boot relocation from clobbering that memory and causing a @@ -97,7 +96,6 @@ * For all booting on GP parts, the flash loader image is * downloaded into internal RAM at address 0x40300000. */ -#define CONFIG_SPL_TEXT_BASE 0x40300000 #endif #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \ diff --git a/include/configs/tricorder.h b/include/configs/tricorder.h index 13307fc199..683375a0df 100644 --- a/include/configs/tricorder.h +++ b/include/configs/tricorder.h @@ -219,7 +219,6 @@ #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 -#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ CONFIG_SPL_TEXT_BASE) diff --git a/include/configs/turris_omnia.h b/include/configs/turris_omnia.h index c7805cf36b..018f54428b 100644 --- a/include/configs/turris_omnia.h +++ b/include/configs/turris_omnia.h @@ -18,36 +18,6 @@ */ #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ -/* - * Commands configuration - */ - -/* I2C support */ -#define CONFIG_DM_I2C -#define CONFIG_I2C_MUX -#define CONFIG_I2C_MUX_PCA954x -#define CONFIG_SPL_I2C_MUX -#define CONFIG_SYS_I2C_MVTWSI - -/* Watchdog support */ -#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION) -# define CONFIG_WATCHDOG -#endif - -/* - * SDIO/MMC Card Configuration - */ -#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE - -/* - * SATA/SCSI/AHCI configuration - */ -#define CONFIG_SCSI_AHCI_PLAT -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2 -#define CONFIG_SYS_SCSI_MAX_LUN 1 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ - CONFIG_SYS_SCSI_MAX_LUN) - /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI @@ -70,7 +40,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) @@ -120,9 +89,16 @@ #define BOOT_TARGET_DEVICES_USB(func) #endif +#ifdef CONFIG_SCSI +#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0) +#else +#define BOOT_TARGET_DEVICES_SCSI(func) +#endif + #define BOOT_TARGET_DEVICES(func) \ BOOT_TARGET_DEVICES_MMC(func) \ BOOT_TARGET_DEVICES_USB(func) \ + BOOT_TARGET_DEVICES_SCSI(func) \ func(PXE, pxe, na) \ func(DHCP, dhcp, na) diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 1e509ce9ad..bec7b68794 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -94,9 +94,6 @@ #define CONFIG_SYS_NAND_DATA_BASE 0x68000000 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 -/* SD/MMC */ -#define CONFIG_SUPPORT_EMMC_BOOT - /* memtest works on */ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) @@ -229,9 +226,6 @@ /* only for SPL */ #if defined(CONFIG_ARCH_UNIPHIER_LD4) || \ defined(CONFIG_ARCH_UNIPHIER_SLD8) -#define CONFIG_SPL_TEXT_BASE 0x00040000 -#else -#define CONFIG_SPL_TEXT_BASE 0x00100000 #endif #define CONFIG_SPL_STACK (0x00200000) diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 270f325a55..128f02db66 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -31,7 +31,6 @@ #define CONFIG_SYS_FSL_ESDHC_NUM 1 /* USB */ -#define CONFIG_USB_EHCI_MX5 #define CONFIG_MXC_USB_PORT 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) #define CONFIG_MXC_USB_FLAGS 0 diff --git a/include/configs/vinco.h b/include/configs/vinco.h index ec22a30cda..eebb3f7ca7 100644 --- a/include/configs/vinco.h +++ b/include/configs/vinco.h @@ -43,7 +43,6 @@ /* MMC */ #ifdef CONFIG_CMD_MMC -#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_GENERIC_ATMEL_MCI #define ATMEL_BASE_MMCI 0xfc000000 #define CONFIG_SYS_MMC_CLK_OD 500000 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index d3cbdc6f2e..fd98c1417e 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -95,7 +95,6 @@ #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE #ifdef CONFIG_ENV_IS_IN_MMC -#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC4 eMMC */ /* 0=user, 1=boot0, 2=boot1, * 4..7=general0..3. */ #define CONFIG_SYS_MMC_ENV_PART 1 /* boot0 */ diff --git a/include/configs/warp.h b/include/configs/warp.h index 9aa8a48d3d..5345f5314d 100644 --- a/include/configs/warp.h +++ b/include/configs/warp.h @@ -23,7 +23,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE -#define CONFIG_SUPPORT_EMMC_BOOT /* Watchdog */ #define CONFIG_WATCHDOG_TIMEOUT_MSECS 30000 /* 30s */ diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 043f2861b6..0ef8e35948 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -24,14 +24,11 @@ #endif #endif -#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR - /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) /* MMC Config*/ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE #define CONFIG_SYS_MMC_IMG_LOAD_PART 1 @@ -39,7 +36,7 @@ #define CONFIG_SERIAL_TAG #define CONFIG_DFU_ENV_SETTINGS \ - "dfu_alt_info=boot raw 0x2 0x400 mmcpart 1\0" \ + "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ #define CONFIG_EXTRA_ENV_SETTINGS \ CONFIG_DFU_ENV_SETTINGS \ diff --git a/include/configs/wb45n.h b/include/configs/wb45n.h index add4019b31..43de2e1119 100644 --- a/include/configs/wb45n.h +++ b/include/configs/wb45n.h @@ -110,7 +110,6 @@ #define CONFIG_SYS_MALLOC_LEN (512 * 1024 + 0x1000) /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x6000 #define CONFIG_SPL_STACK 0x308000 diff --git a/include/configs/wb50n.h b/include/configs/wb50n.h index 2684b6c16c..e3973d02a2 100644 --- a/include/configs/wb50n.h +++ b/include/configs/wb50n.h @@ -95,7 +95,6 @@ #define CONFIG_SYS_MALLOC_LEN (2 * 1024 * 1024) /* SPL */ -#define CONFIG_SPL_TEXT_BASE 0x300000 #define CONFIG_SPL_MAX_SIZE 0x10000 #define CONFIG_SPL_BSS_START_ADDR 0x20000000 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 diff --git a/include/configs/woodburn_sd.h b/include/configs/woodburn_sd.h index 06433d0e71..60d8a4b8c3 100644 --- a/include/configs/woodburn_sd.h +++ b/include/configs/woodburn_sd.h @@ -19,7 +19,6 @@ * SPL */ -#define CONFIG_SPL_TEXT_BASE 0x10002300 #define CONFIG_SPL_MAX_SIZE (64 * 1024) /* 8 KB for stack */ #define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h index 67b5e9aa11..8d97905a59 100644 --- a/include/configs/work_92105.h +++ b/include/configs/work_92105.h @@ -138,7 +138,6 @@ */ /* SPL will be executed at offset 0 */ -#define CONFIG_SPL_TEXT_BASE 0x00000000 /* SPL will use SRAM as stack */ #define CONFIG_SPL_STACK 0x0000FFF8 /* Use the framework and generic lib */ diff --git a/include/configs/x530.h b/include/configs/x530.h index 80c898ef7c..80ae15bd4e 100644 --- a/include/configs/x530.h +++ b/include/configs/x530.h @@ -107,7 +107,6 @@ /* Defines for SPL */ #define CONFIG_SPL_SIZE (140 << 10) -#define CONFIG_SPL_TEXT_BASE 0x40000030 #define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030) #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE) diff --git a/include/configs/x600.h b/include/configs/x600.h index 639da8012c..c893752dcd 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -199,7 +199,6 @@ /* * SPL related defines */ -#define CONFIG_SPL_TEXT_BASE 0xd2800b00 #define CONFIG_SPL_MAX_SIZE (CONFIG_SRAM_SIZE - 0xb00) #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/spear" diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h index 4180b25f97..7fcf76a6bf 100644 --- a/include/configs/x86-common.h +++ b/include/configs/x86-common.h @@ -36,7 +36,6 @@ /*----------------------------------------------------------------------- * Real Time Clock Configuration */ -#define CONFIG_RTC_MC146818 #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 #define CONFIG_SYS_ISA_IO CONFIG_SYS_ISA_IO_BASE_ADDRESS diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index 91ae7088a5..684faaee2e 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -47,10 +47,6 @@ #define CONFIG_BOOTP_BOOTFILESIZE #define CONFIG_BOOTP_MAY_FAIL -#if defined(CONFIG_MMC_SDHCI_ZYNQ) -# define CONFIG_SUPPORT_EMMC_BOOT -#endif - #ifdef CONFIG_NAND_ARASAN # define CONFIG_SYS_MAX_NAND_DEVICE 1 # define CONFIG_SYS_NAND_ONFI_DETECTION @@ -211,7 +207,6 @@ "dfu_bufsiz=0x1000\0" #endif -#define CONFIG_SPL_TEXT_BASE 0xfffc0000 #define CONFIG_SPL_STACK 0xfffffffc #define CONFIG_SPL_MAX_SIZE 0x40000 diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 08e0ca0c8f..4cbf8aa526 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -21,7 +21,6 @@ /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ /* I2C configs */ #define CONFIG_SYS_I2C diff --git a/include/configs/zc5202.h b/include/configs/zc5202.h index 40d33f7830..77ff04754b 100644 --- a/include/configs/zc5202.h +++ b/include/configs/zc5202.h @@ -12,8 +12,6 @@ #define CONSOLE_DEV "ttymxc1" #define CONFIG_MMCROOT "/dev/mmcblk0p2" -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - #include "el6x_common.h" /* Ethernet */ diff --git a/include/configs/zc5601.h b/include/configs/zc5601.h index b9673e2c06..e4fe7a462d 100644 --- a/include/configs/zc5601.h +++ b/include/configs/zc5601.h @@ -13,8 +13,6 @@ #define CONSOLE_DEV "ttymxc1" #define CONFIG_MMCROOT "/dev/mmcblk0p1" -#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ - #include "el6x_common.h" /* Ethernet */ diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index 3ab783e3a8..523d4da56b 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -310,7 +310,6 @@ #endif /* SP location before relocation, must use scratch RAM */ -#define CONFIG_SPL_TEXT_BASE 0x0 /* 3 * 64kB blocks of OCM - one is on the top because of bootrom */ #define CONFIG_SPL_MAX_SIZE 0x30000 |