diff options
Diffstat (limited to 'include/configs/MVBLM7.h')
| -rw-r--r-- | include/configs/MVBLM7.h | 125 |
1 files changed, 82 insertions, 43 deletions
diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index 31c85e22de..8b20f72451 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -72,7 +72,10 @@ #define CONFIG_SYS_MEMTEST_END (70<<20) #define CONFIG_VERY_BIG_RAM -#define CONFIG_SYS_DDRCDR 0x22000001 +#define CONFIG_SYS_DDRCDR (DDRCDR_PZ_HIZ \ + | DDRCDR_NZ_HIZ \ + | DDRCDR_Q_DRN) + /* 0x22000001 */ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 #define CONFIG_SYS_DDR_SIZE 512 @@ -100,20 +103,27 @@ #define CONFIG_SYS_FLASH_BASE 0xFF800000 #define CONFIG_SYS_FLASH_SIZE 8 -#define CONFIG_SYS_FLASH_SIZE_SHIFT 3 #define CONFIG_SYS_FLASH_EMPTY_INFO #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 #define CONFIG_SYS_MAX_FLASH_BANKS 1 #define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | BR_PS_16 | BR_V) -#define CONFIG_SYS_OR0_PRELIM ((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) | OR_UPM_XAM | \ - OR_GPCM_CSNT | OR_GPCM_ACS_DIV2 | OR_GPCM_XACS|\ - OR_GPCM_SCY_15 | OR_GPCM_TRLX | OR_GPCM_EHTR | \ - OR_GPCM_EAD) +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ + | BR_PS_16 \ + | BR_MS_GPCM \ + | BR_V) +#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ + | OR_UPM_XAM \ + | OR_GPCM_CSNT \ + | OR_GPCM_ACS_DIV2 \ + | OR_GPCM_XACS \ + | OR_GPCM_SCY_15 \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET \ + | OR_GPCM_EAD) #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | (0x13 + CONFIG_SYS_FLASH_SIZE_SHIFT)) +#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB) /* * U-Boot memory configuration @@ -122,10 +132,11 @@ #undef CONFIG_SYS_RAMBOOT #define CONFIG_SYS_INIT_RAM_LOCK -#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ -#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ +#define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */ +#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ -#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) +#define CONFIG_SYS_GBL_DATA_OFFSET \ + (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ @@ -157,7 +168,7 @@ #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) #define CONFIG_SYS_BAUDRATE_TABLE \ - {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} #define CONFIG_CONSOLE ttyS0 #define CONFIG_BAUDRATE 115200 @@ -177,7 +188,8 @@ #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 -#define CONFIG_SYS_PCI1_MMIO_BASE (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) +#define CONFIG_SYS_PCI1_MMIO_BASE \ + (CONFIG_SYS_PCI1_MEM_BASE + CONFIG_SYS_PCI1_MEM_SIZE) #define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE #define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 #define CONFIG_SYS_PCI1_IO_BASE 0x00000000 @@ -204,16 +216,16 @@ #define CONFIG_TSEC1_NAME "TSEC0" #define CONFIG_FEC1_PHY_NORXERR #define CONFIG_SYS_TSEC1_OFFSET 0x24000 -#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET) +#define CONFIG_SYS_TSEC1 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC1_OFFSET) #define TSEC1_PHY_ADDR 0x10 #define TSEC1_PHYIDX 0 #define TSEC1_FLAGS (TSEC_GIGABIT|TSEC_REDUCED) #define CONFIG_HAS_ETH1 -#define CONFIG_TSEC2_NAME "TSEC1" +#define CONFIG_TSEC2_NAME "TSEC1" #define CONFIG_FEC2_PHY_NORXERR #define CONFIG_SYS_TSEC2_OFFSET 0x25000 -#define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC2_OFFSET) +#define CONFIG_SYS_TSEC2 (CONFIG_SYS_IMMR+CONFIG_SYS_TSEC2_OFFSET) #define TSEC2_PHY_ADDR 0x11 #define TSEC2_PHYIDX 0 #define TSEC2_FLAGS (TSEC_GIGABIT|TSEC_REDUCED) @@ -250,7 +262,7 @@ #define CONFIG_ENV_SIZE 0x2000 #define CONFIG_ENV_SECT_SIZE 0x2000 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR+CONFIG_ENV_SIZE) -#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE +#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE #define CONFIG_LOADS_ECHO #define CONFIG_SYS_LOADS_BAUD_CHANGE @@ -280,7 +292,7 @@ */ #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING -#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ #define CONFIG_SYS_HUSH_PARSER #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " @@ -292,7 +304,8 @@ #define CONFIG_SYS_PROMPT "mvBL-M7> " #define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_PBSIZE \ + (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) #define CONFIG_SYS_MAXARGS 16 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE #define CONFIG_SYS_HZ 1000 @@ -302,7 +315,8 @@ * have to be in the first 256 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ -#define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* Initial Memory map for Linux*/ + /* Initial Memory map for Linux*/ +#define CONFIG_SYS_BOOTMAPSZ (256 << 20) #define CONFIG_SYS_HRCW_LOW 0x0 #define CONFIG_SYS_HRCW_HIGH 0x0 @@ -311,7 +325,7 @@ * System performance */ #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ -#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ +#define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ #define CONFIG_SYS_SPCR_TSEC1EP 3 /* TSEC1 emergency priority (0-3) */ #define CONFIG_SYS_SPCR_TSEC2EP 3 /* TSEC2 emergency priority (0-3) */ @@ -333,15 +347,30 @@ #define CONFIG_HIGH_BATS 1 /* DDR */ -#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE \ + | BATL_PP_RW \ + | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ + | BATU_BL_256M \ + | BATU_VS \ + | BATU_VP) /* PCI */ -#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) -#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP) -#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT |\ - BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE \ + | BATL_PP_RW \ + | BATL_MEMCOHERENCE) +#define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \ + | BATU_BL_256M \ + | BATU_VS \ + | BATU_VP) +#define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \ + | BATL_PP_RW \ + | BATL_CACHEINHIBIT \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \ + | BATU_BL_256M \ + | BATU_VS \ + | BATU_VP) /* no PCI2 */ #define CONFIG_SYS_IBAT3L 0 @@ -350,14 +379,24 @@ #define CONFIG_SYS_IBAT4U 0 /* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */ -#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | \ - BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \ + | BATL_PP_RW \ + | BATL_CACHEINHIBIT \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \ + | BATU_BL_256M \ + | BATU_VS \ + | BATU_VP) /* stack in DCACHE 0xFDF00000 & FLASH @ 0xFF800000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE | \ - BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT6L (0xF0000000 \ + | BATL_PP_RW \ + | BATL_MEMCOHERENCE \ + | BATL_GUARDEDSTORAGE) +#define CONFIG_SYS_IBAT6U (0xF0000000 \ + | BATU_BL_256M \ + | BATU_VS \ + | BATU_VP) #define CONFIG_SYS_IBAT7L 0 #define CONFIG_SYS_IBAT7U 0 @@ -392,8 +431,8 @@ #define CONFIG_ZERO_BOOTDELAY_CHECK #define CONFIG_RESET_TO_RETRY 1000 -#define MV_CI mvBL-M7 -#define MV_VCI mvBL-M7 +#define MV_CI "mvBL-M7" +#define MV_VCI "mvBL-M7" #define MV_FPGA_DATA 0xfff40000 #define MV_FPGA_SIZE 0 #define MV_KERNEL_ADDR 0xff810000 @@ -409,15 +448,15 @@ #define MV_DTB_ADDR_RAM 0x00600000 #define MV_INITRD_ADDR_RAM 0x01000000 -#define CONFIG_BOOTCOMMAND "if imi ${script_addr}; \ - then source ${script_addr}; \ - else source ${script_addr2}; \ - fi;" +#define CONFIG_BOOTCOMMAND "if imi ${script_addr}; " \ + "then source ${script_addr}; " \ + "else source ${script_addr2}; " \ + "fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" #define CONFIG_EXTRA_ENV_SETTINGS \ "console_nr=0\0" \ - "baudrate=" MK_STR(CONFIG_BAUDRATE) "\0" \ + "baudrate=" MK_STR(CONFIG_BAUDRATE) "\0" \ "stdin=serial\0" \ "stdout=serial\0" \ "stderr=serial\0" \ @@ -435,8 +474,8 @@ "mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0" \ "dtb_name=" MK_STR(MV_DTB_NAME) "\0" \ "mv_version=" U_BOOT_VERSION "\0" \ - "dhcp_client_id=" MK_STR(MV_CI) "\0" \ - "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0" \ + "dhcp_client_id=" MV_CI "\0" \ + "dhcp_vendor-class-identifier=" MV_VCI "\0" \ "netretry=no\0" \ "use_static_ipaddr=no\0" \ "static_ipaddr=192.168.90.10\0" \ |