diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpio/Makefile | 1 | ||||
| -rw-r--r-- | drivers/gpio/sandbox.c | 209 | ||||
| -rw-r--r-- | drivers/net/sh_eth.c | 52 | ||||
| -rw-r--r-- | drivers/net/sh_eth.h | 41 | ||||
| -rw-r--r-- | drivers/serial/serial_sh.h | 2 |
5 files changed, 274 insertions, 31 deletions
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index 4375a55267..fb3b09ae74 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -34,6 +34,7 @@ COBJS-$(CONFIG_MXS_GPIO) += mxs_gpio.o COBJS-$(CONFIG_PCA953X) += pca953x.o COBJS-$(CONFIG_PCA9698) += pca9698.o COBJS-$(CONFIG_S5P) += s5p_gpio.o +COBJS-$(CONFIG_SANDBOX_GPIO) += sandbox.o COBJS-$(CONFIG_TEGRA2_GPIO) += tegra2_gpio.o COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o diff --git a/drivers/gpio/sandbox.c b/drivers/gpio/sandbox.c new file mode 100644 index 0000000000..19d2db0242 --- /dev/null +++ b/drivers/gpio/sandbox.c @@ -0,0 +1,209 @@ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/gpio.h> + +/* Flags for each GPIO */ +#define GPIOF_OUTPUT (1 << 0) /* Currently set as an output */ +#define GPIOF_HIGH (1 << 1) /* Currently set high */ +#define GPIOF_RESERVED (1 << 2) /* Is in use / requested */ + +struct gpio_state { + const char *label; /* label given by requester */ + u8 flags; /* flags (GPIOF_...) */ +}; + +/* + * State of GPIOs + * TODO: Put this into sandbox state + */ +static struct gpio_state state[CONFIG_SANDBOX_GPIO_COUNT]; + +/* Access routines for GPIO state */ +static u8 *get_gpio_flags(unsigned gp) +{ + /* assert()'s could be disabled, so make sure we handle that */ + assert(gp < ARRAY_SIZE(state)); + if (gp >= ARRAY_SIZE(state)) { + static u8 invalid_flags; + printf("sandbox_gpio: error: invalid gpio %u\n", gp); + return &invalid_flags; + } + + return &state[gp].flags; +} + +static int get_gpio_flag(unsigned gp, int flag) +{ + return (*get_gpio_flags(gp) & flag) != 0; +} + +static int set_gpio_flag(unsigned gp, int flag, int value) +{ + u8 *gpio = get_gpio_flags(gp); + + if (value) + *gpio |= flag; + else + *gpio &= ~flag; + + return 0; +} + +static int check_reserved(unsigned gpio, const char *func) +{ + if (!get_gpio_flag(gpio, GPIOF_RESERVED)) { + printf("sandbox_gpio: %s: error: gpio %u not reserved\n", + func, gpio); + return -1; + } + + return 0; +} + +/* + * Back-channel sandbox-internal-only access to GPIO state + */ + +int sandbox_gpio_get_value(unsigned gp) +{ + if (get_gpio_flag(gp, GPIOF_OUTPUT)) + debug("sandbox_gpio: get_value on output gpio %u\n", gp); + return get_gpio_flag(gp, GPIOF_HIGH); +} + +int sandbox_gpio_set_value(unsigned gp, int value) +{ + return set_gpio_flag(gp, GPIOF_HIGH, value); +} + +int sandbox_gpio_get_direction(unsigned gp) +{ + return get_gpio_flag(gp, GPIOF_OUTPUT); +} + +int sandbox_gpio_set_direction(unsigned gp, int output) +{ + return set_gpio_flag(gp, GPIOF_OUTPUT, output); +} + +/* + * These functions implement the public interface within U-Boot + */ + +/* set GPIO port 'gp' as an input */ +int gpio_direction_input(unsigned gp) +{ + debug("%s: gp:%u\n", __func__, gp); + + if (check_reserved(gp, __func__)) + return -1; + + return sandbox_gpio_set_direction(gp, 0); +} + +/* set GPIO port 'gp' as an output, with polarity 'value' */ +int gpio_direction_output(unsigned gp, int value) +{ + debug("%s: gp:%u, value = %d\n", __func__, gp, value); + + if (check_reserved(gp, __func__)) + return -1; + + return sandbox_gpio_set_direction(gp, 1) | + sandbox_gpio_set_value(gp, value); +} + +/* read GPIO IN value of port 'gp' */ +int gpio_get_value(unsigned gp) +{ + debug("%s: gp:%u\n", __func__, gp); + + if (check_reserved(gp, __func__)) + return -1; + + return sandbox_gpio_get_value(gp); +} + +/* write GPIO OUT value to port 'gp' */ +int gpio_set_value(unsigned gp, int value) +{ + debug("%s: gp:%u, value = %d\n", __func__, gp, value); + + if (check_reserved(gp, __func__)) + return -1; + + if (!sandbox_gpio_get_direction(gp)) { + printf("sandbox_gpio: error: set_value on input gpio %u\n", gp); + return -1; + } + + return sandbox_gpio_set_value(gp, value); +} + +int gpio_request(unsigned gp, const char *label) +{ + debug("%s: gp:%u, label:%s\n", __func__, gp, label); + + if (gp >= ARRAY_SIZE(state)) { + printf("sandbox_gpio: error: invalid gpio %u\n", gp); + return -1; + } + + if (get_gpio_flag(gp, GPIOF_RESERVED)) { + printf("sandbox_gpio: error: gpio %u already reserved\n", gp); + return -1; + } + + state[gp].label = label; + return set_gpio_flag(gp, GPIOF_RESERVED, 1); +} + +int gpio_free(unsigned gp) +{ + debug("%s: gp:%u\n", __func__, gp); + + if (check_reserved(gp, __func__)) + return -1; + + state[gp].label = NULL; + return set_gpio_flag(gp, GPIOF_RESERVED, 0); +} + +/* Display GPIO information */ +void gpio_info(void) +{ + unsigned gpio; + + puts("Sandbox GPIOs\n"); + + for (gpio = 0; gpio < ARRAY_SIZE(state); ++gpio) { + const char *label = state[gpio].label; + + printf("%4d: %s: %d [%c] %s\n", + gpio, + sandbox_gpio_get_direction(gpio) ? "out" : " in", + sandbox_gpio_get_value(gpio), + get_gpio_flag(gpio, GPIOF_RESERVED) ? 'x' : ' ', + label ? label : ""); + } +} diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 27d040125e..8d3dac20af 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1,8 +1,8 @@ /* * sh_eth.c - Driver for Renesas SH7763's ethernet controler. * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (c) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008, 2011 Renesas Solutions Corp. + * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com> * * This program is free software; you can redistribute it and/or modify @@ -44,7 +44,7 @@ #define flush_cache_wback(...) #endif -#define SH_ETH_PHY_DELAY 50000 +#define TIMEOUT_CNT 1000 int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) { @@ -80,7 +80,7 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) outl(EDTRR_TRNS, EDTRR(port)); /* Wait until packet is transmitted */ - timeout = 1000; + timeout = TIMEOUT_CNT; while (port_info->tx_desc_cur->td0 & TD_TACT && timeout--) udelay(100); @@ -94,7 +94,6 @@ int sh_eth_send(struct eth_device *dev, volatile void *packet, int len) if (port_info->tx_desc_cur >= port_info->tx_desc_base + NUM_TX_DESC) port_info->tx_desc_cur = port_info->tx_desc_base; - return ret; err: return ret; } @@ -136,7 +135,6 @@ int sh_eth_recv(struct eth_device *dev) return len; } -#define EDMR_INIT_CNT 1000 static int sh_eth_reset(struct sh_eth_dev *eth) { int port = eth->port; @@ -148,13 +146,13 @@ static int sh_eth_reset(struct sh_eth_dev *eth) /* Perform a software reset and wait for it to complete */ outl(EDMR_SRST, EDMR(port)); - for (i = 0; i < EDMR_INIT_CNT; i++) { + for (i = 0; i < TIMEOUT_CNT ; i++) { if (!(inl(EDMR(port)) & EDMR_SRST)) break; udelay(1000); } - if (i == EDMR_INIT_CNT) { + if (i == TIMEOUT_CNT) { printf(SHETHER_NAME ": Software reset timeout\n"); ret = -EIO; } @@ -371,7 +369,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(0, TFTR(port)); outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port)); outl(RMCR_RST, RMCR(port)); -#ifndef CONFIG_CPU_SH7757 +#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, RPADIR(port)); #endif outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port)); @@ -393,16 +391,19 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(val, MALR(port)); outl(RFLR_RFL_MIN, RFLR(port)); -#ifndef CONFIG_CPU_SH7757 +#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, PIPR(port)); #endif +#if !defined(CONFIG_CPU_SH7724) outl(APR_AP, APR(port)); outl(MPR_MP, MPR(port)); -#ifdef CONFIG_CPU_SH7757 - outl(TPAUSER_UNLIMITED, TPAUSER(port)); -#else +#endif +#if defined(CONFIG_CPU_SH7763) outl(TPAUSER_TPAUSE, TPAUSER(port)); +#elif defined(CONFIG_CPU_SH7757) + outl(TPAUSER_UNLIMITED, TPAUSER(port)); #endif + /* Configure phy */ ret = sh_eth_phy_config(eth); if (ret) { @@ -412,33 +413,34 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) phy = port_info->phydev; phy_startup(phy); + val = 0; + /* Set the transfer speed */ -#ifdef CONFIG_CPU_SH7763 if (phy->speed == 100) { printf(SHETHER_NAME ": 100Base/"); +#ifdef CONFIG_CPU_SH7763 outl(GECMR_100B, GECMR(port)); +#elif defined(CONFIG_CPU_SH7757) + outl(1, RTRATE(port)); +#elif defined(CONFIG_CPU_SH7724) + val = ECMR_RTM; +#endif } else if (phy->speed == 10) { printf(SHETHER_NAME ": 10Base/"); +#ifdef CONFIG_CPU_SH7763 outl(GECMR_10B, GECMR(port)); - } -#endif -#if defined(CONFIG_CPU_SH7757) - if (phy->speed == 100) { - printf("100Base/"); - outl(1, RTRATE(port)); - } else if (phy->speed == 10) { - printf("10Base/"); +#elif defined(CONFIG_CPU_SH7757) outl(0, RTRATE(port)); - } #endif + } /* Check if full duplex mode is supported by the phy */ if (phy->duplex) { printf("Full\n"); - outl((ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); + outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); } else { printf("Half\n"); - outl((ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); + outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); } return ret; diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 0692f8b065..27fde05bd6 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -1,8 +1,8 @@ /* * sh_eth.h - Driver for Renesas SuperH ethernet controler. * - * Copyright (C) 2008 Renesas Solutions Corp. - * Copyright (c) 2008 Nobuhiro Iwamatsu + * Copyright (C) 2008, 2011 Renesas Solutions Corp. + * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu * Copyright (c) 2007 Carlos Munoz <carlos@kenati.com> * * This program is free software; you can redistribute it and/or modify @@ -162,6 +162,32 @@ struct sh_eth_dev { #define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c0) #define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c8) #define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc) + +#elif defined(CONFIG_CPU_SH7724) +#define BASE_IO_ADDR 0xA4600000 + +#define TDLAR(port) (BASE_IO_ADDR + 0x0018) +#define RDLAR(port) (BASE_IO_ADDR + 0x0020) + +#define EDMR(port) (BASE_IO_ADDR + 0x0000) +#define EDTRR(port) (BASE_IO_ADDR + 0x0008) +#define EDRRR(port) (BASE_IO_ADDR + 0x0010) +#define EESR(port) (BASE_IO_ADDR + 0x0028) +#define EESIPR(port) (BASE_IO_ADDR + 0x0030) +#define TRSCER(port) (BASE_IO_ADDR + 0x0038) +#define TFTR(port) (BASE_IO_ADDR + 0x0048) +#define FDR(port) (BASE_IO_ADDR + 0x0050) +#define RMCR(port) (BASE_IO_ADDR + 0x0058) +#define FCFTR(port) (BASE_IO_ADDR + 0x0070) +#define ECMR(port) (BASE_IO_ADDR + 0x0100) +#define RFLR(port) (BASE_IO_ADDR + 0x0108) +#define ECSIPR(port) (BASE_IO_ADDR + 0x0118) +#define PIR(port) (BASE_IO_ADDR + 0x0120) +#define APR(port) (BASE_IO_ADDR + 0x0154) +#define MPR(port) (BASE_IO_ADDR + 0x0158) +#define TPAUSER(port) (BASE_IO_ADDR + 0x0164) +#define MAHR(port) (BASE_IO_ADDR + 0x01c0) +#define MALR(port) (BASE_IO_ADDR + 0x01c8) #endif /* @@ -183,7 +209,7 @@ enum DMAC_M_BIT { EDMR_SRST = 0x03, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ -#elif defined CONFIG_CPU_SH7757 +#elif defined(CONFIG_CPU_SH7757) ||defined (CONFIG_CPU_SH7724) EDMR_SRST = 0x01, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ @@ -325,7 +351,8 @@ enum FCFTR_BIT { /* Transfer descriptor bit */ enum TD_STS_BIT { -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) +#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \ + || defined(CONFIG_CPU_SH7724) TD_TACT = 0x80000000, #else TD_TACT = 0x7fffffff, @@ -350,6 +377,10 @@ enum FELIC_MODE_BIT { ECMR_PMDE = 0x00000200, ECMR_RE = 0x00000040, ECMR_TE = 0x00000020, ECMR_ILB = 0x00000008, ECMR_ELB = 0x00000004, ECMR_DM = 0x00000002, ECMR_PRM = 0x00000001, +#ifdef CONFIG_CPU_SH7724 + ECMR_RTM = 0x00000010, +#endif + }; #ifdef CONFIG_CPU_SH7763 @@ -357,6 +388,8 @@ enum FELIC_MODE_BIT { ECMR_TXF | ECMR_MCT) #elif CONFIG_CPU_SH7757 #define ECMR_CHG_DM (ECMR_ZPF) +#elif CONFIG_CPU_SH7724 +#define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF) #else #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) #endif diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 4e16e4803c..0b3e779c8e 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -686,8 +686,6 @@ static inline int scbrr_calc(struct uart_port port, int bps, int clk) #define SCBRR_VALUE(bps, clk) scbrr_calc(sh_sci, bps, clk) #elif defined(__H8300H__) || defined(__H8300S__) #define SCBRR_VALUE(bps, clk) (((clk*1000/32)/bps)-1) -#elif defined(CONFIG_CPU_SH7264) -#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)) #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif |