diff options
Diffstat (limited to 'drivers/i2c')
| -rw-r--r-- | drivers/i2c/fsl_i2c.c | 41 | ||||
| -rw-r--r-- | drivers/i2c/mxc_i2c.c | 8 | ||||
| -rw-r--r-- | drivers/i2c/omap1510_i2c.c | 6 | ||||
| -rw-r--r-- | drivers/i2c/omap24xx_i2c.c | 137 | ||||
| -rw-r--r-- | drivers/i2c/soft_i2c.c | 131 | ||||
| -rw-r--r-- | drivers/i2c/tsi108_i2c.c | 20 |
6 files changed, 168 insertions, 175 deletions
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 264553dfa8..ce646fd7ed 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -26,7 +26,7 @@ #include <asm/io.h> #include <asm/fsl_i2c.h> /* HW definitions */ -#define I2C_TIMEOUT (CFG_HZ / 4) +#define I2C_TIMEOUT (CONFIG_SYS_HZ / 4) #define I2C_READ_BIT 1 #define I2C_WRITE_BIT 0 @@ -38,18 +38,17 @@ DECLARE_GLOBAL_DATA_PTR; * runs from ROM, and we can't switch buses because we can't modify * the global variables. */ -#ifdef CFG_SPD_BUS_NUM -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = CFG_SPD_BUS_NUM; -#else -static unsigned int i2c_bus_num __attribute__ ((section ("data"))) = 0; +#ifndef CONFIG_SYS_SPD_BUS_NUM +#define CONFIG_SYS_SPD_BUS_NUM 0 #endif +static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = CONFIG_SYS_SPD_BUS_NUM; -static unsigned int i2c_bus_speed[2] = {CFG_I2C_SPEED, CFG_I2C_SPEED}; +static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SPEED}; static const struct fsl_i2c *i2c_dev[2] = { - (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET), -#ifdef CFG_I2C2_OFFSET - (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET) + (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET), +#ifdef CONFIG_SYS_I2C2_OFFSET + (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET) #endif }; @@ -176,7 +175,7 @@ i2c_init(int speed, int slaveadd) struct fsl_i2c *dev; unsigned int temp; - dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C_OFFSET); + dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ @@ -187,8 +186,8 @@ i2c_init(int speed, int slaveadd) writeb(0x0, &dev->sr); /* clear status register */ writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */ -#ifdef CFG_I2C2_OFFSET - dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET); +#ifdef CONFIG_SYS_I2C2_OFFSET + dev = (struct fsl_i2c *) (CONFIG_SYS_IMMR + CONFIG_SYS_I2C2_OFFSET); writeb(0, &dev->cr); /* stop I2C controller */ udelay(5); /* let it shutdown in peace */ @@ -368,25 +367,9 @@ i2c_probe(uchar chip) return i2c_read(chip, 0, 0, NULL, 0); } -uchar -i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf[1]; - - i2c_read(i2c_addr, reg, 1, buf, 1); - - return buf[0]; -} - -void -i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} - int i2c_set_bus_num(unsigned int bus) { -#ifdef CFG_I2C2_OFFSET +#ifdef CONFIG_SYS_I2C2_OFFSET if (bus > 1) { #else if (bus > 0) { diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c index 1f6ba1f390..eedad065fe 100644 --- a/drivers/i2c/mxc_i2c.c +++ b/drivers/i2c/mxc_i2c.c @@ -47,14 +47,14 @@ #define I2SR_IIF (1 << 1) #define I2SR_RX_NO_AK (1 << 0) -#ifdef CFG_I2C_MX31_PORT1 +#ifdef CONFIG_SYS_I2C_MX31_PORT1 #define I2C_BASE 0x43f80000 -#elif defined (CFG_I2C_MX31_PORT2) +#elif defined (CONFIG_SYS_I2C_MX31_PORT2) #define I2C_BASE 0x43f98000 -#elif defined (CFG_I2C_MX31_PORT3) +#elif defined (CONFIG_SYS_I2C_MX31_PORT3) #define I2C_BASE 0x43f84000 #else -#error "define CFG_I2C_MX31_PORTx to use the mx31 I2C driver" +#error "define CONFIG_SYS_I2C_MX31_PORTx to use the mx31 I2C driver" #endif #ifdef DEBUG diff --git a/drivers/i2c/omap1510_i2c.c b/drivers/i2c/omap1510_i2c.c index 388951db1f..f91ee8884a 100644 --- a/drivers/i2c/omap1510_i2c.c +++ b/drivers/i2c/omap1510_i2c.c @@ -32,7 +32,7 @@ void i2c_init (int speed, int slaveadd) udelay (5000); } - /* 12Mhz I2C module clock */ + /* 12MHz I2C module clock */ outw (0, I2C_PSC); outw (I2C_CON_EN, I2C_CON); outw (0, I2C_SYSTEST); @@ -205,7 +205,7 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_read_byte (chip, addr + i, &buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -230,7 +230,7 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } diff --git a/drivers/i2c/omap24xx_i2c.c b/drivers/i2c/omap24xx_i2c.c index d16cfb123f..4427938ff3 100644 --- a/drivers/i2c/omap24xx_i2c.c +++ b/drivers/i2c/omap24xx_i2c.c @@ -25,9 +25,6 @@ #include <asm/arch/i2c.h> #include <asm/io.h> -#define inw(a) __raw_readw(a) -#define outw(a,v) __raw_writew(a,v) - static void wait_for_bb (void); static u16 wait_for_pin (void); static void flush_fifo(void); @@ -36,32 +33,32 @@ void i2c_init (int speed, int slaveadd) { u16 scl; - outw(0x2, I2C_SYSC); /* for ES2 after soft reset */ + writew(0x2, I2C_SYSC); /* for ES2 after soft reset */ udelay(1000); - outw(0x0, I2C_SYSC); /* will probably self clear but */ + writew(0x0, I2C_SYSC); /* will probably self clear but */ - if (inw (I2C_CON) & I2C_CON_EN) { - outw (0, I2C_CON); + if (readw (I2C_CON) & I2C_CON_EN) { + writew (0, I2C_CON); udelay (50000); } - /* 12Mhz I2C module clock */ - outw (0, I2C_PSC); + /* 12MHz I2C module clock */ + writew (0, I2C_PSC); speed = speed/1000; /* 100 or 400 */ scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */ - outw (scl, I2C_SCLL); - outw (scl, I2C_SCLH); + writew (scl, I2C_SCLL); + writew (scl, I2C_SCLH); /* own address */ - outw (slaveadd, I2C_OA); - outw (I2C_CON_EN, I2C_CON); + writew (slaveadd, I2C_OA); + writew (I2C_CON_EN, I2C_CON); /* have to enable intrrupts or OMAP i2c module doesn't work */ - outw (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | - I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE); + writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | + I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE); udelay (1000); flush_fifo(); - outw (0xFFFF, I2C_STAT); - outw (0, I2C_CNT); + writew (0xFFFF, I2C_STAT); + writew (0, I2C_CNT); } static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) @@ -73,19 +70,19 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) wait_for_bb (); /* one byte only */ - outw (1, I2C_CNT); + writew (1, I2C_CNT); /* set slave address */ - outw (devaddr, I2C_SA); + writew (devaddr, I2C_SA); /* no stop bit needed here */ - outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON); + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON); status = wait_for_pin (); if (status & I2C_STAT_XRDY) { /* Important: have to use byte access */ - *(volatile u8 *) (I2C_DATA) = regoffset; + writeb (regoffset, I2C_DATA); udelay (20000); - if (inw (I2C_STAT) & I2C_STAT_NACK) { + if (readw (I2C_STAT) & I2C_STAT_NACK) { i2c_error = 1; } } else { @@ -94,42 +91,42 @@ static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value) if (!i2c_error) { /* free bus, otherwise we can't use a combined transction */ - outw (0, I2C_CON); - while (inw (I2C_STAT) || (inw (I2C_CON) & I2C_CON_MST)) { + writew (0, I2C_CON); + while (readw (I2C_STAT) || (readw (I2C_CON) & I2C_CON_MST)) { udelay (10000); /* Have to clear pending interrupt to clear I2C_STAT */ - outw (0xFFFF, I2C_STAT); + writew (0xFFFF, I2C_STAT); } wait_for_bb (); /* set slave address */ - outw (devaddr, I2C_SA); + writew (devaddr, I2C_SA); /* read one byte from slave */ - outw (1, I2C_CNT); + writew (1, I2C_CNT); /* need stop bit here */ - outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, - I2C_CON); + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, + I2C_CON); status = wait_for_pin (); if (status & I2C_STAT_RRDY) { - *value = inw (I2C_DATA); + *value = readw (I2C_DATA); udelay (20000); } else { i2c_error = 1; } if (!i2c_error) { - outw (I2C_CON_EN, I2C_CON); - while (inw (I2C_STAT) - || (inw (I2C_CON) & I2C_CON_MST)) { + writew (I2C_CON_EN, I2C_CON); + while (readw (I2C_STAT) + || (readw (I2C_CON) & I2C_CON_MST)) { udelay (10000); - outw (0xFFFF, I2C_STAT); + writew (0xFFFF, I2C_STAT); } } } flush_fifo(); - outw (0xFFFF, I2C_STAT); - outw (0, I2C_CNT); + writew (0xFFFF, I2C_STAT); + writew (0, I2C_CNT); return i2c_error; } @@ -142,22 +139,22 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) wait_for_bb (); /* two bytes */ - outw (2, I2C_CNT); + writew (2, I2C_CNT); /* set slave address */ - outw (devaddr, I2C_SA); + writew (devaddr, I2C_SA); /* stop bit needed here */ - outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | - I2C_CON_STP, I2C_CON); + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | + I2C_CON_STP, I2C_CON); /* wait until state change */ status = wait_for_pin (); if (status & I2C_STAT_XRDY) { /* send out two bytes */ - outw ((value << 8) + regoffset, I2C_DATA); + writew ((value << 8) + regoffset, I2C_DATA); /* must have enough delay to allow BB bit to go low */ udelay (50000); - if (inw (I2C_STAT) & I2C_STAT_NACK) { + if (readw (I2C_STAT) & I2C_STAT_NACK) { i2c_error = 1; } } else { @@ -167,18 +164,18 @@ static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value) if (!i2c_error) { int eout = 200; - outw (I2C_CON_EN, I2C_CON); - while ((stat = inw (I2C_STAT)) || (inw (I2C_CON) & I2C_CON_MST)) { + writew (I2C_CON_EN, I2C_CON); + while ((stat = readw (I2C_STAT)) || (readw (I2C_CON) & I2C_CON_MST)) { udelay (1000); /* have to read to clear intrrupt */ - outw (0xFFFF, I2C_STAT); + writew (0xFFFF, I2C_STAT); if(--eout == 0) /* better leave with error than hang */ break; } } flush_fifo(); - outw (0xFFFF, I2C_STAT); - outw (0, I2C_CNT); + writew (0xFFFF, I2C_STAT); + writew (0, I2C_CNT); return i2c_error; } @@ -189,10 +186,10 @@ static void flush_fifo(void) * you get a bus error */ while(1){ - stat = inw(I2C_STAT); + stat = readw(I2C_STAT); if(stat == I2C_STAT_RRDY){ - inw(I2C_DATA); - outw(I2C_STAT_RRDY,I2C_STAT); + readw(I2C_DATA); + writew(I2C_STAT_RRDY,I2C_STAT); udelay(1000); }else break; @@ -203,7 +200,7 @@ int i2c_probe (uchar chip) { int res = 1; /* default = fail */ - if (chip == inw (I2C_OA)) { + if (chip == readw (I2C_OA)) { return res; } @@ -211,27 +208,27 @@ int i2c_probe (uchar chip) wait_for_bb (); /* try to read one byte */ - outw (1, I2C_CNT); + writew (1, I2C_CNT); /* set slave address */ - outw (chip, I2C_SA); + writew (chip, I2C_SA); /* stop bit needed here */ - outw (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON); + writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON); /* enough delay for the NACK bit set */ udelay (50000); - if (!(inw (I2C_STAT) & I2C_STAT_NACK)) { + if (!(readw (I2C_STAT) & I2C_STAT_NACK)) { res = 0; /* success case */ flush_fifo(); - outw(0xFFFF, I2C_STAT); + writew(0xFFFF, I2C_STAT); } else { - outw(0xFFFF, I2C_STAT); /* failue, clear sources*/ - outw (inw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */ + writew(0xFFFF, I2C_STAT); /* failue, clear sources*/ + writew (readw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */ udelay(20000); wait_for_bb (); } flush_fifo(); - outw (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/ - outw(0xFFFF, I2C_STAT); + writew (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/ + writew(0xFFFF, I2C_STAT); return res; } @@ -252,7 +249,7 @@ int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_read_byte (chip, addr + i, &buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -277,7 +274,7 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) for (i = 0; i < len; i++) { if (i2c_write_byte (chip, addr + i, buffer[i])) { printf ("I2C read: I/O error\n"); - i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); return 1; } } @@ -290,17 +287,17 @@ static void wait_for_bb (void) int timeout = 10; u16 stat; - outw(0xFFFF, I2C_STAT); /* clear current interruts...*/ - while ((stat = inw (I2C_STAT) & I2C_STAT_BB) && timeout--) { - outw (stat, I2C_STAT); + writew(0xFFFF, I2C_STAT); /* clear current interruts...*/ + while ((stat = readw (I2C_STAT) & I2C_STAT_BB) && timeout--) { + writew (stat, I2C_STAT); udelay (50000); } if (timeout <= 0) { printf ("timed out in wait_for_bb: I2C_STAT=%x\n", - inw (I2C_STAT)); + readw (I2C_STAT)); } - outw(0xFFFF, I2C_STAT); /* clear delayed stuff*/ + writew(0xFFFF, I2C_STAT); /* clear delayed stuff*/ } static u16 wait_for_pin (void) @@ -310,7 +307,7 @@ static u16 wait_for_pin (void) do { udelay (1000); - status = inw (I2C_STAT); + status = readw (I2C_STAT); } while ( !(status & (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY | I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK | @@ -318,8 +315,8 @@ static u16 wait_for_pin (void) if (timeout <= 0) { printf ("timed out in wait_for_pin: I2C_STAT=%x\n", - inw (I2C_STAT)); - outw(0xFFFF, I2C_STAT); + readw (I2C_STAT)); + writew(0xFFFF, I2C_STAT); } return status; } diff --git a/drivers/i2c/soft_i2c.c b/drivers/i2c/soft_i2c.c index 23db2ee8ff..a27de5a7ec 100644 --- a/drivers/i2c/soft_i2c.c +++ b/drivers/i2c/soft_i2c.c @@ -28,6 +28,7 @@ #include <common.h> #ifdef CONFIG_MPC8260 /* only valid for MPC8260 */ #include <ioports.h> +#include <asm/io.h> #endif #ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */ #include <asm/io.h> @@ -39,6 +40,9 @@ #ifdef CONFIG_LPC2292 #include <asm/arch/hardware.h> #endif +#ifdef CONFIG_MPC866 /* only valid for MPC866 */ +#include <asm/io.h> +#endif #include <i2c.h> /* #define DEBUG_I2C */ @@ -68,17 +72,23 @@ DECLARE_GLOBAL_DATA_PTR; #define PRINTD(fmt,args...) #endif +#if defined(CONFIG_I2C_MULTI_BUS) +static unsigned int i2c_bus_num __attribute__ ((section (".data"))) = 0; +#endif /* CONFIG_I2C_MULTI_BUS */ + /*----------------------------------------------------------------------- * Local functions */ +#if !defined(CONFIG_SYS_I2C_INIT_BOARD) static void send_reset (void); +#endif static void send_start (void); static void send_stop (void); static void send_ack (int); static int write_byte (uchar byte); static uchar read_byte (int); - +#if !defined(CONFIG_SYS_I2C_INIT_BOARD) /*----------------------------------------------------------------------- * Send a reset sequence consisting of 9 clocks with the data signal high * to clock any confused device back into an idle state. Also send a @@ -86,12 +96,7 @@ static uchar read_byte (int); */ static void send_reset(void) { -#ifdef CONFIG_MPC8260 - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); -#endif -#ifdef CONFIG_8xx - volatile immap_t *immr = (immap_t *)CFG_IMMR; -#endif + I2C_SOFT_DECLARATIONS /* intentional without ';' */ int j; I2C_SCL(1); @@ -111,18 +116,14 @@ static void send_reset(void) send_stop(); I2C_TRISTATE; } +#endif /*----------------------------------------------------------------------- * START: High -> Low on SDA while SCL is High */ static void send_start(void) { -#ifdef CONFIG_MPC8260 - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); -#endif -#ifdef CONFIG_8xx - volatile immap_t *immr = (immap_t *)CFG_IMMR; -#endif + I2C_SOFT_DECLARATIONS /* intentional without ';' */ I2C_DELAY; I2C_SDA(1); @@ -139,12 +140,7 @@ static void send_start(void) */ static void send_stop(void) { -#ifdef CONFIG_MPC8260 - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); -#endif -#ifdef CONFIG_8xx - volatile immap_t *immr = (immap_t *)CFG_IMMR; -#endif + I2C_SOFT_DECLARATIONS /* intentional without ';' */ I2C_SCL(0); I2C_DELAY; @@ -164,12 +160,7 @@ static void send_stop(void) */ static void send_ack(int ack) { -#ifdef CONFIG_MPC8260 - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); -#endif -#ifdef CONFIG_8xx - volatile immap_t *immr = (immap_t *)CFG_IMMR; -#endif + I2C_SOFT_DECLARATIONS /* intentional without ';' */ I2C_SCL(0); I2C_DELAY; @@ -189,12 +180,7 @@ static void send_ack(int ack) */ static int write_byte(uchar data) { -#ifdef CONFIG_MPC8260 - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); -#endif -#ifdef CONFIG_8xx - volatile immap_t *immr = (immap_t *)CFG_IMMR; -#endif + I2C_SOFT_DECLARATIONS /* intentional without ';' */ int j; int nack; @@ -230,6 +216,51 @@ static int write_byte(uchar data) return(nack); /* not a nack is an ack */ } +#if defined(CONFIG_I2C_MULTI_BUS) +/* + * Functions for multiple I2C bus handling + */ +unsigned int i2c_get_bus_num(void) +{ + return i2c_bus_num; +} + +int i2c_set_bus_num(unsigned int bus) +{ +#if defined(CONFIG_I2C_MUX) + if (bus < CONFIG_SYS_MAX_I2C_BUS) { + i2c_bus_num = bus; + } else { + int ret; + + ret = i2x_mux_select_mux(bus); + if (ret == 0) + i2c_bus_num = bus; + else + return ret; + } +#else + if (bus >= CONFIG_SYS_MAX_I2C_BUS) + return -1; + i2c_bus_num = bus; +#endif + return 0; +} + +/* TODO: add 100/400k switching */ +unsigned int i2c_get_bus_speed(void) +{ + return CONFIG_SYS_I2C_SPEED; +} + +int i2c_set_bus_speed(unsigned int speed) +{ + if (speed != CONFIG_SYS_I2C_SPEED) + return -1; + + return 0; +} +#endif /*----------------------------------------------------------------------- * if ack == I2C_ACK, ACK the byte so can continue reading, else @@ -237,12 +268,7 @@ static int write_byte(uchar data) */ static uchar read_byte(int ack) { -#ifdef CONFIG_MPC8260 - volatile ioport_t *iop = ioport_addr((immap_t *)CFG_IMMR, I2C_PORT); -#endif -#ifdef CONFIG_8xx - volatile immap_t *immr = (immap_t *)CFG_IMMR; -#endif + I2C_SOFT_DECLARATIONS /* intentional without ';' */ int data; int j; @@ -275,6 +301,12 @@ static uchar read_byte(int ack) */ void i2c_init (int speed, int slaveaddr) { +#if defined(CONFIG_SYS_I2C_INIT_BOARD) + /* call board specific i2c bus reset routine before accessing the */ + /* environment, which might be in a chip on that bus. For details */ + /* about this problem see doc/I2C_Edge_Conditions. */ + i2c_init_board(); +#else /* * WARNING: Do NOT save speed in a static variable: if the * I2C routines are called before RAM is initialized (to read @@ -282,6 +314,7 @@ void i2c_init (int speed, int slaveaddr) * system will crash. */ send_reset (); +#endif } /*----------------------------------------------------------------------- @@ -313,7 +346,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) PRINTD("i2c_read: chip %02X addr %02X alen %d buffer %p len %d\n", chip, addr, alen, buffer, len); -#ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW +#ifdef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW /* * EEPROM chips that implement "address overflow" are ones * like Catalyst 24WC04/08/16 which has 9/10/11 bits of @@ -325,7 +358,7 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len) * still be one byte because the extra address bits are * hidden in the chip address. */ - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW); PRINTD("i2c_read: fix addr_overflow: chip %02X addr %02X\n", chip, addr); @@ -401,23 +434,3 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len) send_stop(); return(failures); } - -/*----------------------------------------------------------------------- - * Read a register - */ -uchar i2c_reg_read(uchar i2c_addr, uchar reg) -{ - uchar buf; - - i2c_read(i2c_addr, reg, 1, &buf, 1); - - return(buf); -} - -/*----------------------------------------------------------------------- - * Write a register - */ -void i2c_reg_write(uchar i2c_addr, uchar reg, uchar val) -{ - i2c_write(i2c_addr, reg, 1, &val, 1); -} diff --git a/drivers/i2c/tsi108_i2c.c b/drivers/i2c/tsi108_i2c.c index 695e393417..fda822c52d 100644 --- a/drivers/i2c/tsi108_i2c.c +++ b/drivers/i2c/tsi108_i2c.c @@ -60,14 +60,14 @@ static int i2c_read_byte ( chan_offset = TSI108_I2C_SDRAM_OFFSET; /* Check if I2C operation is in progress */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { /* Set device address and operation (read = 0) */ temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL1) = temp; /* Issue the read command @@ -75,13 +75,13 @@ static int i2c_read_byte ( * (size = 1 byte, lane = 0) */ - *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2) = (I2C_CNTRL2_START); /* Wait until operation completed */ do { /* Read I2C operation status */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) { if (0 == (temp & @@ -90,7 +90,7 @@ static int i2c_read_byte ( ) { op_status = TSI108_I2C_SUCCESS; - temp = *(u32 *) (CFG_TSI108_CSR_BASE + + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_RD_DATA); @@ -172,25 +172,25 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ u32 op_status = TSI108_I2C_TIMEOUT_ERR; /* Check if I2C operation is in progress */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { /* Place data into the I2C Tx Register */ - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_TX_DATA) = (u32) * buffer; /* Set device address and operation */ temp = I2C_CNTRL1_I2CWRITE | (byte_addr << 16) | ((chip_addr & 0x07) << 8) | ((chip_addr >> 3) & 0x0F); - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL1) = temp; /* Issue the write command (at this moment all other parameters * are 0 (size = 1 byte, lane = 0) */ - *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + + *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2) = (I2C_CNTRL2_START); op_status = TSI108_I2C_TIMEOUT_ERR; @@ -198,7 +198,7 @@ static int i2c_write_byte (uchar chip_addr,/* I2C device address on the bus */ /* Wait until operation completed */ do { /* Read I2C operation status */ - temp = *(u32 *) (CFG_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); + temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + TSI108_I2C_OFFSET + I2C_CNTRL2); if (0 == (temp & (I2C_CNTRL2_WR_STATUS | I2C_CNTRL2_START))) { if (0 == (temp & |