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Diffstat (limited to 'drivers/ddr/marvell/axp')
-rw-r--r--drivers/ddr/marvell/axp/ddr3_axp_config.h2
-rw-r--r--drivers/ddr/marvell/axp/xor.c3
-rw-r--r--drivers/ddr/marvell/axp/xor.h1
3 files changed, 3 insertions, 3 deletions
diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h
index 800d2d1476..a6720442ff 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp_config.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h
@@ -44,7 +44,7 @@
* DDR3_TRAINING_DEBUG - Debug prints of internal code
*/
#define DDR_TARGET_FABRIC 5
-#define DRAM_ECC 0
+#define DRAM_ECC 1
#ifdef MV_DDR_32BIT
#define BUS_WIDTH 32
diff --git a/drivers/ddr/marvell/axp/xor.c b/drivers/ddr/marvell/axp/xor.c
index 66c96aef4e..54924cac3c 100644
--- a/drivers/ddr/marvell/axp/xor.c
+++ b/drivers/ddr/marvell/axp/xor.c
@@ -18,7 +18,6 @@ static u32 xor_regs_ctrl_backup;
static u32 xor_regs_base_backup[MAX_CS];
static u32 xor_regs_mask_backup[MAX_CS];
-static void mv_xor_hal_init(u32 chan_num);
static int mv_xor_cmd_set(u32 chan, int command);
static int mv_xor_ctrl_set(u32 chan, u32 xor_ctrl);
@@ -110,7 +109,7 @@ void mv_sys_xor_finish(void)
* RETURN:
* MV_BAD_PARAM if parameters to function invalid, MV_OK otherwise.
*/
-static void mv_xor_hal_init(u32 chan_num)
+void mv_xor_hal_init(u32 chan_num)
{
u32 i;
diff --git a/drivers/ddr/marvell/axp/xor.h b/drivers/ddr/marvell/axp/xor.h
index 353648758a..3ff784d7a9 100644
--- a/drivers/ddr/marvell/axp/xor.h
+++ b/drivers/ddr/marvell/axp/xor.h
@@ -60,6 +60,7 @@ struct crc_dma_desc {
u32 src_addr1; /* Mode: Source Block address pointer */
} __packed;
+void mv_xor_hal_init(u32 chan_num);
int mv_xor_state_get(u32 chan);
void mv_sys_xor_init(MV_DRAM_INFO *dram_info);
void mv_sys_xor_finish(void);