summaryrefslogtreecommitdiff
path: root/doc
diff options
context:
space:
mode:
Diffstat (limited to 'doc')
-rw-r--r--doc/board/AndesTech/ae350.rst (renamed from doc/board/AndesTech/ax25-ae350.rst)16
-rw-r--r--doc/board/AndesTech/index.rst2
2 files changed, 9 insertions, 9 deletions
diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ae350.rst
index b46f427f4b..42a2b4d0b5 100644
--- a/doc/board/AndesTech/ax25-ae350.rst
+++ b/doc/board/AndesTech/ae350.rst
@@ -1,20 +1,20 @@
.. SPDX-License-Identifier: GPL-2.0+
-AX25-AE350
-==========
+AE350
+======
-AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core
-base on RISC-V architecture.
+AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core
+based on RISC-V architecture.
AE350 has integrated both AHB and APB bus and many periphals for application
and product development.
-AX25-AE350 is the SoC with AE350 hardcore CPU.
+AndesV5 is Andes CPU IP family that adopts RISC-V architecture.
-AX25 is Andes CPU IP to adopt RISC-V architecture.
+AndesV5 family includes 25, 27, 45 series.
-AX25 Features
--------------
+25-Series Features
+------------------
CPU Core
- 5-stage in-order execution pipeline
diff --git a/doc/board/AndesTech/index.rst b/doc/board/AndesTech/index.rst
index d8f7d155fc..cacc5791a9 100644
--- a/doc/board/AndesTech/index.rst
+++ b/doc/board/AndesTech/index.rst
@@ -7,4 +7,4 @@ Andes Tech
:maxdepth: 2
adp-ag101p
- ax25-ae350
+ ae350