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-rw-r--r--cpu/arm_cortexa8/omap3/sys_info.c26
-rw-r--r--cpu/mpc83xx/cpu_init.c2
-rw-r--r--cpu/mpc83xx/spd_sdram.c16
-rw-r--r--cpu/pxa/interrupts.c46
4 files changed, 61 insertions, 29 deletions
diff --git a/cpu/arm_cortexa8/omap3/sys_info.c b/cpu/arm_cortexa8/omap3/sys_info.c
index 28a102091a8..b385b912b43 100644
--- a/cpu/arm_cortexa8/omap3/sys_info.c
+++ b/cpu/arm_cortexa8/omap3/sys_info.c
@@ -36,6 +36,32 @@ static gpmc_csx_t *gpmc_cs_base = (gpmc_csx_t *)GPMC_CONFIG_CS0_BASE;
static sdrc_t *sdrc_base = (sdrc_t *)OMAP34XX_SDRC_BASE;
static ctrl_t *ctrl_base = (ctrl_t *)OMAP34XX_CTRL_BASE;
+/*****************************************************************
+ * dieid_num_r(void) - read and set die ID
+ *****************************************************************/
+void dieid_num_r(void)
+{
+ ctrl_id_t *id_base = (ctrl_id_t *)OMAP34XX_ID_L4_IO_BASE;
+ char *uid_s, die_id[34];
+ u32 id[4];
+
+ memset(die_id, 0, sizeof(die_id));
+
+ uid_s = getenv("dieid#");
+
+ if (uid_s == NULL) {
+ id[3] = readl(&id_base->die_id_0);
+ id[2] = readl(&id_base->die_id_1);
+ id[1] = readl(&id_base->die_id_2);
+ id[0] = readl(&id_base->die_id_3);
+ sprintf(die_id, "%08x%08x%08x%08x", id[0], id[1], id[2], id[3]);
+ setenv("dieid#", die_id);
+ uid_s = die_id;
+ }
+
+ printf("Die ID #%s\n", uid_s);
+}
+
/******************************************
* get_cpu_type(void) - extract cpu info
******************************************/
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 491c2e5c3b2..8e9c875599e 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -106,7 +106,7 @@ void cpu_init_f (volatile immap_t * im)
#ifdef CONFIG_SYS_SCCR_ENCCM
/* Encryption clock mode */
im->clk.sccr = (im->clk.sccr & ~SCCR_ENCCM) |
- (CONFIG_SYS_SCCR_ENCCM << SCCR_PCICM_SHIFT);
+ (CONFIG_SYS_SCCR_ENCCM << SCCR_ENCCM_SHIFT);
#endif
#ifdef CONFIG_SYS_SCCR_PCICM
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index ff15cda7a86..4704d2006f5 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -219,7 +219,8 @@ long int spd_sdram()
ddr->cs_config[0] = ( 1 << 31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr - 12) << 8
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
| (spd.ncol_addr - 8) );
debug("\n");
debug("cs0_bnds = 0x%08x\n",ddr->csbnds[0].csbnds);
@@ -231,8 +232,9 @@ long int spd_sdram()
ddr->cs_config[1] = ( 1<<31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr-12) << 8
- | (spd.ncol_addr-8) );
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
+ | (spd.ncol_addr - 8) );
debug("cs1_bnds = 0x%08x\n",ddr->csbnds[1].csbnds);
debug("cs1_config = 0x%08x\n",ddr->cs_config[1]);
}
@@ -242,7 +244,8 @@ long int spd_sdram()
ddr->cs_config[2] = ( 1 << 31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr - 12) << 8
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
| (spd.ncol_addr - 8) );
debug("\n");
debug("cs2_bnds = 0x%08x\n",ddr->csbnds[2].csbnds);
@@ -254,8 +257,9 @@ long int spd_sdram()
ddr->cs_config[3] = ( 1<<31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
- | (spd.nrow_addr-12) << 8
- | (spd.ncol_addr-8) );
+ | ((spd.nbanks == 8 ? 1 : 0) << 14)
+ | ((spd.nrow_addr - 12) << 8)
+ | (spd.ncol_addr - 8) );
debug("cs3_bnds = 0x%08x\n",ddr->csbnds[3].csbnds);
debug("cs3_config = 0x%08x\n",ddr->cs_config[3]);
}
diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/interrupts.c
index 40d8bf251fa..2bc5c50a917 100644
--- a/cpu/pxa/interrupts.c
+++ b/cpu/pxa/interrupts.c
@@ -28,6 +28,7 @@
#include <common.h>
#include <asm/arch/pxa-regs.h>
+#include <div64.h>
#ifdef CONFIG_USE_IRQ
#error: interrupts not implemented yet
@@ -41,6 +42,20 @@
#error "Timer frequency unknown - please config PXA CPU type"
#endif
+static inline unsigned long long tick_to_time(unsigned long long tick)
+{
+ tick *= CONFIG_SYS_HZ;
+ do_div(tick, TIMER_FREQ_HZ);
+ return tick;
+}
+
+static inline unsigned long long us_to_tick(unsigned long long us)
+{
+ us = us * TIMER_FREQ_HZ + 999999;
+ do_div(us, 1000000);
+ return us;
+}
+
int interrupt_init (void)
{
/* nothing happens here - we don't setup any IRQs */
@@ -75,33 +90,20 @@ void reset_timer_masked (void)
ulong get_timer_masked (void)
{
- unsigned long long ticks = get_ticks();
-
- return (((ticks / TIMER_FREQ_HZ) * 1000) +
- ((ticks % TIMER_FREQ_HZ) * 1000) / TIMER_FREQ_HZ);
+ return tick_to_time(get_ticks());
}
void udelay_masked (unsigned long usec)
{
+ unsigned long long tmp;
ulong tmo;
- ulong endtime;
- signed long diff;
-
- if (usec >= 1000) {
- tmo = usec / 1000;
- tmo *= TIMER_FREQ_HZ;
- tmo /= 1000;
- } else {
- tmo = usec * TIMER_FREQ_HZ;
- tmo /= (1000*1000);
- }
-
- endtime = get_ticks() + tmo;
-
- do {
- ulong now = get_ticks();
- diff = endtime - now;
- } while (diff >= 0);
+
+ tmo = us_to_tick(usec);
+ tmp = get_ticks() + tmo; /* get current timestamp */
+
+ while (get_ticks() < tmp) /* loop till event */
+ /*NOP*/;
+
}
/*