diff options
Diffstat (limited to 'cpu')
| -rw-r--r-- | cpu/mpc85xx/mp.c | 6 | ||||
| -rw-r--r-- | cpu/mpc85xx/release.S | 3 | ||||
| -rw-r--r-- | cpu/mpc85xx/spd_sdram.c | 4 | ||||
| -rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 4 |
4 files changed, 11 insertions, 6 deletions
diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c index e733f7b00a..a527cf3047 100644 --- a/cpu/mpc85xx/mp.c +++ b/cpu/mpc85xx/mp.c @@ -103,6 +103,10 @@ int cpu_release(int nr, int argc, char *argv[]) } table[BOOT_ENTRY_ADDR_UPPER] = (u32)(boot_addr >> 32); + + /* ensure all table updates complete before final address write */ + eieio(); + table[BOOT_ENTRY_ADDR_LOWER] = (u32)(boot_addr & 0xffffffff); return 0; @@ -153,7 +157,7 @@ static void pq3_mp_up(unsigned long bootpg) /* wait for everyone */ while (timeout) { int i; - for (i = 1; i < CONFIG_NR_CPUS; i++) { + for (i = 0; i < CONFIG_NR_CPUS; i++) { if (table[i * NUM_BOOT_ENTRY + BOOT_ENTRY_ADDR_LOWER]) cpu_up_mask |= (1 << i); }; diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index 3b7366ff69..a47edaea62 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -114,6 +114,7 @@ __secondary_start_page: lwz r4,ENTRY_ADDR_LOWER(r10) andi. r11,r4,1 bne 2b + isync /* get the upper bits of the addr */ lwz r11,ENTRY_ADDR_UPPER(r10) @@ -169,7 +170,7 @@ __secondary_start_page: mtspr SPRN_SRR1,r13 rfi - .align 3 + .align L1_CACHE_SHIFT .globl __spin_table __spin_table: .space CONFIG_NR_CPUS*ENTRY_SIZE diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c index 435458a189..e3a824999c 100644 --- a/cpu/mpc85xx/spd_sdram.c +++ b/cpu/mpc85xx/spd_sdram.c @@ -610,8 +610,8 @@ spd_sdram(void) /* * Sneak in some Extended Refresh Recovery. */ - ddr->ext_refrec = (trfc_high << 16); - debug("DDR: ext_refrec = 0x%08x\n", ddr->ext_refrec); + ddr->timing_cfg_3 = (trfc_high << 16); + debug("DDR: timing_cfg_3 = 0x%08x\n", ddr->timing_cfg_3); ddr->timing_cfg_1 = (0 diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 60a7818989..8485841a45 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -644,8 +644,8 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num, /* * Sneak in some Extended Refresh Recovery. */ - ddr->ext_refrec = (trfc_high << 16); - debug("DDR: ext_refrec = 0x%08x\n", ddr->ext_refrec); + ddr->timing_cfg_3 = (trfc_high << 16); + debug("DDR: timing_cfg_3 = 0x%08x\n", ddr->timing_cfg_3); ddr->timing_cfg_1 = (0 |